From f06193c40b90932b4b6fabb5a038c26c35f86769 Mon Sep 17 00:00:00 2001 From: Weiwei Li Date: Wed, 30 Mar 2022 10:13:16 +0800 Subject: [PATCH] target/riscv: fix start byte for vmvr.v when vstart != 0 The spec for vmvr.v says: 'the instructions operate as if EEW=SEW, EMUL = NREG, effective length evl= EMUL * VLEN/SEW.' So the start byte for vstart != 0 should take sew into account Signed-off-by: Weiwei Li Signed-off-by: Junqiang Wang Acked-by: Alistair Francis Message-Id: <20220330021316.18223-1-liweiwei@iscas.ac.cn> Signed-off-by: Alistair Francis --- target/riscv/vector_helper.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index 99f3134aa0..576b14e5a3 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -4890,13 +4890,15 @@ GEN_VEXT_VCOMPRESS_VM(vcompress_vm_d, uint64_t, H8) /* Vector Whole Register Move */ void HELPER(vmvr_v)(void *vd, void *vs2, CPURISCVState *env, uint32_t desc) { - /* EEW = 8 */ + /* EEW = SEW */ uint32_t maxsz = simd_maxsz(desc); - uint32_t i = env->vstart; + uint32_t sewb = 1 << FIELD_EX64(env->vtype, VTYPE, VSEW); + uint32_t startb = env->vstart * sewb; + uint32_t i = startb; memcpy((uint8_t *)vd + H1(i), (uint8_t *)vs2 + H1(i), - maxsz - env->vstart); + maxsz - startb); env->vstart = 0; } -- 2.11.4.GIT