From b12fa6118f4d838d19720ec6476a1666a1b43474 Mon Sep 17 00:00:00 2001 From: =?utf8?q?C=C3=A9dric=20Le=20Goater?= Date: Fri, 22 Oct 2021 09:52:17 +0200 Subject: [PATCH] speed/sdhci: Add trace events MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Cédric Le Goater Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Francisco Iglesias Message-Id: <20211018132609.160008-6-clg@kaod.org> Signed-off-by: Cédric Le Goater --- hw/sd/aspeed_sdhci.c | 5 +++++ hw/sd/trace-events | 4 ++++ 2 files changed, 9 insertions(+) diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c index 3299844de6..df1bdf1fa4 100644 --- a/hw/sd/aspeed_sdhci.c +++ b/hw/sd/aspeed_sdhci.c @@ -14,6 +14,7 @@ #include "hw/irq.h" #include "migration/vmstate.h" #include "hw/qdev-properties.h" +#include "trace.h" #define ASPEED_SDHCI_INFO 0x00 #define ASPEED_SDHCI_INFO_SLOT1 (1 << 17) @@ -60,6 +61,8 @@ static uint64_t aspeed_sdhci_read(void *opaque, hwaddr addr, unsigned int size) } } + trace_aspeed_sdhci_read(addr, size, (uint64_t) val); + return (uint64_t)val; } @@ -68,6 +71,8 @@ static void aspeed_sdhci_write(void *opaque, hwaddr addr, uint64_t val, { AspeedSDHCIState *sdhci = opaque; + trace_aspeed_sdhci_write(addr, size, val); + switch (addr) { case ASPEED_SDHCI_INFO: /* The RESET bit automatically clears. */ diff --git a/hw/sd/trace-events b/hw/sd/trace-events index 3cc2ef89ba..94a00557b2 100644 --- a/hw/sd/trace-events +++ b/hw/sd/trace-events @@ -68,3 +68,7 @@ pl181_fifo_push(uint32_t data) "FIFO push 0x%08" PRIx32 pl181_fifo_pop(uint32_t data) "FIFO pop 0x%08" PRIx32 pl181_fifo_transfer_complete(void) "FIFO transfer complete" pl181_data_engine_idle(void) "data engine idle" + +# aspeed_sdhci.c +aspeed_sdhci_read(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size %u: 0x%" PRIx64 +aspeed_sdhci_write(uint64_t addr, uint32_t size, uint64_t data) "@0x%" PRIx64 " size %u: 0x%" PRIx64 -- 2.11.4.GIT