| commit | fe0bd475aa31e60674f7f53b85dc293108026202 | |
| author | Max Filippov <jcmvbkbc@gmail.com> | |
| Wed, 5 Dec 2012 03:15:22 +0000 (5 07:15 +0400) | ||
| committer | Blue Swirl <blauwirbel@gmail.com> | |
| Sat, 8 Dec 2012 18:48:26 +0000 (8 18:48 +0000) | ||
| tree | e67f93a3470a0738eed141ebe5633872416b31a2 | treesnapshot (tar.gz zip) |
| parent | 4e41d2f5830a76d3fe92b3d3b18cc9f2ee927770 | commitdiff |
target-xtensa: restrict available SRs by enabled options
Beginning with the RA-2004.1 release, SR access instructions (rsr, wsr,
xsr) are associated with their corresponding SR and raise illegal opcode
exception in case the register is not configured for the core.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Beginning with the RA-2004.1 release, SR access instructions (rsr, wsr,
xsr) are associated with their corresponding SR and raise illegal opcode
exception in case the register is not configured for the core.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| target-xtensa/cpu.h | diffblobblamehistory | |
| target-xtensa/overlay_tool.h | diffblobblamehistory | |
| target-xtensa/translate.c | diffblobblamehistory |