| commit | faee5441a038898f64b335dbaecab102ba406552 | |
| author | Dylan Jhong <dylan@andestech.com> | |
| Tue, 19 Apr 2022 11:59:45 +0000 (19 19:59 +0800) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Fri, 22 Apr 2022 00:35:16 +0000 (22 10:35 +1000) | ||
| tree | 367c946d4c6b9f59f46b92f759307e8c5af75de9 | treesnapshot (tar.gz zip) |
| parent | 013577de8f52fc64d77d1c13d69150b5902420d9 | commitdiff |
hw/riscv: boot: Support 64bit fdt address.
The current riscv_load_fdt() forces fdt_load_addr to be placed at a dram address within 3GB,
but not all platforms have dram_base within 3GB.
This patch adds an exception for dram base not within 3GB,
which will place fdt at dram_end align 16MB.
riscv_setup_rom_reset_vec() also needs to be modified
Signed-off-by: Dylan Jhong <dylan@andestech.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220419115945.37945-1-dylan@andestech.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
The current riscv_load_fdt() forces fdt_load_addr to be placed at a dram address within 3GB,
but not all platforms have dram_base within 3GB.
This patch adds an exception for dram base not within 3GB,
which will place fdt at dram_end align 16MB.
riscv_setup_rom_reset_vec() also needs to be modified
Signed-off-by: Dylan Jhong <dylan@andestech.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220419115945.37945-1-dylan@andestech.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
| hw/riscv/boot.c | diffblobblamehistory | |
| include/hw/riscv/boot.h | diffblobblamehistory |