| commit | f7cfb2a176208d3b5139a2e792b40edf1adb43b4 | |
| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | |
| Thu, 5 Apr 2007 23:14:23 +0000 (5 23:14 +0000) | ||
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | |
| Thu, 5 Apr 2007 23:14:23 +0000 (5 23:14 +0000) | ||
| tree | e8d411ece526a47140f58225bfc4b7b751230783 | treesnapshot (tar.gz zip) |
| parent | fb82fea06403d7d7b064b9ef7acc9c62dcd52850 | commitdiff |
64bit MIPS FPUs have 32 registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2610 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2610 c046a42c-6fe2-441c-8c8c-71466251a162
| target-mips/cpu.h | diffblobblamehistory |