| commit | ea63e2c358948287acf99c411d1821aa13bc1f61 | |
| author | Nathan Froyd <froydnj@codesourcery.com> | |
| Tue, 8 Dec 2009 16:06:24 +0000 (8 08:06 -0800) | ||
| committer | Aurelien Jarno <aurelien@aurel32.net> | |
| Sun, 13 Dec 2009 19:20:19 +0000 (13 20:20 +0100) | ||
| tree | e87e3fc05a41ba8e98eaa79dcff48bf4492479f9 | treesnapshot (tar.gz zip) |
| parent | 32188a03dae09c8a02bc72f26ece4a98183cc787 | commitdiff |
target-mips: move ROTR and ROTRV inside gen_shift_{imm, }
It's easier to implement mips16 shift instructions if we're not
examining the opcode inside gen_shift_{imm,}. So move ROTR and ROTRV
and do the special-case handling of SRL and SRLV inside decode_opc.
Likewise for their 64-bit counterparts.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
It's easier to implement mips16 shift instructions if we're not
examining the opcode inside gen_shift_{imm,}. So move ROTR and ROTRV
and do the special-case handling of SRL and SRLV inside decode_opc.
Likewise for their 64-bit counterparts.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| target-mips/translate.c | diffblobblamehistory |