| commit | c1e0371442bf3a7e42ad53c2a3d816ed7099f81d | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 21 Jan 2016 14:15:09 +0000 (21 14:15 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Thu, 21 Jan 2016 14:15:09 +0000 (21 14:15 +0000) | ||
| tree | 82a4702083105ecf507d5472c39ea2d2977641b7 | treesnapshot (tar.gz zip) |
| parent | e393f339af87da7210f6c86902b321df6a2e8bf5 | commitdiff |
target-arm: ignore ELR_ELx[1] for exception return to 32-bit ARM mode
The architecture requires that for an exception return to AArch32 the
low bits of ELR_ELx are ignored when the PC is set from them:
* if returning to Thumb mode, ignore ELR_ELx[0]
* if returning to ARM mode, ignore ELR_ELx[1:0]
We were only squashing bit 0; also squash bit 1 if the SPSR T bit
indicates this is a return to ARM code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
The architecture requires that for an exception return to AArch32 the
low bits of ELR_ELx are ignored when the PC is set from them:
* if returning to Thumb mode, ignore ELR_ELx[0]
* if returning to ARM mode, ignore ELR_ELx[1:0]
We were only squashing bit 0; also squash bit 1 if the SPSR T bit
indicates this is a return to ARM code.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
| target-arm/op_helper.c | diffblobblamehistory |