aspeed/i2c: Fix receive done interrupt handling
commitbb626e5b43df996a19b53cb6033b25d83f7b2e73
authorGuenter Roeck <linux@roeck-us.net>
Tue, 25 Sep 2018 13:02:31 +0000 (25 14:02 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 25 Sep 2018 13:14:07 +0000 (25 14:14 +0100)
tree28bcc994833126369ce0298eb53ffacec9ccb38e
parent7bd9c60d4e0d113a8a4428bcbddc5aa9d41d1edc
aspeed/i2c: Fix receive done interrupt handling

The AST2500 datasheet says:

I2CD10 Interrupt Status Register
       bit 2 Receive Done Interrupt status
             S/W needs to clear this status bit to allow next data receiving

The Rx interrupt done interrupt status bit needs to be cleared
explicitly before the next byte can be received, and must therefore
not be auto-cleared. Also, receiving the next byte must be delayed
until the bit has been cleared.

Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20180914063506.20815-4-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/i2c/aspeed_i2c.c