| commit | b3d4520585eb445affc4f46b979a3970d99e87d8 | |
| author | Matheus Ferst <matheus.ferst@eldorado.org.br> | |
| Wed, 30 Mar 2022 17:59:32 +0000 (30 14:59 -0300) | ||
| committer | Daniel Henrique Barboza <danielhb413@gmail.com> | |
| Wed, 20 Apr 2022 21:00:30 +0000 (20 18:00 -0300) | ||
| tree | 7abfa1a35550181d324d03c615cc496319cf2220 | treesnapshot (tar.gz zip) |
| parent | 67332e07187bee210e9c7d03b2b4c6f6ab79c2a4 | commitdiff |
target/ppc: implement xscvqp[su]qz
Implement the following PowerISA v3.1 instructions:
xscvqpsqz: VSX Scalar Convert with round to zero Quad-Precision to
Signed Quadword
xscvqpuqz: VSX Scalar Convert with round to zero Quad-Precision to
Unsigned Quadword
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220330175932.6995-9-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Implement the following PowerISA v3.1 instructions:
xscvqpsqz: VSX Scalar Convert with round to zero Quad-Precision to
Signed Quadword
xscvqpuqz: VSX Scalar Convert with round to zero Quad-Precision to
Unsigned Quadword
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220330175932.6995-9-matheus.ferst@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
| target/ppc/fpu_helper.c | diffblobblamehistory | |
| target/ppc/helper.h | diffblobblamehistory | |
| target/ppc/insn32.decode | diffblobblamehistory | |
| target/ppc/translate/vsx-impl.c.inc | diffblobblamehistory |