| commit | b0d2b7d0f084f6b33acf7c722790da683916fee3 | |
| author | Peter Maydell <peter.maydell@linaro.org> | |
| Sat, 4 Jan 2014 22:15:45 +0000 (4 22:15 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 7 Jan 2014 19:17:59 +0000 (7 19:17 +0000) | ||
| tree | b54464113094ead3227aa55fde63c3de0aba7358 | treesnapshot (tar.gz zip) |
| parent | fea505221eaf87889000378d4d33ad0dfd5f4d9d | commitdiff |
target-arm: A64: Implement minimal set of EL0-visible sysregs
Implement an initial minimal set of EL0-visible system registers:
* NZCV
* FPCR
* FPSR
* CTR_EL0
* DCZID_EL0
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Implement an initial minimal set of EL0-visible system registers:
* NZCV
* FPCR
* FPSR
* CTR_EL0
* DCZID_EL0
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
| target-arm/cpu.h | diffblobblamehistory | |
| target-arm/helper.c | diffblobblamehistory | |
| target-arm/translate-a64.c | diffblobblamehistory |