| commit | a4157b80242bf1c8aa0ee77aae7458ba79012d5d | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Fri, 26 Jun 2020 03:31:15 +0000 (25 20:31 -0700) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 26 Jun 2020 13:31:12 +0000 (26 14:31 +0100) | ||
| tree | c3a992e89559363dda7aeb22ca3a941ba2cad793 | treesnapshot (tar.gz zip) |
| parent | 6439d67fc944cf29de94a160e9450a2063c7b515 | commitdiff |
target/arm: Restrict the values of DCZID.BS under TCG
We can simplify our DC_ZVA if we recognize that the largest BS
that we actually use in system mode is 64. Let us just assert
that it fits within TARGET_PAGE_SIZE.
For DC_GVA and STZGM, we want to be able to write whole bytes
of tag memory, so assert that BS is >= 2 * TAG_GRANULE, or 32.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
We can simplify our DC_ZVA if we recognize that the largest BS
that we actually use in system mode is 64. Let us just assert
that it fits within TARGET_PAGE_SIZE.
For DC_GVA and STZGM, we want to be able to write whole bytes
of tag memory, so assert that BS is >= 2 * TAG_GRANULE, or 32.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200626033144.790098-18-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/cpu.c | diffblobblamehistory |