target/i386: Raise #GP on unaligned m128 accesses when required.
commit958e1dd1300f37f18b2161dfb4eb806fc8c19b44
authorPaolo Bonzini <pbonzini@redhat.com>
Sat, 17 Sep 2022 22:27:12 +0000 (18 00:27 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Sun, 18 Sep 2022 07:17:40 +0000 (18 09:17 +0200)
treef04a5eb24e64622d19aaf2f4e6cfdfa4b897fd47
parent52281c6d11ec68b802e8a264780df2c4b981e6bc
target/i386: Raise #GP on unaligned m128 accesses when required.

Many instructions which load/store 128-bit values are supposed to
raise #GP when the memory operand isn't 16-byte aligned. This includes:
 - Instructions explicitly requiring memory alignment (Exceptions Type 1
   in the "AVX and SSE Instruction Exception Specification" section of
   the SDM)
 - Legacy SSE instructions that load/store 128-bit values (Exceptions
   Types 2 and 4).

This change sets MO_ALIGN_16 on 128-bit memory accesses that require
16-byte alignment. It adds cpu_record_sigbus and cpu_do_unaligned_access
hooks that simulate a #GP exception in qemu-user and qemu-system,
respectively.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/217
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ricky Zhou <ricky@rzhou.org>
Message-Id: <20220830034816.57091-2-ricky@rzhou.org>
[Do not bother checking PREFIX_VEX, since AVX is not supported. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target/i386/tcg/excp_helper.c
target/i386/tcg/helper-tcg.h
target/i386/tcg/sysemu/excp_helper.c
target/i386/tcg/tcg-cpu.c
target/i386/tcg/translate.c
target/i386/tcg/user/excp_helper.c