target-arm: Provide correct syndrome information for cpreg access traps
commit8bcbf37caa87ba89bc391bad70039f942a98c7e3
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 15 Apr 2014 18:18:38 +0000 (15 19:18 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Thu, 17 Apr 2014 20:34:03 +0000 (17 21:34 +0100)
tree94ab31603ae7c7e5b75b42b954d2b803a42c3cc3
parentabf1172fc6dbc9564e25039434d444d9a9f1e88a
target-arm: Provide correct syndrome information for cpreg access traps

For exceptions taken to AArch64, if a coprocessor/system register
access fails due to a trap or enable bit then the syndrome information
must include details of the failing instruction (crn/crm/opc1/opc2
fields, etc). Make the decoder construct the syndrome information
at translate time so it can be passed at runtime to the access-check
helper function and used as required.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
target-arm/helper.h
target-arm/internals.h
target-arm/op_helper.c
target-arm/translate-a64.c
target-arm/translate.c