| commit | 86d0c457396b1a789fe2740f7bd8d476ea426298 | |
| author | Alistair Francis <alistair.francis@wdc.com> | |
| Mon, 20 Dec 2021 06:49:15 +0000 (20 16:49 +1000) | ||
| committer | Alistair Francis <alistair.francis@wdc.com> | |
| Sat, 8 Jan 2022 05:46:10 +0000 (8 15:46 +1000) | ||
| tree | 3686d6412105f9001154d72b264169300da395c6 | treesnapshot (tar.gz zip) |
| parent | ea7b5d5af6c3f994b10caa80c7f41964678eb2bb | commitdiff |
target/riscv: Fixup setting GVA
In preparation for adding support for the illegal instruction address
let's fixup the Hypervisor extension setting GVA logic and improve the
variable names.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 20211220064916.107241-3-alistair.francis@opensource.wdc.com
In preparation for adding support for the illegal instruction address
let's fixup the Hypervisor extension setting GVA logic and improve the
variable names.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 20211220064916.107241-3-alistair.francis@opensource.wdc.com
| target/riscv/cpu_helper.c | diffblobblamehistory |