| commit | 78cedfabd53b6f64e7e64fc84878d848e5df1d08 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Fri, 14 Feb 2020 19:46:40 +0000 (14 11:46 -0800) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 21 Feb 2020 16:07:00 +0000 (21 16:07 +0000) | ||
| tree | 71dc8e562872b79199cdf2f032664a0c2db93f0a | treesnapshot (tar.gz zip) |
| parent | 9e946eaba87916c43aaf0b2760bd5d5a54187c7b | commitdiff |
target/arm: Flush high bits of sve register after AdvSIMD EXT
Writes to AdvSIMD registers flush the bits above 128.
Buglink: https://bugs.launchpad.net/bugs/1863247
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200214194643.23317-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Writes to AdvSIMD registers flush the bits above 128.
Buglink: https://bugs.launchpad.net/bugs/1863247
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200214194643.23317-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/translate-a64.c | diffblobblamehistory |