target/riscv: rvv: Add tail agnostic for vector floating-point instructions
commit5eacf7d8a0fb19ea4d87eb678462fdb9a29b9190
authoreopXD <yueh.ting.chen@gmail.com>
Mon, 6 Jun 2022 06:16:56 +0000 (6 06:16 +0000)
committerAlistair Francis <alistair.francis@wdc.com>
Thu, 9 Jun 2022 23:31:42 +0000 (10 09:31 +1000)
tree16dfce6498e82a9b5c8aa4804c37969294206ba9
parent09106eed3041d5eb57dd768332146abe6d86e0e4
target/riscv: rvv: Add tail agnostic for vector floating-point instructions

Compares write mask registers, and so always operate under a tail-
agnostic policy.

Signed-off-by: eop Chen <eop.chen@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <165449614532.19704.7000832880482980398-12@git.sr.ht>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/insn_trans/trans_rvv.c.inc
target/riscv/vector_helper.c