target/arm: Fix VLDRB/H/W for predicated elements
commit41704cc262d6f451470c2074560bc7309064865d
authorPeter Maydell <peter.maydell@linaro.org>
Fri, 13 Aug 2021 16:11:49 +0000 (13 17:11 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Wed, 25 Aug 2021 09:48:49 +0000 (25 10:48 +0100)
tree33a779fe8b0a830ed58cfd90cb02bffd7ebd7cb7
parente3152d02da21ac6e2169b1bf104a2d0478664a4a
target/arm: Fix VLDRB/H/W for predicated elements

For vector loads, predicated elements are zeroed, instead of
retaining their previous values (as happens for most data
processing operations). This means we need to distinguish
"beat not executed due to ECI" (don't touch destination
element) from "beat executed but predicated out" (zero
destination element).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
target/arm/mve_helper.c