target/arm: Reject add/sub w/ shifted byte early
commit3a40518079ff295b560b9ee193768e57a25007e2
authorRichard Henderson <richard.henderson@linaro.org>
Fri, 27 May 2022 18:18:25 +0000 (27 11:18 -0700)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 30 May 2022 16:05:09 +0000 (30 17:05 +0100)
tree76343f1ad0aff4b4ed64f5ac422887beb4eaf722
parentc437c59ba1842dc8488316412cb071d57d8231d8
target/arm: Reject add/sub w/ shifted byte early

Remove the unparsed extractions in trans_ADD_zzi, trans_SUBR_zzi,
and do_zzi_sat which are intended to reject an 8-bit shift of an
8-bit constant for 8-bit element.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-73-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/sve.decode
target/arm/translate-sve.c