target/arm: Implement widening/narrowing MVE VLDR/VSTR insns
commit2fc6b7510c6859478264b7402ba01dbee86b7e46
authorPeter Maydell <peter.maydell@linaro.org>
Thu, 17 Jun 2021 12:15:46 +0000 (17 13:15 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Mon, 21 Jun 2021 15:49:38 +0000 (21 16:49 +0100)
tree3ab48286e845fc2af5136b963b407f19294857bb
parent507b6a500c2f0f6cf6182aa69efac4c20eb3e97b
target/arm: Implement widening/narrowing MVE VLDR/VSTR insns

Implement the variants of MVE VLDR (encodings T1, T2) which perform
"widening" loads where bytes or halfwords are loaded from memory and
zero or sign-extended into halfword or word length vector elements,
and the narrowing MVE VSTR (encodings T1, T2) where bytes or
halfwords are stored from halfword or word elements.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210617121628.20116-3-peter.maydell@linaro.org
target/arm/helper-mve.h
target/arm/mve.decode
target/arm/mve_helper.c
target/arm/translate-mve.c