| commit | 27ae5109a2ba8b6b679cce3e03e16570a34390a0 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Wed, 3 Oct 2018 17:10:17 +0000 (3 17:10 +0000) | ||
| committer | Richard Henderson <richard.henderson@linaro.org> | |
| Fri, 5 Oct 2018 17:57:41 +0000 (5 12:57 -0500) | ||
| tree | cb8ffeccb657de94ebd0ed9ab82e399b30f30721 | treesnapshot (tar.gz zip) |
| parent | 739df333dc8853ae6578492675a26a601d6be077 | commitdiff |
softfloat: Specialize udiv_qrnnd for ppc64
The ISA has a 128/64-bit division instruction, though it assumes the
low 64-bits of the numerator are 0, and so requires a bit more fixup
than a full 128-bit division insn.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
The ISA has a 128/64-bit division instruction, though it assumes the
low 64-bits of the numerator are 0, and so requires a bit more fixup
than a full 128-bit division insn.
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| include/fpu/softfloat-macros.h | diffblobblamehistory |