| commit | 217979d33e78ee64978295962c33d8525973c760 | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Sun, 20 Mar 2022 22:35:27 +0000 (20 23:35 +0100) | ||
| committer | Cédric Le Goater <clg@kaod.org> | |
| Sun, 20 Mar 2022 22:35:27 +0000 (20 23:35 +0100) | ||
| tree | 18eaa38530bbdda2c1d939384e582829e2ceef35 | treesnapshot (tar.gz zip) |
| parent | 9d1401b79463e74adbfac69d836789d4e103fb61 | commitdiff |
target/ppc: Replicate double->int32 result for some vector insns
Power ISA v3.1 formalizes the previously undefined result in
words 1 and 3 to be a copy of the result in words 0 and 2.
This affects: xscvdpsxws, xscvdpuxws, xvcvdpsxws, xvcvdpuxws.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/852
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[ clg: checkpatch fixes ]
Message-Id: <20220315053934.377519-1-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Power ISA v3.1 formalizes the previously undefined result in
words 1 and 3 to be a copy of the result in words 0 and 2.
This affects: xscvdpsxws, xscvdpuxws, xvcvdpsxws, xvcvdpuxws.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/852
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
[ clg: checkpatch fixes ]
Message-Id: <20220315053934.377519-1-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
| target/ppc/fpu_helper.c | diffblobblamehistory |