| commit | 1b08e436d0deaece35f7fa21aba6e6afe26cb3ac | |
| author | Shashi Mallela <shashi.mallela@linaro.org> | |
| Mon, 13 Sep 2021 15:07:23 +0000 (13 16:07 +0100) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Mon, 13 Sep 2021 15:07:54 +0000 (13 16:07 +0100) | ||
| tree | fd8926359e2e7f8da092e23f063d72919b03b9a8 | treesnapshot (tar.gz zip) |
| parent | 18f6290a6a95b2b16ab061bfd92274f6ba2a821b | commitdiff |
hw/intc: GICv3 ITS register definitions added
Defined descriptors for ITS device table,collection table and ITS
command queue entities.Implemented register read/write functions,
extract ITS table parameters and command queue parameters,extended
gicv3 common to capture qemu address space(which host the ITS table
platform memories required for subsequent ITS processing) and
initialize the same in ITS device.
Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Message-id: 20210910143951.92242-3-shashi.mallela@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Defined descriptors for ITS device table,collection table and ITS
command queue entities.Implemented register read/write functions,
extract ITS table parameters and command queue parameters,extended
gicv3 common to capture qemu address space(which host the ITS table
platform memories required for subsequent ITS processing) and
initialize the same in ITS device.
Signed-off-by: Shashi Mallela <shashi.mallela@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Tested-by: Neil Armstrong <narmstrong@baylibre.com>
Message-id: 20210910143951.92242-3-shashi.mallela@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>