aspeed/hace: Accumulative mode supported
commit0dbf6dc5766837c3d398c2d9f1d1695f4782fd77
authorJoel Stanley <joel@jms.id.au>
Thu, 30 Jun 2022 07:21:13 +0000 (30 09:21 +0200)
committerCédric Le Goater <clg@kaod.org>
Thu, 30 Jun 2022 07:21:13 +0000 (30 09:21 +0200)
tree07112b6cf8be26c4bcfdd4369f1717ba1caf2d9c
parent6743af9b10cca1a436d8cfc6a15a15fa5de2b1fd
aspeed/hace: Accumulative mode supported

While the HMAC mode is not modelled, the accumulative mode is.

Accumulative mode is enabled by setting one of the bits in the HMAC
engine command mode part of the register, so fix the unimplemented check
to only look at the upper of the two bits.

Fixes: 5cd7d8564a8b ("aspeed/hace: Support AST2600 HACE")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220627100816.125956-1-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
hw/misc/aspeed_hace.c