| commit | 0208def1cadd4f72f862e62548c2af268a543b20 | |
| author | Isaku Yamahata <yamahata@valinux.co.jp> | |
| Wed, 20 Oct 2010 08:18:51 +0000 (20 17:18 +0900) | ||
| committer | Michael S. Tsirkin <mst@redhat.com> | |
| Wed, 20 Oct 2010 10:05:10 +0000 (20 12:05 +0200) | ||
| tree | ead3f1ff630bb7befced3d273b819b68ddedb639 | treesnapshot (tar.gz zip) |
| parent | 6da6d29fa63ab7adcc2959355497a44654f3703e | commitdiff |
pci/bridge: fix pci_bridge_reset()
The lower bits of base/limit registers is RO and shouldn't be zero
cleared on reset. This patch fixes it.
In fact, the default value of base/limit registers aren't specified
in the spec. And some bridges disable forwarding on reset instead of
zeroing base/limit registers.
So introduce one function to disable bridge forwarding so that
such bridges can use it. It will be used later.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
The lower bits of base/limit registers is RO and shouldn't be zero
cleared on reset. This patch fixes it.
In fact, the default value of base/limit registers aren't specified
in the spec. And some bridges disable forwarding on reset instead of
zeroing base/limit registers.
So introduce one function to disable bridge forwarding so that
such bridges can use it. It will be used later.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
| hw/pci_bridge.c | diffblobblamehistory | |
| hw/pci_bridge.h | diffblobblamehistory |