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machine: rename MemoryHotplugState to DeviceMemoryState
[qemu.git] / hw / mips / mips_fulong2e.c
blob02fb2fdcc4a43b080ad6d4623d7f2ec97334c771
1 /*
2 * QEMU fulong 2e mini pc support
3 *
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
7 * This code is licensed under the GNU GPL v2.
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
11 */
12
13 /*
14 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
15 * http://www.linux-mips.org/wiki/Fulong
16 *
17 * Loongson 2e user manual:
18 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
19 */
20
21 #include "qemu/osdep.h"
22 #include "qapi/error.h"
23 #include "hw/hw.h"
24 #include "hw/i386/pc.h"
25 #include "hw/dma/i8257.h"
26 #include "hw/isa/superio.h"
27 #include "net/net.h"
28 #include "hw/boards.h"
29 #include "hw/i2c/smbus.h"
30 #include "hw/block/flash.h"
31 #include "hw/mips/mips.h"
32 #include "hw/mips/cpudevs.h"
33 #include "hw/pci/pci.h"
34 #include "audio/audio.h"
35 #include "qemu/log.h"
36 #include "hw/loader.h"
37 #include "hw/mips/bios.h"
38 #include "hw/ide.h"
39 #include "elf.h"
40 #include "hw/isa/vt82c686.h"
41 #include "hw/timer/mc146818rtc.h"
42 #include "hw/timer/i8254.h"
43 #include "exec/address-spaces.h"
44 #include "sysemu/qtest.h"
45 #include "qemu/error-report.h"
46
47 #define DEBUG_FULONG2E_INIT
48
49 #define ENVP_ADDR 0x80002000l
50 #define ENVP_NB_ENTRIES 16
51 #define ENVP_ENTRY_SIZE 256
52
53 #define MAX_IDE_BUS 2
54
55 /*
56 * PMON is not part of qemu and released with BSD license, anyone
57 * who want to build a pmon binary please first git-clone the source
58 * from the git repository at:
59 * http://www.loongson.cn/support/git/pmon
60 * Then follow the "Compile Guide" available at:
61 * http://dev.lemote.com/code/pmon
62 *
63 * Notes:
64 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
65 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
66 * in the "Compile Guide".
67 */
68 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
69
70 /* PCI SLOT in fulong 2e */
71 #define FULONG2E_VIA_SLOT 5
72 #define FULONG2E_ATI_SLOT 6
73 #define FULONG2E_RTL8139_SLOT 7
74
75 static struct _loaderparams {
76 int ram_size;
77 const char *kernel_filename;
78 const char *kernel_cmdline;
79 const char *initrd_filename;
80 } loaderparams;
81
82 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
83 const char *string, ...)
84 {
85 va_list ap;
86 int32_t table_addr;
87
88 if (index >= ENVP_NB_ENTRIES)
89 return;
90
91 if (string == NULL) {
92 prom_buf[index] = 0;
93 return;
94 }
95
96 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
97 prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
98
99 va_start(ap, string);
100 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
101 va_end(ap);
102 }
103
104 static int64_t load_kernel (CPUMIPSState *env)
105 {
106 int64_t kernel_entry, kernel_low, kernel_high;
107 int index = 0;
108 long kernel_size, initrd_size;
109 ram_addr_t initrd_offset;
110 uint32_t *prom_buf;
111 long prom_size;
112
113 kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
114 NULL, (uint64_t *)&kernel_entry,
115 (uint64_t *)&kernel_low, (uint64_t *)&kernel_high,
116 0, EM_MIPS, 1, 0);
117 if (kernel_size < 0) {
118 error_report("could not load kernel '%s': %s",
119 loaderparams.kernel_filename,
120 load_elf_strerror(kernel_size));
121 exit(1);
122 }
123
124 /* load initrd */
125 initrd_size = 0;
126 initrd_offset = 0;
127 if (loaderparams.initrd_filename) {
128 initrd_size = get_image_size (loaderparams.initrd_filename);
129 if (initrd_size > 0) {
130 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
131 if (initrd_offset + initrd_size > ram_size) {
132 error_report("memory too small for initial ram disk '%s'",
133 loaderparams.initrd_filename);
134 exit(1);
135 }
136 initrd_size = load_image_targphys(loaderparams.initrd_filename,
137 initrd_offset, ram_size - initrd_offset);
138 }
139 if (initrd_size == (target_ulong) -1) {
140 error_report("could not load initial ram disk '%s'",
141 loaderparams.initrd_filename);
142 exit(1);
143 }
144 }
145
146 /* Setup prom parameters. */
147 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
148 prom_buf = g_malloc(prom_size);
149
150 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
151 if (initrd_size > 0) {
152 prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s",
153 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
154 loaderparams.kernel_cmdline);
155 } else {
156 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
157 }
158
159 /* Setup minimum environment variables */
160 prom_set(prom_buf, index++, "busclock=33000000");
161 prom_set(prom_buf, index++, "cpuclock=100000000");
162 prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024);
163 prom_set(prom_buf, index++, "modetty0=38400n8r");
164 prom_set(prom_buf, index++, NULL);
165
166 rom_add_blob_fixed("prom", prom_buf, prom_size,
167 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
168
169 g_free(prom_buf);
170 return kernel_entry;
171 }
172
173 static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
174 {
175 uint32_t *p;
176
177 /* Small bootloader */
178 p = (uint32_t *) base;
179
180 stl_p(p++, 0x0bf00010); /* j 0x1fc00040 */
181 stl_p(p++, 0x00000000); /* nop */
182
183 /* Second part of the bootloader */
184 p = (uint32_t *) (base + 0x040);
185
186 stl_p(p++, 0x3c040000); /* lui a0, 0 */
187 stl_p(p++, 0x34840002); /* ori a0, a0, 2 */
188 stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
189 stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */
190 stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
191 stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
192 stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */
193 stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */
194 stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */;
195 stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */
196 stl_p(p++, 0x03e00008); /* jr ra */
197 stl_p(p++, 0x00000000); /* nop */
198 }
199
200
201 static void main_cpu_reset(void *opaque)
202 {
203 MIPSCPU *cpu = opaque;
204 CPUMIPSState *env = &cpu->env;
205
206 cpu_reset(CPU(cpu));
207 /* TODO: 2E reset stuff */
208 if (loaderparams.kernel_filename) {
209 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
210 }
211 }
212
213 static const uint8_t eeprom_spd[0x80] = {
214 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,
215 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,
216 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,
217 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,
218 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,
219 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
220 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
221 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,
222 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,
223 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,
224 0x20,0x30,0x20
225 };
226
227 static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
228 I2CBus **i2c_bus, ISABus **p_isa_bus)
229 {
230 qemu_irq *i8259;
231 ISABus *isa_bus;
232 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
233
234 isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
235 if (!isa_bus) {
236 fprintf(stderr, "vt82c686b_init error\n");
237 exit(1);
238 }
239 *p_isa_bus = isa_bus;
240 /* Interrupt controller */
241 /* The 8259 -> IP5 */
242 i8259 = i8259_init(isa_bus, intc);
243 isa_bus_irqs(isa_bus, i8259);
244 /* init other devices */
245 i8254_pit_init(isa_bus, 0x40, 0, NULL);
246 i8257_dma_init(isa_bus, 0);
247 /* Super I/O */
248 isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
249
250 ide_drive_get(hd, ARRAY_SIZE(hd));
251 vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
252
253 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
254 pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
255
256 *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
257
258 /* Audio support */
259 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
260 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
261 }
262
263 /* Network support */
264 static void network_init (PCIBus *pci_bus)
265 {
266 int i;
267
268 for(i = 0; i < nb_nics; i++) {
269 NICInfo *nd = &nd_table[i];
270 const char *default_devaddr = NULL;
271
272 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
273 /* The fulong board has a RTL8139 card using PCI SLOT 7 */
274 default_devaddr = "07";
275 }
276
277 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
278 }
279 }
280
281 static void mips_fulong2e_init(MachineState *machine)
282 {
283 ram_addr_t ram_size = machine->ram_size;
284 const char *kernel_filename = machine->kernel_filename;
285 const char *kernel_cmdline = machine->kernel_cmdline;
286 const char *initrd_filename = machine->initrd_filename;
287 char *filename;
288 MemoryRegion *address_space_mem = get_system_memory();
289 MemoryRegion *ram = g_new(MemoryRegion, 1);
290 MemoryRegion *bios = g_new(MemoryRegion, 1);
291 long bios_size;
292 int64_t kernel_entry;
293 PCIBus *pci_bus;
294 ISABus *isa_bus;
295 I2CBus *smbus;
296 MIPSCPU *cpu;
297 CPUMIPSState *env;
298
299 /* init CPUs */
300 cpu = MIPS_CPU(cpu_create(machine->cpu_type));
301 env = &cpu->env;
302
303 qemu_register_reset(main_cpu_reset, cpu);
304
305 /* fulong 2e has 256M ram. */
306 ram_size = 256 * 1024 * 1024;
307
308 /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */
309 bios_size = 1024 * 1024;
310
311 /* allocate RAM */
312 memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);
313 memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size,
314 &error_fatal);
315 memory_region_set_readonly(bios, true);
316
317 memory_region_add_subregion(address_space_mem, 0, ram);
318 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
319
320 /* We do not support flash operation, just loading pmon.bin as raw BIOS.
321 * Please use -L to set the BIOS path and -bios to set bios name. */
322
323 if (kernel_filename) {
324 loaderparams.ram_size = ram_size;
325 loaderparams.kernel_filename = kernel_filename;
326 loaderparams.kernel_cmdline = kernel_cmdline;
327 loaderparams.initrd_filename = initrd_filename;
328 kernel_entry = load_kernel (env);
329 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
330 } else {
331 if (bios_name == NULL) {
332 bios_name = FULONG_BIOSNAME;
333 }
334 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
335 if (filename) {
336 bios_size = load_image_targphys(filename, 0x1fc00000LL,
337 BIOS_SIZE);
338 g_free(filename);
339 } else {
340 bios_size = -1;
341 }
342
343 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
344 !kernel_filename && !qtest_enabled()) {
345 error_report("Could not load MIPS bios '%s'", bios_name);
346 exit(1);
347 }
348 }
349
350 /* Init internal devices */
351 cpu_mips_irq_init_cpu(cpu);
352 cpu_mips_clock_init(cpu);
353
354 /* North bridge, Bonito --> IP2 */
355 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
356
357 /* South bridge -> IP5 */
358 vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
359 &smbus, &isa_bus);
360
361 /* TODO: Populate SPD eeprom data. */
362 smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));
363
364 mc146818_rtc_init(isa_bus, 2000, NULL);
365
366 /* Network card: RTL8139D */
367 network_init(pci_bus);
368 }
369
370 static void mips_fulong2e_machine_init(MachineClass *mc)
371 {
372 mc->desc = "Fulong 2e mini pc";
373 mc->init = mips_fulong2e_init;
374 mc->block_default_type = IF_IDE;
375 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
376 }
377
378 DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
QEmu