2 * Arm PrimeCell PL061 General Purpose IO with additional
3 * Luminary Micro Stellaris bits.
5 * Copyright (c) 2007 CodeSourcery.
6 * Written by Paul Brook
8 * This code is licensed under the GPL.
11 #include "qemu/osdep.h"
12 #include "hw/sysbus.h"
14 //#define DEBUG_PL061 1
17 #define DPRINTF(fmt, ...) \
18 do { printf("pl061: " fmt , ## __VA_ARGS__); } while (0)
19 #define BADF(fmt, ...) \
20 do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
22 #define DPRINTF(fmt, ...) do {} while(0)
23 #define BADF(fmt, ...) \
24 do { fprintf(stderr, "pl061: error: " fmt , ## __VA_ARGS__);} while (0)
27 static const uint8_t pl061_id
[12] =
28 { 0x00, 0x00, 0x00, 0x00, 0x61, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
29 static const uint8_t pl061_id_luminary
[12] =
30 { 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1 };
32 #define TYPE_PL061 "pl061"
33 #define PL061(obj) OBJECT_CHECK(PL061State, (obj), TYPE_PL061)
35 typedef struct PL061State
{
36 SysBusDevice parent_obj
;
41 uint32_t old_out_data
;
63 const unsigned char *id
;
66 static const VMStateDescription vmstate_pl061
= {
69 .minimum_version_id
= 3,
70 .fields
= (VMStateField
[]) {
71 VMSTATE_UINT32(locked
, PL061State
),
72 VMSTATE_UINT32(data
, PL061State
),
73 VMSTATE_UINT32(old_out_data
, PL061State
),
74 VMSTATE_UINT32(old_in_data
, PL061State
),
75 VMSTATE_UINT32(dir
, PL061State
),
76 VMSTATE_UINT32(isense
, PL061State
),
77 VMSTATE_UINT32(ibe
, PL061State
),
78 VMSTATE_UINT32(iev
, PL061State
),
79 VMSTATE_UINT32(im
, PL061State
),
80 VMSTATE_UINT32(istate
, PL061State
),
81 VMSTATE_UINT32(afsel
, PL061State
),
82 VMSTATE_UINT32(dr2r
, PL061State
),
83 VMSTATE_UINT32(dr4r
, PL061State
),
84 VMSTATE_UINT32(dr8r
, PL061State
),
85 VMSTATE_UINT32(odr
, PL061State
),
86 VMSTATE_UINT32(pur
, PL061State
),
87 VMSTATE_UINT32(pdr
, PL061State
),
88 VMSTATE_UINT32(slr
, PL061State
),
89 VMSTATE_UINT32(den
, PL061State
),
90 VMSTATE_UINT32(cr
, PL061State
),
91 VMSTATE_UINT32(float_high
, PL061State
),
92 VMSTATE_UINT32_V(amsel
, PL061State
, 2),
97 static void pl061_update(PL061State
*s
)
104 DPRINTF("dir = %d, data = %d\n", s
->dir
, s
->data
);
106 /* Outputs float high. */
107 /* FIXME: This is board dependent. */
108 out
= (s
->data
& s
->dir
) | ~s
->dir
;
109 changed
= s
->old_out_data
^ out
;
111 s
->old_out_data
= out
;
112 for (i
= 0; i
< 8; i
++) {
114 if (changed
& mask
) {
115 DPRINTF("Set output %d = %d\n", i
, (out
& mask
) != 0);
116 qemu_set_irq(s
->out
[i
], (out
& mask
) != 0);
122 changed
= (s
->old_in_data
^ s
->data
) & ~s
->dir
;
124 s
->old_in_data
= s
->data
;
125 for (i
= 0; i
< 8; i
++) {
127 if (changed
& mask
) {
128 DPRINTF("Changed input %d = %d\n", i
, (s
->data
& mask
) != 0);
130 if (!(s
->isense
& mask
)) {
133 /* Any edge triggers the interrupt */
136 /* Edge is selected by IEV */
137 s
->istate
|= ~(s
->data
^ s
->iev
) & mask
;
144 /* Level interrupt */
145 s
->istate
|= ~(s
->data
^ s
->iev
) & s
->isense
;
147 DPRINTF("istate = %02X\n", s
->istate
);
149 qemu_set_irq(s
->irq
, (s
->istate
& s
->im
) != 0);
152 static uint64_t pl061_read(void *opaque
, hwaddr offset
,
155 PL061State
*s
= (PL061State
*)opaque
;
157 if (offset
>= 0xfd0 && offset
< 0x1000) {
158 return s
->id
[(offset
- 0xfd0) >> 2];
160 if (offset
< 0x400) {
161 return s
->data
& (offset
>> 2);
164 case 0x400: /* Direction */
166 case 0x404: /* Interrupt sense */
168 case 0x408: /* Interrupt both edges */
170 case 0x40c: /* Interrupt event */
172 case 0x410: /* Interrupt mask */
174 case 0x414: /* Raw interrupt status */
176 case 0x418: /* Masked interrupt status */
177 return s
->istate
& s
->im
;
178 case 0x420: /* Alternate function select */
180 case 0x500: /* 2mA drive */
182 case 0x504: /* 4mA drive */
184 case 0x508: /* 8mA drive */
186 case 0x50c: /* Open drain */
188 case 0x510: /* Pull-up */
190 case 0x514: /* Pull-down */
192 case 0x518: /* Slew rate control */
194 case 0x51c: /* Digital enable */
196 case 0x520: /* Lock */
198 case 0x524: /* Commit */
200 case 0x528: /* Analog mode select */
203 qemu_log_mask(LOG_GUEST_ERROR
,
204 "pl061_read: Bad offset %x\n", (int)offset
);
209 static void pl061_write(void *opaque
, hwaddr offset
,
210 uint64_t value
, unsigned size
)
212 PL061State
*s
= (PL061State
*)opaque
;
215 if (offset
< 0x400) {
216 mask
= (offset
>> 2) & s
->dir
;
217 s
->data
= (s
->data
& ~mask
) | (value
& mask
);
222 case 0x400: /* Direction */
223 s
->dir
= value
& 0xff;
225 case 0x404: /* Interrupt sense */
226 s
->isense
= value
& 0xff;
228 case 0x408: /* Interrupt both edges */
229 s
->ibe
= value
& 0xff;
231 case 0x40c: /* Interrupt event */
232 s
->iev
= value
& 0xff;
234 case 0x410: /* Interrupt mask */
235 s
->im
= value
& 0xff;
237 case 0x41c: /* Interrupt clear */
240 case 0x420: /* Alternate function select */
242 s
->afsel
= (s
->afsel
& ~mask
) | (value
& mask
);
244 case 0x500: /* 2mA drive */
245 s
->dr2r
= value
& 0xff;
247 case 0x504: /* 4mA drive */
248 s
->dr4r
= value
& 0xff;
250 case 0x508: /* 8mA drive */
251 s
->dr8r
= value
& 0xff;
253 case 0x50c: /* Open drain */
254 s
->odr
= value
& 0xff;
256 case 0x510: /* Pull-up */
257 s
->pur
= value
& 0xff;
259 case 0x514: /* Pull-down */
260 s
->pdr
= value
& 0xff;
262 case 0x518: /* Slew rate control */
263 s
->slr
= value
& 0xff;
265 case 0x51c: /* Digital enable */
266 s
->den
= value
& 0xff;
268 case 0x520: /* Lock */
269 s
->locked
= (value
!= 0xacce551);
271 case 0x524: /* Commit */
273 s
->cr
= value
& 0xff;
276 s
->amsel
= value
& 0xff;
279 qemu_log_mask(LOG_GUEST_ERROR
,
280 "pl061_write: Bad offset %x\n", (int)offset
);
285 static void pl061_reset(PL061State
*s
)
291 static void pl061_set_irq(void * opaque
, int irq
, int level
)
293 PL061State
*s
= (PL061State
*)opaque
;
297 if ((s
->dir
& mask
) == 0) {
305 static const MemoryRegionOps pl061_ops
= {
307 .write
= pl061_write
,
308 .endianness
= DEVICE_NATIVE_ENDIAN
,
311 static int pl061_initfn(SysBusDevice
*sbd
)
313 DeviceState
*dev
= DEVICE(sbd
);
314 PL061State
*s
= PL061(dev
);
316 memory_region_init_io(&s
->iomem
, OBJECT(s
), &pl061_ops
, s
, "pl061", 0x1000);
317 sysbus_init_mmio(sbd
, &s
->iomem
);
318 sysbus_init_irq(sbd
, &s
->irq
);
319 qdev_init_gpio_in(dev
, pl061_set_irq
, 8);
320 qdev_init_gpio_out(dev
, s
->out
, 8);
325 static void pl061_luminary_init(Object
*obj
)
327 PL061State
*s
= PL061(obj
);
329 s
->id
= pl061_id_luminary
;
332 static void pl061_init(Object
*obj
)
334 PL061State
*s
= PL061(obj
);
339 static void pl061_class_init(ObjectClass
*klass
, void *data
)
341 DeviceClass
*dc
= DEVICE_CLASS(klass
);
342 SysBusDeviceClass
*k
= SYS_BUS_DEVICE_CLASS(klass
);
344 k
->init
= pl061_initfn
;
345 dc
->vmsd
= &vmstate_pl061
;
348 static const TypeInfo pl061_info
= {
350 .parent
= TYPE_SYS_BUS_DEVICE
,
351 .instance_size
= sizeof(PL061State
),
352 .instance_init
= pl061_init
,
353 .class_init
= pl061_class_init
,
356 static const TypeInfo pl061_luminary_info
= {
357 .name
= "pl061_luminary",
358 .parent
= TYPE_PL061
,
359 .instance_init
= pl061_luminary_init
,
362 static void pl061_register_types(void)
364 type_register_static(&pl061_info
);
365 type_register_static(&pl061_luminary_info
);
368 type_init(pl061_register_types
)