2 * NVMe block driver based on vfio
4 * Copyright 2016 - 2018 Red Hat, Inc.
7 * Fam Zheng <famz@redhat.com>
8 * Paolo Bonzini <pbonzini@redhat.com>
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
14 #include "qemu/osdep.h"
15 #include <linux/vfio.h>
16 #include "qapi/error.h"
17 #include "qapi/qmp/qdict.h"
18 #include "qapi/qmp/qstring.h"
19 #include "qemu/error-report.h"
20 #include "qemu/main-loop.h"
21 #include "qemu/module.h"
22 #include "qemu/cutils.h"
23 #include "qemu/option.h"
24 #include "qemu/vfio-helpers.h"
25 #include "block/block_int.h"
26 #include "sysemu/replay.h"
29 #include "block/nvme.h"
31 #define NVME_SQ_ENTRY_BYTES 64
32 #define NVME_CQ_ENTRY_BYTES 16
33 #define NVME_QUEUE_SIZE 128
34 #define NVME_DOORBELL_SIZE 4096
37 * We have to leave one slot empty as that is the full queue case where
40 #define NVME_NUM_REQS (NVME_QUEUE_SIZE - 1)
42 typedef struct BDRVNVMeState BDRVNVMeState
;
44 /* Same index is used for queues and IRQs */
46 #define INDEX_IO(n) (1 + n)
48 /* This driver shares a single MSIX IRQ for the admin and I/O queues */
50 MSIX_SHARED_IRQ_IDX
= 0,
58 /* Hardware MMIO register */
59 volatile uint32_t *doorbell
;
63 BlockCompletionFunc
*cb
;
67 uint64_t prp_list_iova
;
68 int free_req_next
; /* q->reqs[] index of next free req */
74 /* Read from I/O code path, initialized under BQL */
78 /* Fields protected by BQL */
79 uint8_t *prp_list_pages
;
81 /* Fields protected by @lock */
82 CoQueue free_req_queue
;
86 NVMeRequest reqs
[NVME_NUM_REQS
];
90 /* Thread-safe, no lock necessary */
91 QEMUBH
*completion_bh
;
94 struct BDRVNVMeState
{
95 AioContext
*aio_context
;
98 /* Memory mapped registers */
103 /* The submission/completion queue pairs.
107 NVMeQueuePair
**queues
;
108 unsigned queue_count
;
110 /* How many uint32_t elements does each doorbell entry take. */
111 size_t doorbell_scale
;
112 bool write_cache_supported
;
113 EventNotifier irq_notifier
[MSIX_IRQ_COUNT
];
115 uint64_t nsze
; /* Namespace size reported by identify command */
116 int nsid
; /* The namespace id to read/write data. */
119 uint64_t max_transfer
;
122 bool supports_write_zeroes
;
123 bool supports_discard
;
125 CoMutex dma_map_lock
;
126 CoQueue dma_flush_queue
;
128 /* Total size of mapped qiov, accessed under dma_map_lock */
131 /* PCI address (required for nvme_refresh_filename()) */
135 uint64_t completion_errors
;
136 uint64_t aligned_accesses
;
137 uint64_t unaligned_accesses
;
141 #define NVME_BLOCK_OPT_DEVICE "device"
142 #define NVME_BLOCK_OPT_NAMESPACE "namespace"
144 static void nvme_process_completion_bh(void *opaque
);
146 static QemuOptsList runtime_opts
= {
148 .head
= QTAILQ_HEAD_INITIALIZER(runtime_opts
.head
),
151 .name
= NVME_BLOCK_OPT_DEVICE
,
152 .type
= QEMU_OPT_STRING
,
153 .help
= "NVMe PCI device address",
156 .name
= NVME_BLOCK_OPT_NAMESPACE
,
157 .type
= QEMU_OPT_NUMBER
,
158 .help
= "NVMe namespace",
160 { /* end of list */ }
164 /* Returns true on success, false on failure. */
165 static bool nvme_init_queue(BDRVNVMeState
*s
, NVMeQueue
*q
,
166 unsigned nentries
, size_t entry_bytes
, Error
**errp
)
171 bytes
= ROUND_UP(nentries
* entry_bytes
, qemu_real_host_page_size
);
172 q
->head
= q
->tail
= 0;
173 q
->queue
= qemu_try_memalign(qemu_real_host_page_size
, bytes
);
175 error_setg(errp
, "Cannot allocate queue");
178 memset(q
->queue
, 0, bytes
);
179 r
= qemu_vfio_dma_map(s
->vfio
, q
->queue
, bytes
, false, &q
->iova
);
181 error_setg(errp
, "Cannot map queue");
187 static void nvme_free_queue_pair(NVMeQueuePair
*q
)
189 trace_nvme_free_queue_pair(q
->index
, q
);
190 if (q
->completion_bh
) {
191 qemu_bh_delete(q
->completion_bh
);
193 qemu_vfree(q
->prp_list_pages
);
194 qemu_vfree(q
->sq
.queue
);
195 qemu_vfree(q
->cq
.queue
);
196 qemu_mutex_destroy(&q
->lock
);
200 static void nvme_free_req_queue_cb(void *opaque
)
202 NVMeQueuePair
*q
= opaque
;
204 qemu_mutex_lock(&q
->lock
);
205 while (qemu_co_enter_next(&q
->free_req_queue
, &q
->lock
)) {
206 /* Retry all pending requests */
208 qemu_mutex_unlock(&q
->lock
);
211 static NVMeQueuePair
*nvme_create_queue_pair(BDRVNVMeState
*s
,
212 AioContext
*aio_context
,
213 unsigned idx
, size_t size
,
218 uint64_t prp_list_iova
;
221 q
= g_try_new0(NVMeQueuePair
, 1);
225 trace_nvme_create_queue_pair(idx
, q
, size
, aio_context
,
226 event_notifier_get_fd(s
->irq_notifier
));
227 bytes
= QEMU_ALIGN_UP(s
->page_size
* NVME_NUM_REQS
,
228 qemu_real_host_page_size
);
229 q
->prp_list_pages
= qemu_try_memalign(qemu_real_host_page_size
, bytes
);
230 if (!q
->prp_list_pages
) {
233 memset(q
->prp_list_pages
, 0, bytes
);
234 qemu_mutex_init(&q
->lock
);
237 qemu_co_queue_init(&q
->free_req_queue
);
238 q
->completion_bh
= aio_bh_new(aio_context
, nvme_process_completion_bh
, q
);
239 r
= qemu_vfio_dma_map(s
->vfio
, q
->prp_list_pages
, bytes
,
240 false, &prp_list_iova
);
244 q
->free_req_head
= -1;
245 for (i
= 0; i
< NVME_NUM_REQS
; i
++) {
246 NVMeRequest
*req
= &q
->reqs
[i
];
248 req
->free_req_next
= q
->free_req_head
;
249 q
->free_req_head
= i
;
250 req
->prp_list_page
= q
->prp_list_pages
+ i
* s
->page_size
;
251 req
->prp_list_iova
= prp_list_iova
+ i
* s
->page_size
;
254 if (!nvme_init_queue(s
, &q
->sq
, size
, NVME_SQ_ENTRY_BYTES
, errp
)) {
257 q
->sq
.doorbell
= &s
->doorbells
[idx
* s
->doorbell_scale
].sq_tail
;
259 if (!nvme_init_queue(s
, &q
->cq
, size
, NVME_CQ_ENTRY_BYTES
, errp
)) {
262 q
->cq
.doorbell
= &s
->doorbells
[idx
* s
->doorbell_scale
].cq_head
;
266 nvme_free_queue_pair(q
);
271 static void nvme_kick(NVMeQueuePair
*q
)
273 BDRVNVMeState
*s
= q
->s
;
275 if (s
->plugged
|| !q
->need_kick
) {
278 trace_nvme_kick(s
, q
->index
);
279 assert(!(q
->sq
.tail
& 0xFF00));
280 /* Fence the write to submission queue entry before notifying the device. */
282 *q
->sq
.doorbell
= cpu_to_le32(q
->sq
.tail
);
283 q
->inflight
+= q
->need_kick
;
287 /* Find a free request element if any, otherwise:
288 * a) if in coroutine context, try to wait for one to become available;
289 * b) if not in coroutine, return NULL;
291 static NVMeRequest
*nvme_get_free_req(NVMeQueuePair
*q
)
295 qemu_mutex_lock(&q
->lock
);
297 while (q
->free_req_head
== -1) {
298 if (qemu_in_coroutine()) {
299 trace_nvme_free_req_queue_wait(q
->s
, q
->index
);
300 qemu_co_queue_wait(&q
->free_req_queue
, &q
->lock
);
302 qemu_mutex_unlock(&q
->lock
);
307 req
= &q
->reqs
[q
->free_req_head
];
308 q
->free_req_head
= req
->free_req_next
;
309 req
->free_req_next
= -1;
311 qemu_mutex_unlock(&q
->lock
);
316 static void nvme_put_free_req_locked(NVMeQueuePair
*q
, NVMeRequest
*req
)
318 req
->free_req_next
= q
->free_req_head
;
319 q
->free_req_head
= req
- q
->reqs
;
323 static void nvme_wake_free_req_locked(NVMeQueuePair
*q
)
325 if (!qemu_co_queue_empty(&q
->free_req_queue
)) {
326 replay_bh_schedule_oneshot_event(q
->s
->aio_context
,
327 nvme_free_req_queue_cb
, q
);
331 /* Insert a request in the freelist and wake waiters */
332 static void nvme_put_free_req_and_wake(NVMeQueuePair
*q
, NVMeRequest
*req
)
334 qemu_mutex_lock(&q
->lock
);
335 nvme_put_free_req_locked(q
, req
);
336 nvme_wake_free_req_locked(q
);
337 qemu_mutex_unlock(&q
->lock
);
340 static inline int nvme_translate_error(const NvmeCqe
*c
)
342 uint16_t status
= (le16_to_cpu(c
->status
) >> 1) & 0xFF;
344 trace_nvme_error(le32_to_cpu(c
->result
),
345 le16_to_cpu(c
->sq_head
),
346 le16_to_cpu(c
->sq_id
),
348 le16_to_cpu(status
));
363 static bool nvme_process_completion(NVMeQueuePair
*q
)
365 BDRVNVMeState
*s
= q
->s
;
366 bool progress
= false;
371 trace_nvme_process_completion(s
, q
->index
, q
->inflight
);
373 trace_nvme_process_completion_queue_plugged(s
, q
->index
);
378 * Support re-entrancy when a request cb() function invokes aio_poll().
379 * Pending completions must be visible to aio_poll() so that a cb()
380 * function can wait for the completion of another request.
382 * The aio_poll() loop will execute our BH and we'll resume completion
385 qemu_bh_schedule(q
->completion_bh
);
387 assert(q
->inflight
>= 0);
388 while (q
->inflight
) {
392 c
= (NvmeCqe
*)&q
->cq
.queue
[q
->cq
.head
* NVME_CQ_ENTRY_BYTES
];
393 if ((le16_to_cpu(c
->status
) & 0x1) == q
->cq_phase
) {
396 ret
= nvme_translate_error(c
);
398 s
->stats
.completion_errors
++;
400 q
->cq
.head
= (q
->cq
.head
+ 1) % NVME_QUEUE_SIZE
;
402 q
->cq_phase
= !q
->cq_phase
;
404 cid
= le16_to_cpu(c
->cid
);
405 if (cid
== 0 || cid
> NVME_QUEUE_SIZE
) {
406 warn_report("NVMe: Unexpected CID in completion queue: %"PRIu32
", "
407 "queue size: %u", cid
, NVME_QUEUE_SIZE
);
410 trace_nvme_complete_command(s
, q
->index
, cid
);
411 preq
= &q
->reqs
[cid
- 1];
413 assert(req
.cid
== cid
);
415 nvme_put_free_req_locked(q
, preq
);
416 preq
->cb
= preq
->opaque
= NULL
;
418 qemu_mutex_unlock(&q
->lock
);
419 req
.cb(req
.opaque
, ret
);
420 qemu_mutex_lock(&q
->lock
);
424 /* Notify the device so it can post more completions. */
426 *q
->cq
.doorbell
= cpu_to_le32(q
->cq
.head
);
427 nvme_wake_free_req_locked(q
);
430 qemu_bh_cancel(q
->completion_bh
);
435 static void nvme_process_completion_bh(void *opaque
)
437 NVMeQueuePair
*q
= opaque
;
440 * We're being invoked because a nvme_process_completion() cb() function
441 * called aio_poll(). The callback may be waiting for further completions
442 * so notify the device that it has space to fill in more completions now.
445 *q
->cq
.doorbell
= cpu_to_le32(q
->cq
.head
);
446 nvme_wake_free_req_locked(q
);
448 nvme_process_completion(q
);
451 static void nvme_trace_command(const NvmeCmd
*cmd
)
455 if (!trace_event_get_state_backends(TRACE_NVME_SUBMIT_COMMAND_RAW
)) {
458 for (i
= 0; i
< 8; ++i
) {
459 uint8_t *cmdp
= (uint8_t *)cmd
+ i
* 8;
460 trace_nvme_submit_command_raw(cmdp
[0], cmdp
[1], cmdp
[2], cmdp
[3],
461 cmdp
[4], cmdp
[5], cmdp
[6], cmdp
[7]);
465 static void nvme_submit_command(NVMeQueuePair
*q
, NVMeRequest
*req
,
466 NvmeCmd
*cmd
, BlockCompletionFunc cb
,
471 req
->opaque
= opaque
;
472 cmd
->cid
= cpu_to_le16(req
->cid
);
474 trace_nvme_submit_command(q
->s
, q
->index
, req
->cid
);
475 nvme_trace_command(cmd
);
476 qemu_mutex_lock(&q
->lock
);
477 memcpy((uint8_t *)q
->sq
.queue
+
478 q
->sq
.tail
* NVME_SQ_ENTRY_BYTES
, cmd
, sizeof(*cmd
));
479 q
->sq
.tail
= (q
->sq
.tail
+ 1) % NVME_QUEUE_SIZE
;
482 nvme_process_completion(q
);
483 qemu_mutex_unlock(&q
->lock
);
486 static void nvme_admin_cmd_sync_cb(void *opaque
, int ret
)
493 static int nvme_admin_cmd_sync(BlockDriverState
*bs
, NvmeCmd
*cmd
)
495 BDRVNVMeState
*s
= bs
->opaque
;
496 NVMeQueuePair
*q
= s
->queues
[INDEX_ADMIN
];
497 AioContext
*aio_context
= bdrv_get_aio_context(bs
);
499 int ret
= -EINPROGRESS
;
500 req
= nvme_get_free_req(q
);
504 nvme_submit_command(q
, req
, cmd
, nvme_admin_cmd_sync_cb
, &ret
);
506 AIO_WAIT_WHILE(aio_context
, ret
== -EINPROGRESS
);
510 /* Returns true on success, false on failure. */
511 static bool nvme_identify(BlockDriverState
*bs
, int namespace, Error
**errp
)
513 BDRVNVMeState
*s
= bs
->opaque
;
524 .opcode
= NVME_ADM_CMD_IDENTIFY
,
525 .cdw10
= cpu_to_le32(0x1),
527 size_t id_size
= QEMU_ALIGN_UP(sizeof(*id
), qemu_real_host_page_size
);
529 id
= qemu_try_memalign(qemu_real_host_page_size
, id_size
);
531 error_setg(errp
, "Cannot allocate buffer for identify response");
534 r
= qemu_vfio_dma_map(s
->vfio
, id
, id_size
, true, &iova
);
536 error_setg(errp
, "Cannot map buffer for DMA");
540 memset(id
, 0, id_size
);
541 cmd
.dptr
.prp1
= cpu_to_le64(iova
);
542 if (nvme_admin_cmd_sync(bs
, &cmd
)) {
543 error_setg(errp
, "Failed to identify controller");
547 if (le32_to_cpu(id
->ctrl
.nn
) < namespace) {
548 error_setg(errp
, "Invalid namespace");
551 s
->write_cache_supported
= le32_to_cpu(id
->ctrl
.vwc
) & 0x1;
552 s
->max_transfer
= (id
->ctrl
.mdts
? 1 << id
->ctrl
.mdts
: 0) * s
->page_size
;
553 /* For now the page list buffer per command is one page, to hold at most
554 * s->page_size / sizeof(uint64_t) entries. */
555 s
->max_transfer
= MIN_NON_ZERO(s
->max_transfer
,
556 s
->page_size
/ sizeof(uint64_t) * s
->page_size
);
558 oncs
= le16_to_cpu(id
->ctrl
.oncs
);
559 s
->supports_write_zeroes
= !!(oncs
& NVME_ONCS_WRITE_ZEROES
);
560 s
->supports_discard
= !!(oncs
& NVME_ONCS_DSM
);
562 memset(id
, 0, id_size
);
564 cmd
.nsid
= cpu_to_le32(namespace);
565 if (nvme_admin_cmd_sync(bs
, &cmd
)) {
566 error_setg(errp
, "Failed to identify namespace");
570 s
->nsze
= le64_to_cpu(id
->ns
.nsze
);
571 lbaf
= &id
->ns
.lbaf
[NVME_ID_NS_FLBAS_INDEX(id
->ns
.flbas
)];
573 if (NVME_ID_NS_DLFEAT_WRITE_ZEROES(id
->ns
.dlfeat
) &&
574 NVME_ID_NS_DLFEAT_READ_BEHAVIOR(id
->ns
.dlfeat
) ==
575 NVME_ID_NS_DLFEAT_READ_BEHAVIOR_ZEROES
) {
576 bs
->supported_write_flags
|= BDRV_REQ_MAY_UNMAP
;
580 error_setg(errp
, "Namespaces with metadata are not yet supported");
584 if (lbaf
->ds
< BDRV_SECTOR_BITS
|| lbaf
->ds
> 12 ||
585 (1 << lbaf
->ds
) > s
->page_size
)
587 error_setg(errp
, "Namespace has unsupported block size (2^%d)",
593 s
->blkshift
= lbaf
->ds
;
595 qemu_vfio_dma_unmap(s
->vfio
, id
);
601 static bool nvme_poll_queue(NVMeQueuePair
*q
)
603 bool progress
= false;
605 const size_t cqe_offset
= q
->cq
.head
* NVME_CQ_ENTRY_BYTES
;
606 NvmeCqe
*cqe
= (NvmeCqe
*)&q
->cq
.queue
[cqe_offset
];
608 trace_nvme_poll_queue(q
->s
, q
->index
);
610 * Do an early check for completions. q->lock isn't needed because
611 * nvme_process_completion() only runs in the event loop thread and
612 * cannot race with itself.
614 if ((le16_to_cpu(cqe
->status
) & 0x1) == q
->cq_phase
) {
618 qemu_mutex_lock(&q
->lock
);
619 while (nvme_process_completion(q
)) {
623 qemu_mutex_unlock(&q
->lock
);
628 static bool nvme_poll_queues(BDRVNVMeState
*s
)
630 bool progress
= false;
633 for (i
= 0; i
< s
->queue_count
; i
++) {
634 if (nvme_poll_queue(s
->queues
[i
])) {
641 static void nvme_handle_event(EventNotifier
*n
)
643 BDRVNVMeState
*s
= container_of(n
, BDRVNVMeState
,
644 irq_notifier
[MSIX_SHARED_IRQ_IDX
]);
646 trace_nvme_handle_event(s
);
647 event_notifier_test_and_clear(n
);
651 static bool nvme_add_io_queue(BlockDriverState
*bs
, Error
**errp
)
653 BDRVNVMeState
*s
= bs
->opaque
;
654 unsigned n
= s
->queue_count
;
657 unsigned queue_size
= NVME_QUEUE_SIZE
;
659 assert(n
<= UINT16_MAX
);
660 q
= nvme_create_queue_pair(s
, bdrv_get_aio_context(bs
),
661 n
, queue_size
, errp
);
666 .opcode
= NVME_ADM_CMD_CREATE_CQ
,
667 .dptr
.prp1
= cpu_to_le64(q
->cq
.iova
),
668 .cdw10
= cpu_to_le32(((queue_size
- 1) << 16) | n
),
669 .cdw11
= cpu_to_le32(NVME_CQ_IEN
| NVME_CQ_PC
),
671 if (nvme_admin_cmd_sync(bs
, &cmd
)) {
672 error_setg(errp
, "Failed to create CQ io queue [%u]", n
);
676 .opcode
= NVME_ADM_CMD_CREATE_SQ
,
677 .dptr
.prp1
= cpu_to_le64(q
->sq
.iova
),
678 .cdw10
= cpu_to_le32(((queue_size
- 1) << 16) | n
),
679 .cdw11
= cpu_to_le32(NVME_SQ_PC
| (n
<< 16)),
681 if (nvme_admin_cmd_sync(bs
, &cmd
)) {
682 error_setg(errp
, "Failed to create SQ io queue [%u]", n
);
685 s
->queues
= g_renew(NVMeQueuePair
*, s
->queues
, n
+ 1);
690 nvme_free_queue_pair(q
);
694 static bool nvme_poll_cb(void *opaque
)
696 EventNotifier
*e
= opaque
;
697 BDRVNVMeState
*s
= container_of(e
, BDRVNVMeState
,
698 irq_notifier
[MSIX_SHARED_IRQ_IDX
]);
700 return nvme_poll_queues(s
);
703 static int nvme_init(BlockDriverState
*bs
, const char *device
, int namespace,
706 BDRVNVMeState
*s
= bs
->opaque
;
708 AioContext
*aio_context
= bdrv_get_aio_context(bs
);
713 uint64_t deadline
, now
;
714 volatile NvmeBar
*regs
= NULL
;
716 qemu_co_mutex_init(&s
->dma_map_lock
);
717 qemu_co_queue_init(&s
->dma_flush_queue
);
718 s
->device
= g_strdup(device
);
720 s
->aio_context
= bdrv_get_aio_context(bs
);
721 ret
= event_notifier_init(&s
->irq_notifier
[MSIX_SHARED_IRQ_IDX
], 0);
723 error_setg(errp
, "Failed to init event notifier");
727 s
->vfio
= qemu_vfio_open_pci(device
, errp
);
733 regs
= qemu_vfio_pci_map_bar(s
->vfio
, 0, 0, sizeof(NvmeBar
),
734 PROT_READ
| PROT_WRITE
, errp
);
739 /* Perform initialize sequence as described in NVMe spec "7.6.1
740 * Initialization". */
742 cap
= le64_to_cpu(regs
->cap
);
743 trace_nvme_controller_capability_raw(cap
);
744 trace_nvme_controller_capability("Maximum Queue Entries Supported",
745 1 + NVME_CAP_MQES(cap
));
746 trace_nvme_controller_capability("Contiguous Queues Required",
748 trace_nvme_controller_capability("Doorbell Stride",
749 1 << (2 + NVME_CAP_DSTRD(cap
)));
750 trace_nvme_controller_capability("Subsystem Reset Supported",
751 NVME_CAP_NSSRS(cap
));
752 trace_nvme_controller_capability("Memory Page Size Minimum",
753 1 << (12 + NVME_CAP_MPSMIN(cap
)));
754 trace_nvme_controller_capability("Memory Page Size Maximum",
755 1 << (12 + NVME_CAP_MPSMAX(cap
)));
756 if (!NVME_CAP_CSS(cap
)) {
757 error_setg(errp
, "Device doesn't support NVMe command set");
762 s
->page_size
= 1u << (12 + NVME_CAP_MPSMIN(cap
));
763 s
->doorbell_scale
= (4 << NVME_CAP_DSTRD(cap
)) / sizeof(uint32_t);
764 bs
->bl
.opt_mem_alignment
= s
->page_size
;
765 bs
->bl
.request_alignment
= s
->page_size
;
766 timeout_ms
= MIN(500 * NVME_CAP_TO(cap
), 30000);
768 ver
= le32_to_cpu(regs
->vs
);
769 trace_nvme_controller_spec_version(extract32(ver
, 16, 16),
770 extract32(ver
, 8, 8),
771 extract32(ver
, 0, 8));
773 /* Reset device to get a clean state. */
774 regs
->cc
= cpu_to_le32(le32_to_cpu(regs
->cc
) & 0xFE);
775 /* Wait for CSTS.RDY = 0. */
776 deadline
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) + timeout_ms
* SCALE_MS
;
777 while (NVME_CSTS_RDY(le32_to_cpu(regs
->csts
))) {
778 if (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) > deadline
) {
779 error_setg(errp
, "Timeout while waiting for device to reset (%"
787 s
->bar0_wo_map
= qemu_vfio_pci_map_bar(s
->vfio
, 0, 0,
788 sizeof(NvmeBar
) + NVME_DOORBELL_SIZE
,
790 s
->doorbells
= (void *)((uintptr_t)s
->bar0_wo_map
+ sizeof(NvmeBar
));
796 /* Set up admin queue. */
797 s
->queues
= g_new(NVMeQueuePair
*, 1);
798 q
= nvme_create_queue_pair(s
, aio_context
, 0, NVME_QUEUE_SIZE
, errp
);
803 s
->queues
[INDEX_ADMIN
] = q
;
805 QEMU_BUILD_BUG_ON((NVME_QUEUE_SIZE
- 1) & 0xF000);
806 regs
->aqa
= cpu_to_le32(((NVME_QUEUE_SIZE
- 1) << AQA_ACQS_SHIFT
) |
807 ((NVME_QUEUE_SIZE
- 1) << AQA_ASQS_SHIFT
));
808 regs
->asq
= cpu_to_le64(q
->sq
.iova
);
809 regs
->acq
= cpu_to_le64(q
->cq
.iova
);
811 /* After setting up all control registers we can enable device now. */
812 regs
->cc
= cpu_to_le32((ctz32(NVME_CQ_ENTRY_BYTES
) << CC_IOCQES_SHIFT
) |
813 (ctz32(NVME_SQ_ENTRY_BYTES
) << CC_IOSQES_SHIFT
) |
815 /* Wait for CSTS.RDY = 1. */
816 now
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
817 deadline
= now
+ timeout_ms
* SCALE_MS
;
818 while (!NVME_CSTS_RDY(le32_to_cpu(regs
->csts
))) {
819 if (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) > deadline
) {
820 error_setg(errp
, "Timeout while waiting for device to start (%"
828 ret
= qemu_vfio_pci_init_irq(s
->vfio
, s
->irq_notifier
,
829 VFIO_PCI_MSIX_IRQ_INDEX
, errp
);
833 aio_set_event_notifier(bdrv_get_aio_context(bs
),
834 &s
->irq_notifier
[MSIX_SHARED_IRQ_IDX
],
835 false, nvme_handle_event
, nvme_poll_cb
);
837 if (!nvme_identify(bs
, namespace, errp
)) {
842 /* Set up command queues. */
843 if (!nvme_add_io_queue(bs
, errp
)) {
848 qemu_vfio_pci_unmap_bar(s
->vfio
, 0, (void *)regs
, 0, sizeof(NvmeBar
));
851 /* Cleaning up is done in nvme_file_open() upon error. */
855 /* Parse a filename in the format of nvme://XXXX:XX:XX.X/X. Example:
857 * nvme://0000:44:00.0/1
859 * where the "nvme://" is a fixed form of the protocol prefix, the middle part
860 * is the PCI address, and the last part is the namespace number starting from
861 * 1 according to the NVMe spec. */
862 static void nvme_parse_filename(const char *filename
, QDict
*options
,
865 int pref
= strlen("nvme://");
867 if (strlen(filename
) > pref
&& !strncmp(filename
, "nvme://", pref
)) {
868 const char *tmp
= filename
+ pref
;
870 const char *namespace;
872 const char *slash
= strchr(tmp
, '/');
874 qdict_put_str(options
, NVME_BLOCK_OPT_DEVICE
, tmp
);
877 device
= g_strndup(tmp
, slash
- tmp
);
878 qdict_put_str(options
, NVME_BLOCK_OPT_DEVICE
, device
);
880 namespace = slash
+ 1;
881 if (*namespace && qemu_strtoul(namespace, NULL
, 10, &ns
)) {
882 error_setg(errp
, "Invalid namespace '%s', positive number expected",
886 qdict_put_str(options
, NVME_BLOCK_OPT_NAMESPACE
,
887 *namespace ? namespace : "1");
891 static int nvme_enable_disable_write_cache(BlockDriverState
*bs
, bool enable
,
895 BDRVNVMeState
*s
= bs
->opaque
;
897 .opcode
= NVME_ADM_CMD_SET_FEATURES
,
898 .nsid
= cpu_to_le32(s
->nsid
),
899 .cdw10
= cpu_to_le32(0x06),
900 .cdw11
= cpu_to_le32(enable
? 0x01 : 0x00),
903 ret
= nvme_admin_cmd_sync(bs
, &cmd
);
905 error_setg(errp
, "Failed to configure NVMe write cache");
910 static void nvme_close(BlockDriverState
*bs
)
912 BDRVNVMeState
*s
= bs
->opaque
;
914 for (unsigned i
= 0; i
< s
->queue_count
; ++i
) {
915 nvme_free_queue_pair(s
->queues
[i
]);
918 aio_set_event_notifier(bdrv_get_aio_context(bs
),
919 &s
->irq_notifier
[MSIX_SHARED_IRQ_IDX
],
921 event_notifier_cleanup(&s
->irq_notifier
[MSIX_SHARED_IRQ_IDX
]);
922 qemu_vfio_pci_unmap_bar(s
->vfio
, 0, s
->bar0_wo_map
,
923 0, sizeof(NvmeBar
) + NVME_DOORBELL_SIZE
);
924 qemu_vfio_close(s
->vfio
);
929 static int nvme_file_open(BlockDriverState
*bs
, QDict
*options
, int flags
,
936 BDRVNVMeState
*s
= bs
->opaque
;
938 bs
->supported_write_flags
= BDRV_REQ_FUA
;
940 opts
= qemu_opts_create(&runtime_opts
, NULL
, 0, &error_abort
);
941 qemu_opts_absorb_qdict(opts
, options
, &error_abort
);
942 device
= qemu_opt_get(opts
, NVME_BLOCK_OPT_DEVICE
);
944 error_setg(errp
, "'" NVME_BLOCK_OPT_DEVICE
"' option is required");
949 namespace = qemu_opt_get_number(opts
, NVME_BLOCK_OPT_NAMESPACE
, 1);
950 ret
= nvme_init(bs
, device
, namespace, errp
);
955 if (flags
& BDRV_O_NOCACHE
) {
956 if (!s
->write_cache_supported
) {
958 "NVMe controller doesn't support write cache configuration");
961 ret
= nvme_enable_disable_write_cache(bs
, !(flags
& BDRV_O_NOCACHE
),
974 static int64_t nvme_getlength(BlockDriverState
*bs
)
976 BDRVNVMeState
*s
= bs
->opaque
;
977 return s
->nsze
<< s
->blkshift
;
980 static uint32_t nvme_get_blocksize(BlockDriverState
*bs
)
982 BDRVNVMeState
*s
= bs
->opaque
;
983 assert(s
->blkshift
>= BDRV_SECTOR_BITS
&& s
->blkshift
<= 12);
984 return UINT32_C(1) << s
->blkshift
;
987 static int nvme_probe_blocksizes(BlockDriverState
*bs
, BlockSizes
*bsz
)
989 uint32_t blocksize
= nvme_get_blocksize(bs
);
990 bsz
->phys
= blocksize
;
991 bsz
->log
= blocksize
;
995 /* Called with s->dma_map_lock */
996 static coroutine_fn
int nvme_cmd_unmap_qiov(BlockDriverState
*bs
,
1000 BDRVNVMeState
*s
= bs
->opaque
;
1002 s
->dma_map_count
-= qiov
->size
;
1003 if (!s
->dma_map_count
&& !qemu_co_queue_empty(&s
->dma_flush_queue
)) {
1004 r
= qemu_vfio_dma_reset_temporary(s
->vfio
);
1006 qemu_co_queue_restart_all(&s
->dma_flush_queue
);
1012 /* Called with s->dma_map_lock */
1013 static coroutine_fn
int nvme_cmd_map_qiov(BlockDriverState
*bs
, NvmeCmd
*cmd
,
1014 NVMeRequest
*req
, QEMUIOVector
*qiov
)
1016 BDRVNVMeState
*s
= bs
->opaque
;
1017 uint64_t *pagelist
= req
->prp_list_page
;
1022 assert(QEMU_IS_ALIGNED(qiov
->size
, s
->page_size
));
1023 assert(qiov
->size
/ s
->page_size
<= s
->page_size
/ sizeof(uint64_t));
1024 for (i
= 0; i
< qiov
->niov
; ++i
) {
1027 size_t len
= QEMU_ALIGN_UP(qiov
->iov
[i
].iov_len
,
1028 qemu_real_host_page_size
);
1030 r
= qemu_vfio_dma_map(s
->vfio
,
1031 qiov
->iov
[i
].iov_base
,
1035 * In addition to the -ENOMEM error, the VFIO_IOMMU_MAP_DMA
1036 * ioctl returns -ENOSPC to signal the user exhausted the DMA
1037 * mappings available for a container since Linux kernel commit
1038 * 492855939bdb ("vfio/type1: Limit DMA mappings per container",
1039 * April 2019, see CVE-2019-3882).
1041 * This block driver already handles this error path by checking
1042 * for the -ENOMEM error, so we directly replace -ENOSPC by
1043 * -ENOMEM. Beside, -ENOSPC has a specific meaning for blockdev
1044 * coroutines: it triggers BLOCKDEV_ON_ERROR_ENOSPC and
1045 * BLOCK_ERROR_ACTION_STOP which stops the VM, asking the operator
1046 * to add more storage to the blockdev. Not something we can do
1047 * easily with an IOMMU :)
1051 if (r
== -ENOMEM
&& retry
) {
1053 * We exhausted the DMA mappings available for our container:
1054 * recycle the volatile IOVA mappings.
1057 trace_nvme_dma_flush_queue_wait(s
);
1058 if (s
->dma_map_count
) {
1059 trace_nvme_dma_map_flush(s
);
1060 qemu_co_queue_wait(&s
->dma_flush_queue
, &s
->dma_map_lock
);
1062 r
= qemu_vfio_dma_reset_temporary(s
->vfio
);
1073 for (j
= 0; j
< qiov
->iov
[i
].iov_len
/ s
->page_size
; j
++) {
1074 pagelist
[entries
++] = cpu_to_le64(iova
+ j
* s
->page_size
);
1076 trace_nvme_cmd_map_qiov_iov(s
, i
, qiov
->iov
[i
].iov_base
,
1077 qiov
->iov
[i
].iov_len
/ s
->page_size
);
1080 s
->dma_map_count
+= qiov
->size
;
1082 assert(entries
<= s
->page_size
/ sizeof(uint64_t));
1087 cmd
->dptr
.prp1
= pagelist
[0];
1091 cmd
->dptr
.prp1
= pagelist
[0];
1092 cmd
->dptr
.prp2
= pagelist
[1];
1095 cmd
->dptr
.prp1
= pagelist
[0];
1096 cmd
->dptr
.prp2
= cpu_to_le64(req
->prp_list_iova
+ sizeof(uint64_t));
1099 trace_nvme_cmd_map_qiov(s
, cmd
, req
, qiov
, entries
);
1100 for (i
= 0; i
< entries
; ++i
) {
1101 trace_nvme_cmd_map_qiov_pages(s
, i
, pagelist
[i
]);
1105 /* No need to unmap [0 - i) iovs even if we've failed, since we don't
1106 * increment s->dma_map_count. This is okay for fixed mapping memory areas
1107 * because they are already mapped before calling this function; for
1108 * temporary mappings, a later nvme_cmd_(un)map_qiov will reclaim by
1109 * calling qemu_vfio_dma_reset_temporary when necessary. */
1119 static void nvme_rw_cb_bh(void *opaque
)
1121 NVMeCoData
*data
= opaque
;
1122 qemu_coroutine_enter(data
->co
);
1125 static void nvme_rw_cb(void *opaque
, int ret
)
1127 NVMeCoData
*data
= opaque
;
1130 /* The rw coroutine hasn't yielded, don't try to enter. */
1133 replay_bh_schedule_oneshot_event(data
->ctx
, nvme_rw_cb_bh
, data
);
1136 static coroutine_fn
int nvme_co_prw_aligned(BlockDriverState
*bs
,
1137 uint64_t offset
, uint64_t bytes
,
1143 BDRVNVMeState
*s
= bs
->opaque
;
1144 NVMeQueuePair
*ioq
= s
->queues
[INDEX_IO(0)];
1147 uint32_t cdw12
= (((bytes
>> s
->blkshift
) - 1) & 0xFFFF) |
1148 (flags
& BDRV_REQ_FUA
? 1 << 30 : 0);
1150 .opcode
= is_write
? NVME_CMD_WRITE
: NVME_CMD_READ
,
1151 .nsid
= cpu_to_le32(s
->nsid
),
1152 .cdw10
= cpu_to_le32((offset
>> s
->blkshift
) & 0xFFFFFFFF),
1153 .cdw11
= cpu_to_le32(((offset
>> s
->blkshift
) >> 32) & 0xFFFFFFFF),
1154 .cdw12
= cpu_to_le32(cdw12
),
1157 .ctx
= bdrv_get_aio_context(bs
),
1158 .ret
= -EINPROGRESS
,
1161 trace_nvme_prw_aligned(s
, is_write
, offset
, bytes
, flags
, qiov
->niov
);
1162 assert(s
->queue_count
> 1);
1163 req
= nvme_get_free_req(ioq
);
1166 qemu_co_mutex_lock(&s
->dma_map_lock
);
1167 r
= nvme_cmd_map_qiov(bs
, &cmd
, req
, qiov
);
1168 qemu_co_mutex_unlock(&s
->dma_map_lock
);
1170 nvme_put_free_req_and_wake(ioq
, req
);
1173 nvme_submit_command(ioq
, req
, &cmd
, nvme_rw_cb
, &data
);
1175 data
.co
= qemu_coroutine_self();
1176 while (data
.ret
== -EINPROGRESS
) {
1177 qemu_coroutine_yield();
1180 qemu_co_mutex_lock(&s
->dma_map_lock
);
1181 r
= nvme_cmd_unmap_qiov(bs
, qiov
);
1182 qemu_co_mutex_unlock(&s
->dma_map_lock
);
1187 trace_nvme_rw_done(s
, is_write
, offset
, bytes
, data
.ret
);
1191 static inline bool nvme_qiov_aligned(BlockDriverState
*bs
,
1192 const QEMUIOVector
*qiov
)
1195 BDRVNVMeState
*s
= bs
->opaque
;
1197 for (i
= 0; i
< qiov
->niov
; ++i
) {
1198 if (!QEMU_PTR_IS_ALIGNED(qiov
->iov
[i
].iov_base
,
1199 qemu_real_host_page_size
) ||
1200 !QEMU_IS_ALIGNED(qiov
->iov
[i
].iov_len
, qemu_real_host_page_size
)) {
1201 trace_nvme_qiov_unaligned(qiov
, i
, qiov
->iov
[i
].iov_base
,
1202 qiov
->iov
[i
].iov_len
, s
->page_size
);
1209 static int nvme_co_prw(BlockDriverState
*bs
, uint64_t offset
, uint64_t bytes
,
1210 QEMUIOVector
*qiov
, bool is_write
, int flags
)
1212 BDRVNVMeState
*s
= bs
->opaque
;
1214 uint8_t *buf
= NULL
;
1215 QEMUIOVector local_qiov
;
1216 size_t len
= QEMU_ALIGN_UP(bytes
, qemu_real_host_page_size
);
1217 assert(QEMU_IS_ALIGNED(offset
, s
->page_size
));
1218 assert(QEMU_IS_ALIGNED(bytes
, s
->page_size
));
1219 assert(bytes
<= s
->max_transfer
);
1220 if (nvme_qiov_aligned(bs
, qiov
)) {
1221 s
->stats
.aligned_accesses
++;
1222 return nvme_co_prw_aligned(bs
, offset
, bytes
, qiov
, is_write
, flags
);
1224 s
->stats
.unaligned_accesses
++;
1225 trace_nvme_prw_buffered(s
, offset
, bytes
, qiov
->niov
, is_write
);
1226 buf
= qemu_try_memalign(qemu_real_host_page_size
, len
);
1231 qemu_iovec_init(&local_qiov
, 1);
1233 qemu_iovec_to_buf(qiov
, 0, buf
, bytes
);
1235 qemu_iovec_add(&local_qiov
, buf
, bytes
);
1236 r
= nvme_co_prw_aligned(bs
, offset
, bytes
, &local_qiov
, is_write
, flags
);
1237 qemu_iovec_destroy(&local_qiov
);
1238 if (!r
&& !is_write
) {
1239 qemu_iovec_from_buf(qiov
, 0, buf
, bytes
);
1245 static coroutine_fn
int nvme_co_preadv(BlockDriverState
*bs
,
1246 uint64_t offset
, uint64_t bytes
,
1247 QEMUIOVector
*qiov
, int flags
)
1249 return nvme_co_prw(bs
, offset
, bytes
, qiov
, false, flags
);
1252 static coroutine_fn
int nvme_co_pwritev(BlockDriverState
*bs
,
1253 uint64_t offset
, uint64_t bytes
,
1254 QEMUIOVector
*qiov
, int flags
)
1256 return nvme_co_prw(bs
, offset
, bytes
, qiov
, true, flags
);
1259 static coroutine_fn
int nvme_co_flush(BlockDriverState
*bs
)
1261 BDRVNVMeState
*s
= bs
->opaque
;
1262 NVMeQueuePair
*ioq
= s
->queues
[INDEX_IO(0)];
1265 .opcode
= NVME_CMD_FLUSH
,
1266 .nsid
= cpu_to_le32(s
->nsid
),
1269 .ctx
= bdrv_get_aio_context(bs
),
1270 .ret
= -EINPROGRESS
,
1273 assert(s
->queue_count
> 1);
1274 req
= nvme_get_free_req(ioq
);
1276 nvme_submit_command(ioq
, req
, &cmd
, nvme_rw_cb
, &data
);
1278 data
.co
= qemu_coroutine_self();
1279 if (data
.ret
== -EINPROGRESS
) {
1280 qemu_coroutine_yield();
1287 static coroutine_fn
int nvme_co_pwrite_zeroes(BlockDriverState
*bs
,
1290 BdrvRequestFlags flags
)
1292 BDRVNVMeState
*s
= bs
->opaque
;
1293 NVMeQueuePair
*ioq
= s
->queues
[INDEX_IO(0)];
1296 uint32_t cdw12
= ((bytes
>> s
->blkshift
) - 1) & 0xFFFF;
1298 if (!s
->supports_write_zeroes
) {
1303 .opcode
= NVME_CMD_WRITE_ZEROES
,
1304 .nsid
= cpu_to_le32(s
->nsid
),
1305 .cdw10
= cpu_to_le32((offset
>> s
->blkshift
) & 0xFFFFFFFF),
1306 .cdw11
= cpu_to_le32(((offset
>> s
->blkshift
) >> 32) & 0xFFFFFFFF),
1310 .ctx
= bdrv_get_aio_context(bs
),
1311 .ret
= -EINPROGRESS
,
1314 if (flags
& BDRV_REQ_MAY_UNMAP
) {
1318 if (flags
& BDRV_REQ_FUA
) {
1322 cmd
.cdw12
= cpu_to_le32(cdw12
);
1324 trace_nvme_write_zeroes(s
, offset
, bytes
, flags
);
1325 assert(s
->queue_count
> 1);
1326 req
= nvme_get_free_req(ioq
);
1329 nvme_submit_command(ioq
, req
, &cmd
, nvme_rw_cb
, &data
);
1331 data
.co
= qemu_coroutine_self();
1332 while (data
.ret
== -EINPROGRESS
) {
1333 qemu_coroutine_yield();
1336 trace_nvme_rw_done(s
, true, offset
, bytes
, data
.ret
);
1341 static int coroutine_fn
nvme_co_pdiscard(BlockDriverState
*bs
,
1345 BDRVNVMeState
*s
= bs
->opaque
;
1346 NVMeQueuePair
*ioq
= s
->queues
[INDEX_IO(0)];
1349 QEMUIOVector local_qiov
;
1353 .opcode
= NVME_CMD_DSM
,
1354 .nsid
= cpu_to_le32(s
->nsid
),
1355 .cdw10
= cpu_to_le32(0), /*number of ranges - 0 based*/
1356 .cdw11
= cpu_to_le32(1 << 2), /*deallocate bit*/
1360 .ctx
= bdrv_get_aio_context(bs
),
1361 .ret
= -EINPROGRESS
,
1364 if (!s
->supports_discard
) {
1368 assert(s
->queue_count
> 1);
1370 buf
= qemu_try_memalign(s
->page_size
, s
->page_size
);
1374 memset(buf
, 0, s
->page_size
);
1375 buf
->nlb
= cpu_to_le32(bytes
>> s
->blkshift
);
1376 buf
->slba
= cpu_to_le64(offset
>> s
->blkshift
);
1379 qemu_iovec_init(&local_qiov
, 1);
1380 qemu_iovec_add(&local_qiov
, buf
, 4096);
1382 req
= nvme_get_free_req(ioq
);
1385 qemu_co_mutex_lock(&s
->dma_map_lock
);
1386 ret
= nvme_cmd_map_qiov(bs
, &cmd
, req
, &local_qiov
);
1387 qemu_co_mutex_unlock(&s
->dma_map_lock
);
1390 nvme_put_free_req_and_wake(ioq
, req
);
1394 trace_nvme_dsm(s
, offset
, bytes
);
1396 nvme_submit_command(ioq
, req
, &cmd
, nvme_rw_cb
, &data
);
1398 data
.co
= qemu_coroutine_self();
1399 while (data
.ret
== -EINPROGRESS
) {
1400 qemu_coroutine_yield();
1403 qemu_co_mutex_lock(&s
->dma_map_lock
);
1404 ret
= nvme_cmd_unmap_qiov(bs
, &local_qiov
);
1405 qemu_co_mutex_unlock(&s
->dma_map_lock
);
1412 trace_nvme_dsm_done(s
, offset
, bytes
, ret
);
1414 qemu_iovec_destroy(&local_qiov
);
1420 static int coroutine_fn
nvme_co_truncate(BlockDriverState
*bs
, int64_t offset
,
1421 bool exact
, PreallocMode prealloc
,
1422 BdrvRequestFlags flags
, Error
**errp
)
1426 if (prealloc
!= PREALLOC_MODE_OFF
) {
1427 error_setg(errp
, "Unsupported preallocation mode '%s'",
1428 PreallocMode_str(prealloc
));
1432 cur_length
= nvme_getlength(bs
);
1433 if (offset
!= cur_length
&& exact
) {
1434 error_setg(errp
, "Cannot resize NVMe devices");
1436 } else if (offset
> cur_length
) {
1437 error_setg(errp
, "Cannot grow NVMe devices");
1444 static int nvme_reopen_prepare(BDRVReopenState
*reopen_state
,
1445 BlockReopenQueue
*queue
, Error
**errp
)
1450 static void nvme_refresh_filename(BlockDriverState
*bs
)
1452 BDRVNVMeState
*s
= bs
->opaque
;
1454 snprintf(bs
->exact_filename
, sizeof(bs
->exact_filename
), "nvme://%s/%i",
1455 s
->device
, s
->nsid
);
1458 static void nvme_refresh_limits(BlockDriverState
*bs
, Error
**errp
)
1460 BDRVNVMeState
*s
= bs
->opaque
;
1462 bs
->bl
.opt_mem_alignment
= s
->page_size
;
1463 bs
->bl
.request_alignment
= s
->page_size
;
1464 bs
->bl
.max_transfer
= s
->max_transfer
;
1467 static void nvme_detach_aio_context(BlockDriverState
*bs
)
1469 BDRVNVMeState
*s
= bs
->opaque
;
1471 for (unsigned i
= 0; i
< s
->queue_count
; i
++) {
1472 NVMeQueuePair
*q
= s
->queues
[i
];
1474 qemu_bh_delete(q
->completion_bh
);
1475 q
->completion_bh
= NULL
;
1478 aio_set_event_notifier(bdrv_get_aio_context(bs
),
1479 &s
->irq_notifier
[MSIX_SHARED_IRQ_IDX
],
1483 static void nvme_attach_aio_context(BlockDriverState
*bs
,
1484 AioContext
*new_context
)
1486 BDRVNVMeState
*s
= bs
->opaque
;
1488 s
->aio_context
= new_context
;
1489 aio_set_event_notifier(new_context
, &s
->irq_notifier
[MSIX_SHARED_IRQ_IDX
],
1490 false, nvme_handle_event
, nvme_poll_cb
);
1492 for (unsigned i
= 0; i
< s
->queue_count
; i
++) {
1493 NVMeQueuePair
*q
= s
->queues
[i
];
1496 aio_bh_new(new_context
, nvme_process_completion_bh
, q
);
1500 static void nvme_aio_plug(BlockDriverState
*bs
)
1502 BDRVNVMeState
*s
= bs
->opaque
;
1503 assert(!s
->plugged
);
1507 static void nvme_aio_unplug(BlockDriverState
*bs
)
1509 BDRVNVMeState
*s
= bs
->opaque
;
1512 for (unsigned i
= INDEX_IO(0); i
< s
->queue_count
; i
++) {
1513 NVMeQueuePair
*q
= s
->queues
[i
];
1514 qemu_mutex_lock(&q
->lock
);
1516 nvme_process_completion(q
);
1517 qemu_mutex_unlock(&q
->lock
);
1521 static void nvme_register_buf(BlockDriverState
*bs
, void *host
, size_t size
)
1524 BDRVNVMeState
*s
= bs
->opaque
;
1526 ret
= qemu_vfio_dma_map(s
->vfio
, host
, size
, false, NULL
);
1528 /* FIXME: we may run out of IOVA addresses after repeated
1529 * bdrv_register_buf/bdrv_unregister_buf, because nvme_vfio_dma_unmap
1530 * doesn't reclaim addresses for fixed mappings. */
1531 error_report("nvme_register_buf failed: %s", strerror(-ret
));
1535 static void nvme_unregister_buf(BlockDriverState
*bs
, void *host
)
1537 BDRVNVMeState
*s
= bs
->opaque
;
1539 qemu_vfio_dma_unmap(s
->vfio
, host
);
1542 static BlockStatsSpecific
*nvme_get_specific_stats(BlockDriverState
*bs
)
1544 BlockStatsSpecific
*stats
= g_new(BlockStatsSpecific
, 1);
1545 BDRVNVMeState
*s
= bs
->opaque
;
1547 stats
->driver
= BLOCKDEV_DRIVER_NVME
;
1548 stats
->u
.nvme
= (BlockStatsSpecificNvme
) {
1549 .completion_errors
= s
->stats
.completion_errors
,
1550 .aligned_accesses
= s
->stats
.aligned_accesses
,
1551 .unaligned_accesses
= s
->stats
.unaligned_accesses
,
1557 static const char *const nvme_strong_runtime_opts
[] = {
1558 NVME_BLOCK_OPT_DEVICE
,
1559 NVME_BLOCK_OPT_NAMESPACE
,
1564 static BlockDriver bdrv_nvme
= {
1565 .format_name
= "nvme",
1566 .protocol_name
= "nvme",
1567 .instance_size
= sizeof(BDRVNVMeState
),
1569 .bdrv_co_create_opts
= bdrv_co_create_opts_simple
,
1570 .create_opts
= &bdrv_create_opts_simple
,
1572 .bdrv_parse_filename
= nvme_parse_filename
,
1573 .bdrv_file_open
= nvme_file_open
,
1574 .bdrv_close
= nvme_close
,
1575 .bdrv_getlength
= nvme_getlength
,
1576 .bdrv_probe_blocksizes
= nvme_probe_blocksizes
,
1577 .bdrv_co_truncate
= nvme_co_truncate
,
1579 .bdrv_co_preadv
= nvme_co_preadv
,
1580 .bdrv_co_pwritev
= nvme_co_pwritev
,
1582 .bdrv_co_pwrite_zeroes
= nvme_co_pwrite_zeroes
,
1583 .bdrv_co_pdiscard
= nvme_co_pdiscard
,
1585 .bdrv_co_flush_to_disk
= nvme_co_flush
,
1586 .bdrv_reopen_prepare
= nvme_reopen_prepare
,
1588 .bdrv_refresh_filename
= nvme_refresh_filename
,
1589 .bdrv_refresh_limits
= nvme_refresh_limits
,
1590 .strong_runtime_opts
= nvme_strong_runtime_opts
,
1591 .bdrv_get_specific_stats
= nvme_get_specific_stats
,
1593 .bdrv_detach_aio_context
= nvme_detach_aio_context
,
1594 .bdrv_attach_aio_context
= nvme_attach_aio_context
,
1596 .bdrv_io_plug
= nvme_aio_plug
,
1597 .bdrv_io_unplug
= nvme_aio_unplug
,
1599 .bdrv_register_buf
= nvme_register_buf
,
1600 .bdrv_unregister_buf
= nvme_unregister_buf
,
1603 static void bdrv_nvme_init(void)
1605 bdrv_register(&bdrv_nvme
);
1608 block_init(bdrv_nvme_init
);