2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 * Copyright (c) 2010 David Gibson, IBM Corporation.
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 #include "qemu/osdep.h"
28 #include "qapi/error.h"
29 #include "qapi/visitor.h"
30 #include "sysemu/sysemu.h"
31 #include "sysemu/numa.h"
34 #include "hw/fw-path-provider.h"
37 #include "sysemu/device_tree.h"
38 #include "sysemu/block-backend.h"
39 #include "sysemu/cpus.h"
40 #include "sysemu/hw_accel.h"
42 #include "migration/misc.h"
43 #include "migration/global_state.h"
44 #include "migration/register.h"
45 #include "mmu-hash64.h"
46 #include "mmu-book3s-v3.h"
47 #include "cpu-models.h"
50 #include "hw/boards.h"
51 #include "hw/ppc/ppc.h"
52 #include "hw/loader.h"
54 #include "hw/ppc/fdt.h"
55 #include "hw/ppc/spapr.h"
56 #include "hw/ppc/spapr_vio.h"
57 #include "hw/pci-host/spapr.h"
58 #include "hw/ppc/xics.h"
59 #include "hw/pci/msi.h"
61 #include "hw/pci/pci.h"
62 #include "hw/scsi/scsi.h"
63 #include "hw/virtio/virtio-scsi.h"
64 #include "hw/virtio/vhost-scsi-common.h"
66 #include "exec/address-spaces.h"
68 #include "qemu/config-file.h"
69 #include "qemu/error-report.h"
72 #include "hw/intc/intc.h"
74 #include "hw/compat.h"
75 #include "qemu/cutils.h"
76 #include "hw/ppc/spapr_cpu_core.h"
77 #include "hw/mem/memory-device.h"
81 /* SLOF memory layout:
83 * SLOF raw image loaded at 0, copies its romfs right below the flat
84 * device-tree, then position SLOF itself 31M below that
86 * So we set FW_OVERHEAD to 40MB which should account for all of that
89 * We load our kernel at 4M, leaving space for SLOF initial image
91 #define FDT_MAX_SIZE 0x100000
92 #define RTAS_MAX_SIZE 0x10000
93 #define RTAS_MAX_ADDR 0x80000000 /* RTAS must stay below that */
94 #define FW_MAX_SIZE 0x400000
95 #define FW_FILE_NAME "slof.bin"
96 #define FW_OVERHEAD 0x2800000
97 #define KERNEL_LOAD_ADDR FW_MAX_SIZE
99 #define MIN_RMA_SLOF 128UL
101 #define PHANDLE_XICP 0x00001111
103 /* These two functions implement the VCPU id numbering: one to compute them
104 * all and one to identify thread 0 of a VCORE. Any change to the first one
105 * is likely to have an impact on the second one, so let's keep them close.
107 static int spapr_vcpu_id(sPAPRMachineState
*spapr
, int cpu_index
)
111 (cpu_index
/ smp_threads
) * spapr
->vsmt
+ cpu_index
% smp_threads
;
113 static bool spapr_is_thread0_in_vcore(sPAPRMachineState
*spapr
,
117 return spapr_get_vcpu_id(cpu
) % spapr
->vsmt
== 0;
120 static ICSState
*spapr_ics_create(sPAPRMachineState
*spapr
,
121 const char *type_ics
,
122 int nr_irqs
, Error
**errp
)
124 Error
*local_err
= NULL
;
127 obj
= object_new(type_ics
);
128 object_property_add_child(OBJECT(spapr
), "ics", obj
, &error_abort
);
129 object_property_add_const_link(obj
, ICS_PROP_XICS
, OBJECT(spapr
),
131 object_property_set_int(obj
, nr_irqs
, "nr-irqs", &local_err
);
135 object_property_set_bool(obj
, true, "realized", &local_err
);
140 return ICS_SIMPLE(obj
);
143 error_propagate(errp
, local_err
);
147 static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque
)
149 /* Dummy entries correspond to unused ICPState objects in older QEMUs,
150 * and newer QEMUs don't even have them. In both cases, we don't want
151 * to send anything on the wire.
156 static const VMStateDescription pre_2_10_vmstate_dummy_icp
= {
157 .name
= "icp/server",
159 .minimum_version_id
= 1,
160 .needed
= pre_2_10_vmstate_dummy_icp_needed
,
161 .fields
= (VMStateField
[]) {
162 VMSTATE_UNUSED(4), /* uint32_t xirr */
163 VMSTATE_UNUSED(1), /* uint8_t pending_priority */
164 VMSTATE_UNUSED(1), /* uint8_t mfrr */
165 VMSTATE_END_OF_LIST()
169 static void pre_2_10_vmstate_register_dummy_icp(int i
)
171 vmstate_register(NULL
, i
, &pre_2_10_vmstate_dummy_icp
,
172 (void *)(uintptr_t) i
);
175 static void pre_2_10_vmstate_unregister_dummy_icp(int i
)
177 vmstate_unregister(NULL
, &pre_2_10_vmstate_dummy_icp
,
178 (void *)(uintptr_t) i
);
181 static int xics_max_server_number(sPAPRMachineState
*spapr
)
184 return DIV_ROUND_UP(max_cpus
* spapr
->vsmt
, smp_threads
);
187 static void xics_system_init(MachineState
*machine
, int nr_irqs
, Error
**errp
)
189 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
192 if (machine_kernel_irqchip_allowed(machine
) &&
193 !xics_kvm_init(spapr
, errp
)) {
194 spapr
->icp_type
= TYPE_KVM_ICP
;
195 spapr
->ics
= spapr_ics_create(spapr
, TYPE_ICS_KVM
, nr_irqs
, errp
);
197 if (machine_kernel_irqchip_required(machine
) && !spapr
->ics
) {
198 error_prepend(errp
, "kernel_irqchip requested but unavailable: ");
204 xics_spapr_init(spapr
);
205 spapr
->icp_type
= TYPE_ICP
;
206 spapr
->ics
= spapr_ics_create(spapr
, TYPE_ICS_SIMPLE
, nr_irqs
, errp
);
213 static int spapr_fixup_cpu_smt_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
,
217 uint32_t servers_prop
[smt_threads
];
218 uint32_t gservers_prop
[smt_threads
* 2];
219 int index
= spapr_get_vcpu_id(cpu
);
221 if (cpu
->compat_pvr
) {
222 ret
= fdt_setprop_cell(fdt
, offset
, "cpu-version", cpu
->compat_pvr
);
228 /* Build interrupt servers and gservers properties */
229 for (i
= 0; i
< smt_threads
; i
++) {
230 servers_prop
[i
] = cpu_to_be32(index
+ i
);
231 /* Hack, direct the group queues back to cpu 0 */
232 gservers_prop
[i
*2] = cpu_to_be32(index
+ i
);
233 gservers_prop
[i
*2 + 1] = 0;
235 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-server#s",
236 servers_prop
, sizeof(servers_prop
));
240 ret
= fdt_setprop(fdt
, offset
, "ibm,ppc-interrupt-gserver#s",
241 gservers_prop
, sizeof(gservers_prop
));
246 static int spapr_fixup_cpu_numa_dt(void *fdt
, int offset
, PowerPCCPU
*cpu
)
248 int index
= spapr_get_vcpu_id(cpu
);
249 uint32_t associativity
[] = {cpu_to_be32(0x5),
253 cpu_to_be32(cpu
->node_id
),
256 /* Advertise NUMA via ibm,associativity */
257 return fdt_setprop(fdt
, offset
, "ibm,associativity", associativity
,
258 sizeof(associativity
));
261 /* Populate the "ibm,pa-features" property */
262 static void spapr_populate_pa_features(sPAPRMachineState
*spapr
,
264 void *fdt
, int offset
,
267 uint8_t pa_features_206
[] = { 6, 0,
268 0xf6, 0x1f, 0xc7, 0x00, 0x80, 0xc0 };
269 uint8_t pa_features_207
[] = { 24, 0,
270 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0,
271 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
272 0x00, 0x00, 0x00, 0x00, 0x80, 0x00,
273 0x80, 0x00, 0x80, 0x00, 0x00, 0x00 };
274 uint8_t pa_features_300
[] = { 66, 0,
275 /* 0: MMU|FPU|SLB|RUN|DABR|NX, 1: fri[nzpm]|DABRX|SPRG3|SLB0|PP110 */
276 /* 2: VPM|DS205|PPR|DS202|DS206, 3: LSD|URG, SSO, 5: LE|CFAR|EB|LSQ */
277 0xf6, 0x1f, 0xc7, 0xc0, 0x80, 0xf0, /* 0 - 5 */
279 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, /* 6 - 11 */
281 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, /* 12 - 17 */
282 /* 18: Vec. Scalar, 20: Vec. XOR, 22: HTM */
283 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 18 - 23 */
284 /* 24: Ext. Dec, 26: 64 bit ftrs, 28: PM ftrs */
285 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 24 - 29 */
286 /* 30: MMR, 32: LE atomic, 34: EBB + ext EBB */
287 0x80, 0x00, 0x80, 0x00, 0xC0, 0x00, /* 30 - 35 */
288 /* 36: SPR SO, 38: Copy/Paste, 40: Radix MMU */
289 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 36 - 41 */
290 /* 42: PM, 44: PC RA, 46: SC vec'd */
291 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 42 - 47 */
292 /* 48: SIMD, 50: QP BFP, 52: String */
293 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 48 - 53 */
294 /* 54: DecFP, 56: DecI, 58: SHA */
295 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, /* 54 - 59 */
296 /* 60: NM atomic, 62: RNG */
297 0x80, 0x00, 0x80, 0x00, 0x00, 0x00, /* 60 - 65 */
299 uint8_t *pa_features
= NULL
;
302 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_2_06
, 0, cpu
->compat_pvr
)) {
303 pa_features
= pa_features_206
;
304 pa_size
= sizeof(pa_features_206
);
306 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_2_07
, 0, cpu
->compat_pvr
)) {
307 pa_features
= pa_features_207
;
308 pa_size
= sizeof(pa_features_207
);
310 if (ppc_check_compat(cpu
, CPU_POWERPC_LOGICAL_3_00
, 0, cpu
->compat_pvr
)) {
311 pa_features
= pa_features_300
;
312 pa_size
= sizeof(pa_features_300
);
318 if (ppc_hash64_has(cpu
, PPC_HASH64_CI_LARGEPAGE
)) {
320 * Note: we keep CI large pages off by default because a 64K capable
321 * guest provisioned with large pages might otherwise try to map a qemu
322 * framebuffer (or other kind of memory mapped PCI BAR) using 64K pages
323 * even if that qemu runs on a 4k host.
324 * We dd this bit back here if we are confident this is not an issue
326 pa_features
[3] |= 0x20;
328 if ((spapr_get_cap(spapr
, SPAPR_CAP_HTM
) != 0) && pa_size
> 24) {
329 pa_features
[24] |= 0x80; /* Transactional memory support */
331 if (legacy_guest
&& pa_size
> 40) {
332 /* Workaround for broken kernels that attempt (guest) radix
333 * mode when they can't handle it, if they see the radix bit set
334 * in pa-features. So hide it from them. */
335 pa_features
[40 + 2] &= ~0x80; /* Radix MMU */
338 _FDT((fdt_setprop(fdt
, offset
, "ibm,pa-features", pa_features
, pa_size
)));
341 static int spapr_fixup_cpu_dt(void *fdt
, sPAPRMachineState
*spapr
)
343 int ret
= 0, offset
, cpus_offset
;
346 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
349 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
350 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
351 int index
= spapr_get_vcpu_id(cpu
);
352 int compat_smt
= MIN(smp_threads
, ppc_compat_max_vthreads(cpu
));
354 if (!spapr_is_thread0_in_vcore(spapr
, cpu
)) {
358 snprintf(cpu_model
, 32, "%s@%x", dc
->fw_name
, index
);
360 cpus_offset
= fdt_path_offset(fdt
, "/cpus");
361 if (cpus_offset
< 0) {
362 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
363 if (cpus_offset
< 0) {
367 offset
= fdt_subnode_offset(fdt
, cpus_offset
, cpu_model
);
369 offset
= fdt_add_subnode(fdt
, cpus_offset
, cpu_model
);
375 ret
= fdt_setprop(fdt
, offset
, "ibm,pft-size",
376 pft_size_prop
, sizeof(pft_size_prop
));
381 if (nb_numa_nodes
> 1) {
382 ret
= spapr_fixup_cpu_numa_dt(fdt
, offset
, cpu
);
388 ret
= spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
, compat_smt
);
393 spapr_populate_pa_features(spapr
, cpu
, fdt
, offset
,
394 spapr
->cas_legacy_guest_workaround
);
399 static hwaddr
spapr_node0_size(MachineState
*machine
)
403 for (i
= 0; i
< nb_numa_nodes
; ++i
) {
404 if (numa_info
[i
].node_mem
) {
405 return MIN(pow2floor(numa_info
[i
].node_mem
),
410 return machine
->ram_size
;
413 static void add_str(GString
*s
, const gchar
*s1
)
415 g_string_append_len(s
, s1
, strlen(s1
) + 1);
418 static int spapr_populate_memory_node(void *fdt
, int nodeid
, hwaddr start
,
421 uint32_t associativity
[] = {
422 cpu_to_be32(0x4), /* length */
423 cpu_to_be32(0x0), cpu_to_be32(0x0),
424 cpu_to_be32(0x0), cpu_to_be32(nodeid
)
427 uint64_t mem_reg_property
[2];
430 mem_reg_property
[0] = cpu_to_be64(start
);
431 mem_reg_property
[1] = cpu_to_be64(size
);
433 sprintf(mem_name
, "memory@" TARGET_FMT_lx
, start
);
434 off
= fdt_add_subnode(fdt
, 0, mem_name
);
436 _FDT((fdt_setprop_string(fdt
, off
, "device_type", "memory")));
437 _FDT((fdt_setprop(fdt
, off
, "reg", mem_reg_property
,
438 sizeof(mem_reg_property
))));
439 _FDT((fdt_setprop(fdt
, off
, "ibm,associativity", associativity
,
440 sizeof(associativity
))));
444 static int spapr_populate_memory(sPAPRMachineState
*spapr
, void *fdt
)
446 MachineState
*machine
= MACHINE(spapr
);
447 hwaddr mem_start
, node_size
;
448 int i
, nb_nodes
= nb_numa_nodes
;
449 NodeInfo
*nodes
= numa_info
;
452 /* No NUMA nodes, assume there is just one node with whole RAM */
453 if (!nb_numa_nodes
) {
455 ramnode
.node_mem
= machine
->ram_size
;
459 for (i
= 0, mem_start
= 0; i
< nb_nodes
; ++i
) {
460 if (!nodes
[i
].node_mem
) {
463 if (mem_start
>= machine
->ram_size
) {
466 node_size
= nodes
[i
].node_mem
;
467 if (node_size
> machine
->ram_size
- mem_start
) {
468 node_size
= machine
->ram_size
- mem_start
;
472 /* spapr_machine_init() checks for rma_size <= node0_size
474 spapr_populate_memory_node(fdt
, i
, 0, spapr
->rma_size
);
475 mem_start
+= spapr
->rma_size
;
476 node_size
-= spapr
->rma_size
;
478 for ( ; node_size
; ) {
479 hwaddr sizetmp
= pow2floor(node_size
);
481 /* mem_start != 0 here */
482 if (ctzl(mem_start
) < ctzl(sizetmp
)) {
483 sizetmp
= 1ULL << ctzl(mem_start
);
486 spapr_populate_memory_node(fdt
, i
, mem_start
, sizetmp
);
487 node_size
-= sizetmp
;
488 mem_start
+= sizetmp
;
495 static void spapr_populate_cpu_dt(CPUState
*cs
, void *fdt
, int offset
,
496 sPAPRMachineState
*spapr
)
498 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
499 CPUPPCState
*env
= &cpu
->env
;
500 PowerPCCPUClass
*pcc
= POWERPC_CPU_GET_CLASS(cs
);
501 int index
= spapr_get_vcpu_id(cpu
);
502 uint32_t segs
[] = {cpu_to_be32(28), cpu_to_be32(40),
503 0xffffffff, 0xffffffff};
504 uint32_t tbfreq
= kvm_enabled() ? kvmppc_get_tbfreq()
505 : SPAPR_TIMEBASE_FREQ
;
506 uint32_t cpufreq
= kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
507 uint32_t page_sizes_prop
[64];
508 size_t page_sizes_prop_size
;
509 uint32_t vcpus_per_socket
= smp_threads
* smp_cores
;
510 uint32_t pft_size_prop
[] = {0, cpu_to_be32(spapr
->htab_shift
)};
511 int compat_smt
= MIN(smp_threads
, ppc_compat_max_vthreads(cpu
));
512 sPAPRDRConnector
*drc
;
514 uint32_t radix_AP_encodings
[PPC_PAGE_SIZES_MAX_SZ
];
517 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
, index
);
519 drc_index
= spapr_drc_index(drc
);
520 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,my-drc-index", drc_index
)));
523 _FDT((fdt_setprop_cell(fdt
, offset
, "reg", index
)));
524 _FDT((fdt_setprop_string(fdt
, offset
, "device_type", "cpu")));
526 _FDT((fdt_setprop_cell(fdt
, offset
, "cpu-version", env
->spr
[SPR_PVR
])));
527 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-block-size",
528 env
->dcache_line_size
)));
529 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-line-size",
530 env
->dcache_line_size
)));
531 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-block-size",
532 env
->icache_line_size
)));
533 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-line-size",
534 env
->icache_line_size
)));
536 if (pcc
->l1_dcache_size
) {
537 _FDT((fdt_setprop_cell(fdt
, offset
, "d-cache-size",
538 pcc
->l1_dcache_size
)));
540 warn_report("Unknown L1 dcache size for cpu");
542 if (pcc
->l1_icache_size
) {
543 _FDT((fdt_setprop_cell(fdt
, offset
, "i-cache-size",
544 pcc
->l1_icache_size
)));
546 warn_report("Unknown L1 icache size for cpu");
549 _FDT((fdt_setprop_cell(fdt
, offset
, "timebase-frequency", tbfreq
)));
550 _FDT((fdt_setprop_cell(fdt
, offset
, "clock-frequency", cpufreq
)));
551 _FDT((fdt_setprop_cell(fdt
, offset
, "slb-size", cpu
->hash64_opts
->slb_size
)));
552 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,slb-size", cpu
->hash64_opts
->slb_size
)));
553 _FDT((fdt_setprop_string(fdt
, offset
, "status", "okay")));
554 _FDT((fdt_setprop(fdt
, offset
, "64-bit", NULL
, 0)));
556 if (env
->spr_cb
[SPR_PURR
].oea_read
) {
557 _FDT((fdt_setprop(fdt
, offset
, "ibm,purr", NULL
, 0)));
560 if (ppc_hash64_has(cpu
, PPC_HASH64_1TSEG
)) {
561 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-segment-sizes",
562 segs
, sizeof(segs
))));
565 /* Advertise VSX (vector extensions) if available
566 * 1 == VMX / Altivec available
569 * Only CPUs for which we create core types in spapr_cpu_core.c
570 * are possible, and all of those have VMX */
571 if (spapr_get_cap(spapr
, SPAPR_CAP_VSX
) != 0) {
572 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", 2)));
574 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,vmx", 1)));
577 /* Advertise DFP (Decimal Floating Point) if available
578 * 0 / no property == no DFP
579 * 1 == DFP available */
580 if (spapr_get_cap(spapr
, SPAPR_CAP_DFP
) != 0) {
581 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,dfp", 1)));
584 page_sizes_prop_size
= ppc_create_page_sizes_prop(cpu
, page_sizes_prop
,
585 sizeof(page_sizes_prop
));
586 if (page_sizes_prop_size
) {
587 _FDT((fdt_setprop(fdt
, offset
, "ibm,segment-page-sizes",
588 page_sizes_prop
, page_sizes_prop_size
)));
591 spapr_populate_pa_features(spapr
, cpu
, fdt
, offset
, false);
593 _FDT((fdt_setprop_cell(fdt
, offset
, "ibm,chip-id",
594 cs
->cpu_index
/ vcpus_per_socket
)));
596 _FDT((fdt_setprop(fdt
, offset
, "ibm,pft-size",
597 pft_size_prop
, sizeof(pft_size_prop
))));
599 if (nb_numa_nodes
> 1) {
600 _FDT(spapr_fixup_cpu_numa_dt(fdt
, offset
, cpu
));
603 _FDT(spapr_fixup_cpu_smt_dt(fdt
, offset
, cpu
, compat_smt
));
605 if (pcc
->radix_page_info
) {
606 for (i
= 0; i
< pcc
->radix_page_info
->count
; i
++) {
607 radix_AP_encodings
[i
] =
608 cpu_to_be32(pcc
->radix_page_info
->entries
[i
]);
610 _FDT((fdt_setprop(fdt
, offset
, "ibm,processor-radix-AP-encodings",
612 pcc
->radix_page_info
->count
*
613 sizeof(radix_AP_encodings
[0]))));
617 static void spapr_populate_cpus_dt_node(void *fdt
, sPAPRMachineState
*spapr
)
623 cpus_offset
= fdt_add_subnode(fdt
, 0, "cpus");
625 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#address-cells", 0x1)));
626 _FDT((fdt_setprop_cell(fdt
, cpus_offset
, "#size-cells", 0x0)));
629 * We walk the CPUs in reverse order to ensure that CPU DT nodes
630 * created by fdt_add_subnode() end up in the right order in FDT
631 * for the guest kernel the enumerate the CPUs correctly.
633 CPU_FOREACH_REVERSE(cs
) {
634 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
635 int index
= spapr_get_vcpu_id(cpu
);
636 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
639 if (!spapr_is_thread0_in_vcore(spapr
, cpu
)) {
643 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, index
);
644 offset
= fdt_add_subnode(fdt
, cpus_offset
, nodename
);
647 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
652 static uint32_t spapr_pc_dimm_node(MemoryDeviceInfoList
*list
, ram_addr_t addr
)
654 MemoryDeviceInfoList
*info
;
656 for (info
= list
; info
; info
= info
->next
) {
657 MemoryDeviceInfo
*value
= info
->value
;
659 if (value
&& value
->type
== MEMORY_DEVICE_INFO_KIND_DIMM
) {
660 PCDIMMDeviceInfo
*pcdimm_info
= value
->u
.dimm
.data
;
662 if (pcdimm_info
->addr
>= addr
&&
663 addr
< (pcdimm_info
->addr
+ pcdimm_info
->size
)) {
664 return pcdimm_info
->node
;
672 struct sPAPRDrconfCellV2
{
680 typedef struct DrconfCellQueue
{
681 struct sPAPRDrconfCellV2 cell
;
682 QSIMPLEQ_ENTRY(DrconfCellQueue
) entry
;
685 static DrconfCellQueue
*
686 spapr_get_drconf_cell(uint32_t seq_lmbs
, uint64_t base_addr
,
687 uint32_t drc_index
, uint32_t aa_index
,
690 DrconfCellQueue
*elem
;
692 elem
= g_malloc0(sizeof(*elem
));
693 elem
->cell
.seq_lmbs
= cpu_to_be32(seq_lmbs
);
694 elem
->cell
.base_addr
= cpu_to_be64(base_addr
);
695 elem
->cell
.drc_index
= cpu_to_be32(drc_index
);
696 elem
->cell
.aa_index
= cpu_to_be32(aa_index
);
697 elem
->cell
.flags
= cpu_to_be32(flags
);
702 /* ibm,dynamic-memory-v2 */
703 static int spapr_populate_drmem_v2(sPAPRMachineState
*spapr
, void *fdt
,
704 int offset
, MemoryDeviceInfoList
*dimms
)
706 MachineState
*machine
= MACHINE(spapr
);
707 uint8_t *int_buf
, *cur_index
, buf_len
;
709 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
710 uint64_t addr
, cur_addr
, size
;
711 uint32_t nr_boot_lmbs
= (machine
->device_memory
->base
/ lmb_size
);
712 uint64_t mem_end
= machine
->device_memory
->base
+
713 memory_region_size(&machine
->device_memory
->mr
);
714 uint32_t node
, nr_entries
= 0;
715 sPAPRDRConnector
*drc
;
716 DrconfCellQueue
*elem
, *next
;
717 MemoryDeviceInfoList
*info
;
718 QSIMPLEQ_HEAD(, DrconfCellQueue
) drconf_queue
719 = QSIMPLEQ_HEAD_INITIALIZER(drconf_queue
);
721 /* Entry to cover RAM and the gap area */
722 elem
= spapr_get_drconf_cell(nr_boot_lmbs
, 0, 0, -1,
723 SPAPR_LMB_FLAGS_RESERVED
|
724 SPAPR_LMB_FLAGS_DRC_INVALID
);
725 QSIMPLEQ_INSERT_TAIL(&drconf_queue
, elem
, entry
);
728 cur_addr
= machine
->device_memory
->base
;
729 for (info
= dimms
; info
; info
= info
->next
) {
730 PCDIMMDeviceInfo
*di
= info
->value
->u
.dimm
.data
;
736 /* Entry for hot-pluggable area */
737 if (cur_addr
< addr
) {
738 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
, cur_addr
/ lmb_size
);
740 elem
= spapr_get_drconf_cell((addr
- cur_addr
) / lmb_size
,
741 cur_addr
, spapr_drc_index(drc
), -1, 0);
742 QSIMPLEQ_INSERT_TAIL(&drconf_queue
, elem
, entry
);
747 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
, addr
/ lmb_size
);
749 elem
= spapr_get_drconf_cell(size
/ lmb_size
, addr
,
750 spapr_drc_index(drc
), node
,
751 SPAPR_LMB_FLAGS_ASSIGNED
);
752 QSIMPLEQ_INSERT_TAIL(&drconf_queue
, elem
, entry
);
754 cur_addr
= addr
+ size
;
757 /* Entry for remaining hotpluggable area */
758 if (cur_addr
< mem_end
) {
759 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
, cur_addr
/ lmb_size
);
761 elem
= spapr_get_drconf_cell((mem_end
- cur_addr
) / lmb_size
,
762 cur_addr
, spapr_drc_index(drc
), -1, 0);
763 QSIMPLEQ_INSERT_TAIL(&drconf_queue
, elem
, entry
);
767 buf_len
= nr_entries
* sizeof(struct sPAPRDrconfCellV2
) + sizeof(uint32_t);
768 int_buf
= cur_index
= g_malloc0(buf_len
);
769 *(uint32_t *)int_buf
= cpu_to_be32(nr_entries
);
770 cur_index
+= sizeof(nr_entries
);
772 QSIMPLEQ_FOREACH_SAFE(elem
, &drconf_queue
, entry
, next
) {
773 memcpy(cur_index
, &elem
->cell
, sizeof(elem
->cell
));
774 cur_index
+= sizeof(elem
->cell
);
775 QSIMPLEQ_REMOVE(&drconf_queue
, elem
, DrconfCellQueue
, entry
);
779 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory-v2", int_buf
, buf_len
);
787 /* ibm,dynamic-memory */
788 static int spapr_populate_drmem_v1(sPAPRMachineState
*spapr
, void *fdt
,
789 int offset
, MemoryDeviceInfoList
*dimms
)
791 MachineState
*machine
= MACHINE(spapr
);
793 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
794 uint32_t device_lmb_start
= machine
->device_memory
->base
/ lmb_size
;
795 uint32_t nr_lmbs
= (machine
->device_memory
->base
+
796 memory_region_size(&machine
->device_memory
->mr
)) /
798 uint32_t *int_buf
, *cur_index
, buf_len
;
801 * Allocate enough buffer size to fit in ibm,dynamic-memory
803 buf_len
= (nr_lmbs
* SPAPR_DR_LMB_LIST_ENTRY_SIZE
+ 1) * sizeof(uint32_t);
804 cur_index
= int_buf
= g_malloc0(buf_len
);
805 int_buf
[0] = cpu_to_be32(nr_lmbs
);
807 for (i
= 0; i
< nr_lmbs
; i
++) {
808 uint64_t addr
= i
* lmb_size
;
809 uint32_t *dynamic_memory
= cur_index
;
811 if (i
>= device_lmb_start
) {
812 sPAPRDRConnector
*drc
;
814 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
, i
);
817 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
818 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
819 dynamic_memory
[2] = cpu_to_be32(spapr_drc_index(drc
));
820 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
821 dynamic_memory
[4] = cpu_to_be32(spapr_pc_dimm_node(dimms
, addr
));
822 if (memory_region_present(get_system_memory(), addr
)) {
823 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_ASSIGNED
);
825 dynamic_memory
[5] = cpu_to_be32(0);
829 * LMB information for RMA, boot time RAM and gap b/n RAM and
830 * device memory region -- all these are marked as reserved
831 * and as having no valid DRC.
833 dynamic_memory
[0] = cpu_to_be32(addr
>> 32);
834 dynamic_memory
[1] = cpu_to_be32(addr
& 0xffffffff);
835 dynamic_memory
[2] = cpu_to_be32(0);
836 dynamic_memory
[3] = cpu_to_be32(0); /* reserved */
837 dynamic_memory
[4] = cpu_to_be32(-1);
838 dynamic_memory
[5] = cpu_to_be32(SPAPR_LMB_FLAGS_RESERVED
|
839 SPAPR_LMB_FLAGS_DRC_INVALID
);
842 cur_index
+= SPAPR_DR_LMB_LIST_ENTRY_SIZE
;
844 ret
= fdt_setprop(fdt
, offset
, "ibm,dynamic-memory", int_buf
, buf_len
);
853 * Adds ibm,dynamic-reconfiguration-memory node.
854 * Refer to docs/specs/ppc-spapr-hotplug.txt for the documentation
855 * of this device tree node.
857 static int spapr_populate_drconf_memory(sPAPRMachineState
*spapr
, void *fdt
)
859 MachineState
*machine
= MACHINE(spapr
);
861 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
862 uint32_t prop_lmb_size
[] = {0, cpu_to_be32(lmb_size
)};
863 uint32_t *int_buf
, *cur_index
, buf_len
;
864 int nr_nodes
= nb_numa_nodes
? nb_numa_nodes
: 1;
865 MemoryDeviceInfoList
*dimms
= NULL
;
868 * Don't create the node if there is no device memory
870 if (machine
->ram_size
== machine
->maxram_size
) {
874 offset
= fdt_add_subnode(fdt
, 0, "ibm,dynamic-reconfiguration-memory");
876 ret
= fdt_setprop(fdt
, offset
, "ibm,lmb-size", prop_lmb_size
,
877 sizeof(prop_lmb_size
));
882 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-flags-mask", 0xff);
887 ret
= fdt_setprop_cell(fdt
, offset
, "ibm,memory-preservation-time", 0x0);
892 /* ibm,dynamic-memory or ibm,dynamic-memory-v2 */
893 dimms
= qmp_memory_device_list();
894 if (spapr_ovec_test(spapr
->ov5_cas
, OV5_DRMEM_V2
)) {
895 ret
= spapr_populate_drmem_v2(spapr
, fdt
, offset
, dimms
);
897 ret
= spapr_populate_drmem_v1(spapr
, fdt
, offset
, dimms
);
899 qapi_free_MemoryDeviceInfoList(dimms
);
905 /* ibm,associativity-lookup-arrays */
906 buf_len
= (nr_nodes
* 4 + 2) * sizeof(uint32_t);
907 cur_index
= int_buf
= g_malloc0(buf_len
);
910 int_buf
[0] = cpu_to_be32(nr_nodes
);
911 int_buf
[1] = cpu_to_be32(4); /* Number of entries per associativity list */
913 for (i
= 0; i
< nr_nodes
; i
++) {
914 uint32_t associativity
[] = {
920 memcpy(cur_index
, associativity
, sizeof(associativity
));
923 ret
= fdt_setprop(fdt
, offset
, "ibm,associativity-lookup-arrays", int_buf
,
924 (cur_index
- int_buf
) * sizeof(uint32_t));
930 static int spapr_dt_cas_updates(sPAPRMachineState
*spapr
, void *fdt
,
931 sPAPROptionVector
*ov5_updates
)
933 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(spapr
);
936 /* Generate ibm,dynamic-reconfiguration-memory node if required */
937 if (spapr_ovec_test(ov5_updates
, OV5_DRCONF_MEMORY
)) {
938 g_assert(smc
->dr_lmb_enabled
);
939 ret
= spapr_populate_drconf_memory(spapr
, fdt
);
945 offset
= fdt_path_offset(fdt
, "/chosen");
947 offset
= fdt_add_subnode(fdt
, 0, "chosen");
952 ret
= spapr_ovec_populate_dt(fdt
, offset
, spapr
->ov5_cas
,
953 "ibm,architecture-vec-5");
959 static bool spapr_hotplugged_dev_before_cas(void)
961 Object
*drc_container
, *obj
;
962 ObjectProperty
*prop
;
963 ObjectPropertyIterator iter
;
965 drc_container
= container_get(object_get_root(), "/dr-connector");
966 object_property_iter_init(&iter
, drc_container
);
967 while ((prop
= object_property_iter_next(&iter
))) {
968 if (!strstart(prop
->type
, "link<", NULL
)) {
971 obj
= object_property_get_link(drc_container
, prop
->name
, NULL
);
972 if (spapr_drc_needed(obj
)) {
979 int spapr_h_cas_compose_response(sPAPRMachineState
*spapr
,
980 target_ulong addr
, target_ulong size
,
981 sPAPROptionVector
*ov5_updates
)
983 void *fdt
, *fdt_skel
;
984 sPAPRDeviceTreeUpdateHeader hdr
= { .version_id
= 1 };
986 if (spapr_hotplugged_dev_before_cas()) {
990 if (size
< sizeof(hdr
) || size
> FW_MAX_SIZE
) {
991 error_report("SLOF provided an unexpected CAS buffer size "
992 TARGET_FMT_lu
" (min: %zu, max: %u)",
993 size
, sizeof(hdr
), FW_MAX_SIZE
);
999 /* Create skeleton */
1000 fdt_skel
= g_malloc0(size
);
1001 _FDT((fdt_create(fdt_skel
, size
)));
1002 _FDT((fdt_finish_reservemap(fdt_skel
)));
1003 _FDT((fdt_begin_node(fdt_skel
, "")));
1004 _FDT((fdt_end_node(fdt_skel
)));
1005 _FDT((fdt_finish(fdt_skel
)));
1006 fdt
= g_malloc0(size
);
1007 _FDT((fdt_open_into(fdt_skel
, fdt
, size
)));
1010 /* Fixup cpu nodes */
1011 _FDT((spapr_fixup_cpu_dt(fdt
, spapr
)));
1013 if (spapr_dt_cas_updates(spapr
, fdt
, ov5_updates
)) {
1017 /* Pack resulting tree */
1018 _FDT((fdt_pack(fdt
)));
1020 if (fdt_totalsize(fdt
) + sizeof(hdr
) > size
) {
1021 trace_spapr_cas_failed(size
);
1025 cpu_physical_memory_write(addr
, &hdr
, sizeof(hdr
));
1026 cpu_physical_memory_write(addr
+ sizeof(hdr
), fdt
, fdt_totalsize(fdt
));
1027 trace_spapr_cas_continue(fdt_totalsize(fdt
) + sizeof(hdr
));
1033 static void spapr_dt_rtas(sPAPRMachineState
*spapr
, void *fdt
)
1036 GString
*hypertas
= g_string_sized_new(256);
1037 GString
*qemu_hypertas
= g_string_sized_new(256);
1038 uint32_t refpoints
[] = { cpu_to_be32(0x4), cpu_to_be32(0x4) };
1039 uint64_t max_device_addr
= MACHINE(spapr
)->device_memory
->base
+
1040 memory_region_size(&MACHINE(spapr
)->device_memory
->mr
);
1041 uint32_t lrdr_capacity
[] = {
1042 cpu_to_be32(max_device_addr
>> 32),
1043 cpu_to_be32(max_device_addr
& 0xffffffff),
1044 0, cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE
),
1045 cpu_to_be32(max_cpus
/ smp_threads
),
1047 uint32_t maxdomains
[] = {
1052 cpu_to_be32(nb_numa_nodes
? nb_numa_nodes
- 1 : 0),
1055 _FDT(rtas
= fdt_add_subnode(fdt
, 0, "rtas"));
1058 add_str(hypertas
, "hcall-pft");
1059 add_str(hypertas
, "hcall-term");
1060 add_str(hypertas
, "hcall-dabr");
1061 add_str(hypertas
, "hcall-interrupt");
1062 add_str(hypertas
, "hcall-tce");
1063 add_str(hypertas
, "hcall-vio");
1064 add_str(hypertas
, "hcall-splpar");
1065 add_str(hypertas
, "hcall-bulk");
1066 add_str(hypertas
, "hcall-set-mode");
1067 add_str(hypertas
, "hcall-sprg0");
1068 add_str(hypertas
, "hcall-copy");
1069 add_str(hypertas
, "hcall-debug");
1070 add_str(qemu_hypertas
, "hcall-memop1");
1072 if (!kvm_enabled() || kvmppc_spapr_use_multitce()) {
1073 add_str(hypertas
, "hcall-multi-tce");
1076 if (spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) {
1077 add_str(hypertas
, "hcall-hpt-resize");
1080 _FDT(fdt_setprop(fdt
, rtas
, "ibm,hypertas-functions",
1081 hypertas
->str
, hypertas
->len
));
1082 g_string_free(hypertas
, TRUE
);
1083 _FDT(fdt_setprop(fdt
, rtas
, "qemu,hypertas-functions",
1084 qemu_hypertas
->str
, qemu_hypertas
->len
));
1085 g_string_free(qemu_hypertas
, TRUE
);
1087 _FDT(fdt_setprop(fdt
, rtas
, "ibm,associativity-reference-points",
1088 refpoints
, sizeof(refpoints
)));
1090 _FDT(fdt_setprop(fdt
, rtas
, "ibm,max-associativity-domains",
1091 maxdomains
, sizeof(maxdomains
)));
1093 _FDT(fdt_setprop_cell(fdt
, rtas
, "rtas-error-log-max",
1094 RTAS_ERROR_LOG_MAX
));
1095 _FDT(fdt_setprop_cell(fdt
, rtas
, "rtas-event-scan-rate",
1096 RTAS_EVENT_SCAN_RATE
));
1098 g_assert(msi_nonbroken
);
1099 _FDT(fdt_setprop(fdt
, rtas
, "ibm,change-msix-capable", NULL
, 0));
1102 * According to PAPR, rtas ibm,os-term does not guarantee a return
1103 * back to the guest cpu.
1105 * While an additional ibm,extended-os-term property indicates
1106 * that rtas call return will always occur. Set this property.
1108 _FDT(fdt_setprop(fdt
, rtas
, "ibm,extended-os-term", NULL
, 0));
1110 _FDT(fdt_setprop(fdt
, rtas
, "ibm,lrdr-capacity",
1111 lrdr_capacity
, sizeof(lrdr_capacity
)));
1113 spapr_dt_rtas_tokens(fdt
, rtas
);
1116 /* Prepare ibm,arch-vec-5-platform-support, which indicates the MMU features
1117 * that the guest may request and thus the valid values for bytes 24..26 of
1118 * option vector 5: */
1119 static void spapr_dt_ov5_platform_support(void *fdt
, int chosen
)
1121 PowerPCCPU
*first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1124 23, 0x00, /* Xive mode, filled in below. */
1125 24, 0x00, /* Hash/Radix, filled in below. */
1126 25, 0x00, /* Hash options: Segment Tables == no, GTSE == no. */
1127 26, 0x40, /* Radix options: GTSE == yes. */
1130 if (!ppc_check_compat(first_ppc_cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
1131 first_ppc_cpu
->compat_pvr
)) {
1132 /* If we're in a pre POWER9 compat mode then the guest should do hash */
1133 val
[3] = 0x00; /* Hash */
1134 } else if (kvm_enabled()) {
1135 if (kvmppc_has_cap_mmu_radix() && kvmppc_has_cap_mmu_hash_v3()) {
1136 val
[3] = 0x80; /* OV5_MMU_BOTH */
1137 } else if (kvmppc_has_cap_mmu_radix()) {
1138 val
[3] = 0x40; /* OV5_MMU_RADIX_300 */
1140 val
[3] = 0x00; /* Hash */
1143 /* V3 MMU supports both hash and radix in tcg (with dynamic switching) */
1146 _FDT(fdt_setprop(fdt
, chosen
, "ibm,arch-vec-5-platform-support",
1150 static void spapr_dt_chosen(sPAPRMachineState
*spapr
, void *fdt
)
1152 MachineState
*machine
= MACHINE(spapr
);
1154 const char *boot_device
= machine
->boot_order
;
1155 char *stdout_path
= spapr_vio_stdout_path(spapr
->vio_bus
);
1157 char *bootlist
= get_boot_devices_list(&cb
, true);
1159 _FDT(chosen
= fdt_add_subnode(fdt
, 0, "chosen"));
1161 _FDT(fdt_setprop_string(fdt
, chosen
, "bootargs", machine
->kernel_cmdline
));
1162 _FDT(fdt_setprop_cell(fdt
, chosen
, "linux,initrd-start",
1163 spapr
->initrd_base
));
1164 _FDT(fdt_setprop_cell(fdt
, chosen
, "linux,initrd-end",
1165 spapr
->initrd_base
+ spapr
->initrd_size
));
1167 if (spapr
->kernel_size
) {
1168 uint64_t kprop
[2] = { cpu_to_be64(KERNEL_LOAD_ADDR
),
1169 cpu_to_be64(spapr
->kernel_size
) };
1171 _FDT(fdt_setprop(fdt
, chosen
, "qemu,boot-kernel",
1172 &kprop
, sizeof(kprop
)));
1173 if (spapr
->kernel_le
) {
1174 _FDT(fdt_setprop(fdt
, chosen
, "qemu,boot-kernel-le", NULL
, 0));
1178 _FDT((fdt_setprop_cell(fdt
, chosen
, "qemu,boot-menu", boot_menu
)));
1180 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-width", graphic_width
));
1181 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-height", graphic_height
));
1182 _FDT(fdt_setprop_cell(fdt
, chosen
, "qemu,graphic-depth", graphic_depth
));
1184 if (cb
&& bootlist
) {
1187 for (i
= 0; i
< cb
; i
++) {
1188 if (bootlist
[i
] == '\n') {
1192 _FDT(fdt_setprop_string(fdt
, chosen
, "qemu,boot-list", bootlist
));
1195 if (boot_device
&& strlen(boot_device
)) {
1196 _FDT(fdt_setprop_string(fdt
, chosen
, "qemu,boot-device", boot_device
));
1199 if (!spapr
->has_graphics
&& stdout_path
) {
1201 * "linux,stdout-path" and "stdout" properties are deprecated by linux
1202 * kernel. New platforms should only use the "stdout-path" property. Set
1203 * the new property and continue using older property to remain
1204 * compatible with the existing firmware.
1206 _FDT(fdt_setprop_string(fdt
, chosen
, "linux,stdout-path", stdout_path
));
1207 _FDT(fdt_setprop_string(fdt
, chosen
, "stdout-path", stdout_path
));
1210 spapr_dt_ov5_platform_support(fdt
, chosen
);
1212 g_free(stdout_path
);
1216 static void spapr_dt_hypervisor(sPAPRMachineState
*spapr
, void *fdt
)
1218 /* The /hypervisor node isn't in PAPR - this is a hack to allow PR
1219 * KVM to work under pHyp with some guest co-operation */
1221 uint8_t hypercall
[16];
1223 _FDT(hypervisor
= fdt_add_subnode(fdt
, 0, "hypervisor"));
1224 /* indicate KVM hypercall interface */
1225 _FDT(fdt_setprop_string(fdt
, hypervisor
, "compatible", "linux,kvm"));
1226 if (kvmppc_has_cap_fixup_hcalls()) {
1228 * Older KVM versions with older guest kernels were broken
1229 * with the magic page, don't allow the guest to map it.
1231 if (!kvmppc_get_hypercall(first_cpu
->env_ptr
, hypercall
,
1232 sizeof(hypercall
))) {
1233 _FDT(fdt_setprop(fdt
, hypervisor
, "hcall-instructions",
1234 hypercall
, sizeof(hypercall
)));
1239 static void *spapr_build_fdt(sPAPRMachineState
*spapr
,
1243 MachineState
*machine
= MACHINE(spapr
);
1244 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1245 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
1251 fdt
= g_malloc0(FDT_MAX_SIZE
);
1252 _FDT((fdt_create_empty_tree(fdt
, FDT_MAX_SIZE
)));
1255 _FDT(fdt_setprop_string(fdt
, 0, "device_type", "chrp"));
1256 _FDT(fdt_setprop_string(fdt
, 0, "model", "IBM pSeries (emulated by qemu)"));
1257 _FDT(fdt_setprop_string(fdt
, 0, "compatible", "qemu,pseries"));
1260 * Add info to guest to indentify which host is it being run on
1261 * and what is the uuid of the guest
1263 if (kvmppc_get_host_model(&buf
)) {
1264 _FDT(fdt_setprop_string(fdt
, 0, "host-model", buf
));
1267 if (kvmppc_get_host_serial(&buf
)) {
1268 _FDT(fdt_setprop_string(fdt
, 0, "host-serial", buf
));
1272 buf
= qemu_uuid_unparse_strdup(&qemu_uuid
);
1274 _FDT(fdt_setprop_string(fdt
, 0, "vm,uuid", buf
));
1275 if (qemu_uuid_set
) {
1276 _FDT(fdt_setprop_string(fdt
, 0, "system-id", buf
));
1280 if (qemu_get_vm_name()) {
1281 _FDT(fdt_setprop_string(fdt
, 0, "ibm,partition-name",
1282 qemu_get_vm_name()));
1285 _FDT(fdt_setprop_cell(fdt
, 0, "#address-cells", 2));
1286 _FDT(fdt_setprop_cell(fdt
, 0, "#size-cells", 2));
1288 /* /interrupt controller */
1289 spapr_dt_xics(xics_max_server_number(spapr
), fdt
, PHANDLE_XICP
);
1291 ret
= spapr_populate_memory(spapr
, fdt
);
1293 error_report("couldn't setup memory nodes in fdt");
1298 spapr_dt_vdevice(spapr
->vio_bus
, fdt
);
1300 if (object_resolve_path_type("", TYPE_SPAPR_RNG
, NULL
)) {
1301 ret
= spapr_rng_populate_dt(fdt
);
1303 error_report("could not set up rng device in the fdt");
1308 QLIST_FOREACH(phb
, &spapr
->phbs
, list
) {
1309 ret
= spapr_populate_pci_dt(phb
, PHANDLE_XICP
, fdt
);
1311 error_report("couldn't setup PCI devices in fdt");
1317 spapr_populate_cpus_dt_node(fdt
, spapr
);
1319 if (smc
->dr_lmb_enabled
) {
1320 _FDT(spapr_drc_populate_dt(fdt
, 0, NULL
, SPAPR_DR_CONNECTOR_TYPE_LMB
));
1323 if (mc
->has_hotpluggable_cpus
) {
1324 int offset
= fdt_path_offset(fdt
, "/cpus");
1325 ret
= spapr_drc_populate_dt(fdt
, offset
, NULL
,
1326 SPAPR_DR_CONNECTOR_TYPE_CPU
);
1328 error_report("Couldn't set up CPU DR device tree properties");
1333 /* /event-sources */
1334 spapr_dt_events(spapr
, fdt
);
1337 spapr_dt_rtas(spapr
, fdt
);
1340 spapr_dt_chosen(spapr
, fdt
);
1343 if (kvm_enabled()) {
1344 spapr_dt_hypervisor(spapr
, fdt
);
1347 /* Build memory reserve map */
1348 if (spapr
->kernel_size
) {
1349 _FDT((fdt_add_mem_rsv(fdt
, KERNEL_LOAD_ADDR
, spapr
->kernel_size
)));
1351 if (spapr
->initrd_size
) {
1352 _FDT((fdt_add_mem_rsv(fdt
, spapr
->initrd_base
, spapr
->initrd_size
)));
1355 /* ibm,client-architecture-support updates */
1356 ret
= spapr_dt_cas_updates(spapr
, fdt
, spapr
->ov5_cas
);
1358 error_report("couldn't setup CAS properties fdt");
1365 static uint64_t translate_kernel_address(void *opaque
, uint64_t addr
)
1367 return (addr
& 0x0fffffff) + KERNEL_LOAD_ADDR
;
1370 static void emulate_spapr_hypercall(PPCVirtualHypervisor
*vhyp
,
1373 CPUPPCState
*env
= &cpu
->env
;
1375 /* The TCG path should also be holding the BQL at this point */
1376 g_assert(qemu_mutex_iothread_locked());
1379 hcall_dprintf("Hypercall made with MSR[PR]=1\n");
1380 env
->gpr
[3] = H_PRIVILEGE
;
1382 env
->gpr
[3] = spapr_hypercall(cpu
, env
->gpr
[3], &env
->gpr
[4]);
1386 static uint64_t spapr_get_patbe(PPCVirtualHypervisor
*vhyp
)
1388 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1390 return spapr
->patb_entry
;
1393 #define HPTE(_table, _i) (void *)(((uint64_t *)(_table)) + ((_i) * 2))
1394 #define HPTE_VALID(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_VALID)
1395 #define HPTE_DIRTY(_hpte) (tswap64(*((uint64_t *)(_hpte))) & HPTE64_V_HPTE_DIRTY)
1396 #define CLEAN_HPTE(_hpte) ((*(uint64_t *)(_hpte)) &= tswap64(~HPTE64_V_HPTE_DIRTY))
1397 #define DIRTY_HPTE(_hpte) ((*(uint64_t *)(_hpte)) |= tswap64(HPTE64_V_HPTE_DIRTY))
1400 * Get the fd to access the kernel htab, re-opening it if necessary
1402 static int get_htab_fd(sPAPRMachineState
*spapr
)
1404 Error
*local_err
= NULL
;
1406 if (spapr
->htab_fd
>= 0) {
1407 return spapr
->htab_fd
;
1410 spapr
->htab_fd
= kvmppc_get_htab_fd(false, 0, &local_err
);
1411 if (spapr
->htab_fd
< 0) {
1412 error_report_err(local_err
);
1415 return spapr
->htab_fd
;
1418 void close_htab_fd(sPAPRMachineState
*spapr
)
1420 if (spapr
->htab_fd
>= 0) {
1421 close(spapr
->htab_fd
);
1423 spapr
->htab_fd
= -1;
1426 static hwaddr
spapr_hpt_mask(PPCVirtualHypervisor
*vhyp
)
1428 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1430 return HTAB_SIZE(spapr
) / HASH_PTEG_SIZE_64
- 1;
1433 static target_ulong
spapr_encode_hpt_for_kvm_pr(PPCVirtualHypervisor
*vhyp
)
1435 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1437 assert(kvm_enabled());
1443 return (target_ulong
)(uintptr_t)spapr
->htab
| (spapr
->htab_shift
- 18);
1446 static const ppc_hash_pte64_t
*spapr_map_hptes(PPCVirtualHypervisor
*vhyp
,
1449 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1450 hwaddr pte_offset
= ptex
* HASH_PTE_SIZE_64
;
1454 * HTAB is controlled by KVM. Fetch into temporary buffer
1456 ppc_hash_pte64_t
*hptes
= g_malloc(n
* HASH_PTE_SIZE_64
);
1457 kvmppc_read_hptes(hptes
, ptex
, n
);
1462 * HTAB is controlled by QEMU. Just point to the internally
1465 return (const ppc_hash_pte64_t
*)(spapr
->htab
+ pte_offset
);
1468 static void spapr_unmap_hptes(PPCVirtualHypervisor
*vhyp
,
1469 const ppc_hash_pte64_t
*hptes
,
1472 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1475 g_free((void *)hptes
);
1478 /* Nothing to do for qemu managed HPT */
1481 static void spapr_store_hpte(PPCVirtualHypervisor
*vhyp
, hwaddr ptex
,
1482 uint64_t pte0
, uint64_t pte1
)
1484 sPAPRMachineState
*spapr
= SPAPR_MACHINE(vhyp
);
1485 hwaddr offset
= ptex
* HASH_PTE_SIZE_64
;
1488 kvmppc_write_hpte(ptex
, pte0
, pte1
);
1490 stq_p(spapr
->htab
+ offset
, pte0
);
1491 stq_p(spapr
->htab
+ offset
+ HASH_PTE_SIZE_64
/ 2, pte1
);
1495 int spapr_hpt_shift_for_ramsize(uint64_t ramsize
)
1499 /* We aim for a hash table of size 1/128 the size of RAM (rounded
1500 * up). The PAPR recommendation is actually 1/64 of RAM size, but
1501 * that's much more than is needed for Linux guests */
1502 shift
= ctz64(pow2ceil(ramsize
)) - 7;
1503 shift
= MAX(shift
, 18); /* Minimum architected size */
1504 shift
= MIN(shift
, 46); /* Maximum architected size */
1508 void spapr_free_hpt(sPAPRMachineState
*spapr
)
1510 g_free(spapr
->htab
);
1512 spapr
->htab_shift
= 0;
1513 close_htab_fd(spapr
);
1516 void spapr_reallocate_hpt(sPAPRMachineState
*spapr
, int shift
,
1521 /* Clean up any HPT info from a previous boot */
1522 spapr_free_hpt(spapr
);
1524 rc
= kvmppc_reset_htab(shift
);
1526 /* kernel-side HPT needed, but couldn't allocate one */
1527 error_setg_errno(errp
, errno
,
1528 "Failed to allocate KVM HPT of order %d (try smaller maxmem?)",
1530 /* This is almost certainly fatal, but if the caller really
1531 * wants to carry on with shift == 0, it's welcome to try */
1532 } else if (rc
> 0) {
1533 /* kernel-side HPT allocated */
1536 "Requested order %d HPT, but kernel allocated order %ld (try smaller maxmem?)",
1540 spapr
->htab_shift
= shift
;
1543 /* kernel-side HPT not needed, allocate in userspace instead */
1544 size_t size
= 1ULL << shift
;
1547 spapr
->htab
= qemu_memalign(size
, size
);
1549 error_setg_errno(errp
, errno
,
1550 "Could not allocate HPT of order %d", shift
);
1554 memset(spapr
->htab
, 0, size
);
1555 spapr
->htab_shift
= shift
;
1557 for (i
= 0; i
< size
/ HASH_PTE_SIZE_64
; i
++) {
1558 DIRTY_HPTE(HPTE(spapr
->htab
, i
));
1561 /* We're setting up a hash table, so that means we're not radix */
1562 spapr
->patb_entry
= 0;
1565 void spapr_setup_hpt_and_vrma(sPAPRMachineState
*spapr
)
1569 if ((spapr
->resize_hpt
== SPAPR_RESIZE_HPT_DISABLED
)
1570 || (spapr
->cas_reboot
1571 && !spapr_ovec_test(spapr
->ov5_cas
, OV5_HPT_RESIZE
))) {
1572 hpt_shift
= spapr_hpt_shift_for_ramsize(MACHINE(spapr
)->maxram_size
);
1574 uint64_t current_ram_size
;
1576 current_ram_size
= MACHINE(spapr
)->ram_size
+ get_plugged_memory_size();
1577 hpt_shift
= spapr_hpt_shift_for_ramsize(current_ram_size
);
1579 spapr_reallocate_hpt(spapr
, hpt_shift
, &error_fatal
);
1581 if (spapr
->vrma_adjust
) {
1582 spapr
->rma_size
= kvmppc_rma_size(spapr_node0_size(MACHINE(spapr
)),
1587 static int spapr_reset_drcs(Object
*child
, void *opaque
)
1589 sPAPRDRConnector
*drc
=
1590 (sPAPRDRConnector
*) object_dynamic_cast(child
,
1591 TYPE_SPAPR_DR_CONNECTOR
);
1594 spapr_drc_reset(drc
);
1600 static void spapr_machine_reset(void)
1602 MachineState
*machine
= MACHINE(qdev_get_machine());
1603 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
1604 PowerPCCPU
*first_ppc_cpu
;
1605 uint32_t rtas_limit
;
1606 hwaddr rtas_addr
, fdt_addr
;
1610 spapr_caps_reset(spapr
);
1612 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
1613 if (kvm_enabled() && kvmppc_has_cap_mmu_radix() &&
1614 ppc_check_compat(first_ppc_cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
1615 spapr
->max_compat_pvr
)) {
1616 /* If using KVM with radix mode available, VCPUs can be started
1617 * without a HPT because KVM will start them in radix mode.
1618 * Set the GR bit in PATB so that we know there is no HPT. */
1619 spapr
->patb_entry
= PATBE1_GR
;
1621 spapr_setup_hpt_and_vrma(spapr
);
1624 /* if this reset wasn't generated by CAS, we should reset our
1625 * negotiated options and start from scratch */
1626 if (!spapr
->cas_reboot
) {
1627 spapr_ovec_cleanup(spapr
->ov5_cas
);
1628 spapr
->ov5_cas
= spapr_ovec_new();
1630 ppc_set_compat(first_ppc_cpu
, spapr
->max_compat_pvr
, &error_fatal
);
1633 qemu_devices_reset();
1635 /* DRC reset may cause a device to be unplugged. This will cause troubles
1636 * if this device is used by another device (eg, a running vhost backend
1637 * will crash QEMU if the DIMM holding the vring goes away). To avoid such
1638 * situations, we reset DRCs after all devices have been reset.
1640 object_child_foreach_recursive(object_get_root(), spapr_reset_drcs
, NULL
);
1642 spapr_clear_pending_events(spapr
);
1645 * We place the device tree and RTAS just below either the top of the RMA,
1646 * or just below 2GB, whichever is lowere, so that it can be
1647 * processed with 32-bit real mode code if necessary
1649 rtas_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
);
1650 rtas_addr
= rtas_limit
- RTAS_MAX_SIZE
;
1651 fdt_addr
= rtas_addr
- FDT_MAX_SIZE
;
1653 fdt
= spapr_build_fdt(spapr
, rtas_addr
, spapr
->rtas_size
);
1655 spapr_load_rtas(spapr
, fdt
, rtas_addr
);
1659 /* Should only fail if we've built a corrupted tree */
1662 if (fdt_totalsize(fdt
) > FDT_MAX_SIZE
) {
1663 error_report("FDT too big ! 0x%x bytes (max is 0x%x)",
1664 fdt_totalsize(fdt
), FDT_MAX_SIZE
);
1669 qemu_fdt_dumpdtb(fdt
, fdt_totalsize(fdt
));
1670 cpu_physical_memory_write(fdt_addr
, fdt
, fdt_totalsize(fdt
));
1673 /* Set up the entry state */
1674 spapr_cpu_set_entry_state(first_ppc_cpu
, SPAPR_ENTRY_POINT
, fdt_addr
);
1675 first_ppc_cpu
->env
.gpr
[5] = 0;
1677 spapr
->cas_reboot
= false;
1680 static void spapr_create_nvram(sPAPRMachineState
*spapr
)
1682 DeviceState
*dev
= qdev_create(&spapr
->vio_bus
->bus
, "spapr-nvram");
1683 DriveInfo
*dinfo
= drive_get(IF_PFLASH
, 0, 0);
1686 qdev_prop_set_drive(dev
, "drive", blk_by_legacy_dinfo(dinfo
),
1690 qdev_init_nofail(dev
);
1692 spapr
->nvram
= (struct sPAPRNVRAM
*)dev
;
1695 static void spapr_rtc_create(sPAPRMachineState
*spapr
)
1697 object_initialize(&spapr
->rtc
, sizeof(spapr
->rtc
), TYPE_SPAPR_RTC
);
1698 object_property_add_child(OBJECT(spapr
), "rtc", OBJECT(&spapr
->rtc
),
1700 object_property_set_bool(OBJECT(&spapr
->rtc
), true, "realized",
1702 object_property_add_alias(OBJECT(spapr
), "rtc-time", OBJECT(&spapr
->rtc
),
1703 "date", &error_fatal
);
1706 /* Returns whether we want to use VGA or not */
1707 static bool spapr_vga_init(PCIBus
*pci_bus
, Error
**errp
)
1709 switch (vga_interface_type
) {
1716 return pci_vga_init(pci_bus
) != NULL
;
1719 "Unsupported VGA mode, only -vga std or -vga virtio is supported");
1724 static int spapr_pre_load(void *opaque
)
1728 rc
= spapr_caps_pre_load(opaque
);
1736 static int spapr_post_load(void *opaque
, int version_id
)
1738 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1741 err
= spapr_caps_post_migration(spapr
);
1746 if (!object_dynamic_cast(OBJECT(spapr
->ics
), TYPE_ICS_KVM
)) {
1749 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
1750 icp_resend(ICP(cpu
->intc
));
1754 /* In earlier versions, there was no separate qdev for the PAPR
1755 * RTC, so the RTC offset was stored directly in sPAPREnvironment.
1756 * So when migrating from those versions, poke the incoming offset
1757 * value into the RTC device */
1758 if (version_id
< 3) {
1759 err
= spapr_rtc_import_offset(&spapr
->rtc
, spapr
->rtc_offset
);
1762 if (kvm_enabled() && spapr
->patb_entry
) {
1763 PowerPCCPU
*cpu
= POWERPC_CPU(first_cpu
);
1764 bool radix
= !!(spapr
->patb_entry
& PATBE1_GR
);
1765 bool gtse
= !!(cpu
->env
.spr
[SPR_LPCR
] & LPCR_GTSE
);
1767 err
= kvmppc_configure_v3_mmu(cpu
, radix
, gtse
, spapr
->patb_entry
);
1769 error_report("Process table config unsupported by the host");
1777 static int spapr_pre_save(void *opaque
)
1781 rc
= spapr_caps_pre_save(opaque
);
1789 static bool version_before_3(void *opaque
, int version_id
)
1791 return version_id
< 3;
1794 static bool spapr_pending_events_needed(void *opaque
)
1796 sPAPRMachineState
*spapr
= (sPAPRMachineState
*)opaque
;
1797 return !QTAILQ_EMPTY(&spapr
->pending_events
);
1800 static const VMStateDescription vmstate_spapr_event_entry
= {
1801 .name
= "spapr_event_log_entry",
1803 .minimum_version_id
= 1,
1804 .fields
= (VMStateField
[]) {
1805 VMSTATE_UINT32(summary
, sPAPREventLogEntry
),
1806 VMSTATE_UINT32(extended_length
, sPAPREventLogEntry
),
1807 VMSTATE_VBUFFER_ALLOC_UINT32(extended_log
, sPAPREventLogEntry
, 0,
1808 NULL
, extended_length
),
1809 VMSTATE_END_OF_LIST()
1813 static const VMStateDescription vmstate_spapr_pending_events
= {
1814 .name
= "spapr_pending_events",
1816 .minimum_version_id
= 1,
1817 .needed
= spapr_pending_events_needed
,
1818 .fields
= (VMStateField
[]) {
1819 VMSTATE_QTAILQ_V(pending_events
, sPAPRMachineState
, 1,
1820 vmstate_spapr_event_entry
, sPAPREventLogEntry
, next
),
1821 VMSTATE_END_OF_LIST()
1825 static bool spapr_ov5_cas_needed(void *opaque
)
1827 sPAPRMachineState
*spapr
= opaque
;
1828 sPAPROptionVector
*ov5_mask
= spapr_ovec_new();
1829 sPAPROptionVector
*ov5_legacy
= spapr_ovec_new();
1830 sPAPROptionVector
*ov5_removed
= spapr_ovec_new();
1833 /* Prior to the introduction of sPAPROptionVector, we had two option
1834 * vectors we dealt with: OV5_FORM1_AFFINITY, and OV5_DRCONF_MEMORY.
1835 * Both of these options encode machine topology into the device-tree
1836 * in such a way that the now-booted OS should still be able to interact
1837 * appropriately with QEMU regardless of what options were actually
1838 * negotiatied on the source side.
1840 * As such, we can avoid migrating the CAS-negotiated options if these
1841 * are the only options available on the current machine/platform.
1842 * Since these are the only options available for pseries-2.7 and
1843 * earlier, this allows us to maintain old->new/new->old migration
1846 * For QEMU 2.8+, there are additional CAS-negotiatable options available
1847 * via default pseries-2.8 machines and explicit command-line parameters.
1848 * Some of these options, like OV5_HP_EVT, *do* require QEMU to be aware
1849 * of the actual CAS-negotiated values to continue working properly. For
1850 * example, availability of memory unplug depends on knowing whether
1851 * OV5_HP_EVT was negotiated via CAS.
1853 * Thus, for any cases where the set of available CAS-negotiatable
1854 * options extends beyond OV5_FORM1_AFFINITY and OV5_DRCONF_MEMORY, we
1855 * include the CAS-negotiated options in the migration stream, unless
1856 * if they affect boot time behaviour only.
1858 spapr_ovec_set(ov5_mask
, OV5_FORM1_AFFINITY
);
1859 spapr_ovec_set(ov5_mask
, OV5_DRCONF_MEMORY
);
1860 spapr_ovec_set(ov5_mask
, OV5_DRMEM_V2
);
1862 /* spapr_ovec_diff returns true if bits were removed. we avoid using
1863 * the mask itself since in the future it's possible "legacy" bits may be
1864 * removed via machine options, which could generate a false positive
1865 * that breaks migration.
1867 spapr_ovec_intersect(ov5_legacy
, spapr
->ov5
, ov5_mask
);
1868 cas_needed
= spapr_ovec_diff(ov5_removed
, spapr
->ov5
, ov5_legacy
);
1870 spapr_ovec_cleanup(ov5_mask
);
1871 spapr_ovec_cleanup(ov5_legacy
);
1872 spapr_ovec_cleanup(ov5_removed
);
1877 static const VMStateDescription vmstate_spapr_ov5_cas
= {
1878 .name
= "spapr_option_vector_ov5_cas",
1880 .minimum_version_id
= 1,
1881 .needed
= spapr_ov5_cas_needed
,
1882 .fields
= (VMStateField
[]) {
1883 VMSTATE_STRUCT_POINTER_V(ov5_cas
, sPAPRMachineState
, 1,
1884 vmstate_spapr_ovec
, sPAPROptionVector
),
1885 VMSTATE_END_OF_LIST()
1889 static bool spapr_patb_entry_needed(void *opaque
)
1891 sPAPRMachineState
*spapr
= opaque
;
1893 return !!spapr
->patb_entry
;
1896 static const VMStateDescription vmstate_spapr_patb_entry
= {
1897 .name
= "spapr_patb_entry",
1899 .minimum_version_id
= 1,
1900 .needed
= spapr_patb_entry_needed
,
1901 .fields
= (VMStateField
[]) {
1902 VMSTATE_UINT64(patb_entry
, sPAPRMachineState
),
1903 VMSTATE_END_OF_LIST()
1907 static const VMStateDescription vmstate_spapr
= {
1910 .minimum_version_id
= 1,
1911 .pre_load
= spapr_pre_load
,
1912 .post_load
= spapr_post_load
,
1913 .pre_save
= spapr_pre_save
,
1914 .fields
= (VMStateField
[]) {
1915 /* used to be @next_irq */
1916 VMSTATE_UNUSED_BUFFER(version_before_3
, 0, 4),
1919 VMSTATE_UINT64_TEST(rtc_offset
, sPAPRMachineState
, version_before_3
),
1921 VMSTATE_PPC_TIMEBASE_V(tb
, sPAPRMachineState
, 2),
1922 VMSTATE_END_OF_LIST()
1924 .subsections
= (const VMStateDescription
*[]) {
1925 &vmstate_spapr_ov5_cas
,
1926 &vmstate_spapr_patb_entry
,
1927 &vmstate_spapr_pending_events
,
1928 &vmstate_spapr_cap_htm
,
1929 &vmstate_spapr_cap_vsx
,
1930 &vmstate_spapr_cap_dfp
,
1931 &vmstate_spapr_cap_cfpc
,
1932 &vmstate_spapr_cap_sbbc
,
1933 &vmstate_spapr_cap_ibs
,
1938 static int htab_save_setup(QEMUFile
*f
, void *opaque
)
1940 sPAPRMachineState
*spapr
= opaque
;
1942 /* "Iteration" header */
1943 if (!spapr
->htab_shift
) {
1944 qemu_put_be32(f
, -1);
1946 qemu_put_be32(f
, spapr
->htab_shift
);
1950 spapr
->htab_save_index
= 0;
1951 spapr
->htab_first_pass
= true;
1953 if (spapr
->htab_shift
) {
1954 assert(kvm_enabled());
1962 static void htab_save_chunk(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1963 int chunkstart
, int n_valid
, int n_invalid
)
1965 qemu_put_be32(f
, chunkstart
);
1966 qemu_put_be16(f
, n_valid
);
1967 qemu_put_be16(f
, n_invalid
);
1968 qemu_put_buffer(f
, HPTE(spapr
->htab
, chunkstart
),
1969 HASH_PTE_SIZE_64
* n_valid
);
1972 static void htab_save_end_marker(QEMUFile
*f
)
1974 qemu_put_be32(f
, 0);
1975 qemu_put_be16(f
, 0);
1976 qemu_put_be16(f
, 0);
1979 static void htab_save_first_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
1982 bool has_timeout
= max_ns
!= -1;
1983 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
1984 int index
= spapr
->htab_save_index
;
1985 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
1987 assert(spapr
->htab_first_pass
);
1992 /* Consume invalid HPTEs */
1993 while ((index
< htabslots
)
1994 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
1995 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
1999 /* Consume valid HPTEs */
2001 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
2002 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
2003 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
2007 if (index
> chunkstart
) {
2008 int n_valid
= index
- chunkstart
;
2010 htab_save_chunk(f
, spapr
, chunkstart
, n_valid
, 0);
2013 (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
2017 } while ((index
< htabslots
) && !qemu_file_rate_limit(f
));
2019 if (index
>= htabslots
) {
2020 assert(index
== htabslots
);
2022 spapr
->htab_first_pass
= false;
2024 spapr
->htab_save_index
= index
;
2027 static int htab_save_later_pass(QEMUFile
*f
, sPAPRMachineState
*spapr
,
2030 bool final
= max_ns
< 0;
2031 int htabslots
= HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
;
2032 int examined
= 0, sent
= 0;
2033 int index
= spapr
->htab_save_index
;
2034 int64_t starttime
= qemu_clock_get_ns(QEMU_CLOCK_REALTIME
);
2036 assert(!spapr
->htab_first_pass
);
2039 int chunkstart
, invalidstart
;
2041 /* Consume non-dirty HPTEs */
2042 while ((index
< htabslots
)
2043 && !HPTE_DIRTY(HPTE(spapr
->htab
, index
))) {
2049 /* Consume valid dirty HPTEs */
2050 while ((index
< htabslots
) && (index
- chunkstart
< USHRT_MAX
)
2051 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
2052 && HPTE_VALID(HPTE(spapr
->htab
, index
))) {
2053 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
2058 invalidstart
= index
;
2059 /* Consume invalid dirty HPTEs */
2060 while ((index
< htabslots
) && (index
- invalidstart
< USHRT_MAX
)
2061 && HPTE_DIRTY(HPTE(spapr
->htab
, index
))
2062 && !HPTE_VALID(HPTE(spapr
->htab
, index
))) {
2063 CLEAN_HPTE(HPTE(spapr
->htab
, index
));
2068 if (index
> chunkstart
) {
2069 int n_valid
= invalidstart
- chunkstart
;
2070 int n_invalid
= index
- invalidstart
;
2072 htab_save_chunk(f
, spapr
, chunkstart
, n_valid
, n_invalid
);
2073 sent
+= index
- chunkstart
;
2075 if (!final
&& (qemu_clock_get_ns(QEMU_CLOCK_REALTIME
) - starttime
) > max_ns
) {
2080 if (examined
>= htabslots
) {
2084 if (index
>= htabslots
) {
2085 assert(index
== htabslots
);
2088 } while ((examined
< htabslots
) && (!qemu_file_rate_limit(f
) || final
));
2090 if (index
>= htabslots
) {
2091 assert(index
== htabslots
);
2095 spapr
->htab_save_index
= index
;
2097 return (examined
>= htabslots
) && (sent
== 0) ? 1 : 0;
2100 #define MAX_ITERATION_NS 5000000 /* 5 ms */
2101 #define MAX_KVM_BUF_SIZE 2048
2103 static int htab_save_iterate(QEMUFile
*f
, void *opaque
)
2105 sPAPRMachineState
*spapr
= opaque
;
2109 /* Iteration header */
2110 if (!spapr
->htab_shift
) {
2111 qemu_put_be32(f
, -1);
2114 qemu_put_be32(f
, 0);
2118 assert(kvm_enabled());
2120 fd
= get_htab_fd(spapr
);
2125 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, MAX_ITERATION_NS
);
2129 } else if (spapr
->htab_first_pass
) {
2130 htab_save_first_pass(f
, spapr
, MAX_ITERATION_NS
);
2132 rc
= htab_save_later_pass(f
, spapr
, MAX_ITERATION_NS
);
2135 htab_save_end_marker(f
);
2140 static int htab_save_complete(QEMUFile
*f
, void *opaque
)
2142 sPAPRMachineState
*spapr
= opaque
;
2145 /* Iteration header */
2146 if (!spapr
->htab_shift
) {
2147 qemu_put_be32(f
, -1);
2150 qemu_put_be32(f
, 0);
2156 assert(kvm_enabled());
2158 fd
= get_htab_fd(spapr
);
2163 rc
= kvmppc_save_htab(f
, fd
, MAX_KVM_BUF_SIZE
, -1);
2168 if (spapr
->htab_first_pass
) {
2169 htab_save_first_pass(f
, spapr
, -1);
2171 htab_save_later_pass(f
, spapr
, -1);
2175 htab_save_end_marker(f
);
2180 static int htab_load(QEMUFile
*f
, void *opaque
, int version_id
)
2182 sPAPRMachineState
*spapr
= opaque
;
2183 uint32_t section_hdr
;
2185 Error
*local_err
= NULL
;
2187 if (version_id
< 1 || version_id
> 1) {
2188 error_report("htab_load() bad version");
2192 section_hdr
= qemu_get_be32(f
);
2194 if (section_hdr
== -1) {
2195 spapr_free_hpt(spapr
);
2200 /* First section gives the htab size */
2201 spapr_reallocate_hpt(spapr
, section_hdr
, &local_err
);
2203 error_report_err(local_err
);
2210 assert(kvm_enabled());
2212 fd
= kvmppc_get_htab_fd(true, 0, &local_err
);
2214 error_report_err(local_err
);
2221 uint16_t n_valid
, n_invalid
;
2223 index
= qemu_get_be32(f
);
2224 n_valid
= qemu_get_be16(f
);
2225 n_invalid
= qemu_get_be16(f
);
2227 if ((index
== 0) && (n_valid
== 0) && (n_invalid
== 0)) {
2232 if ((index
+ n_valid
+ n_invalid
) >
2233 (HTAB_SIZE(spapr
) / HASH_PTE_SIZE_64
)) {
2234 /* Bad index in stream */
2236 "htab_load() bad index %d (%hd+%hd entries) in htab stream (htab_shift=%d)",
2237 index
, n_valid
, n_invalid
, spapr
->htab_shift
);
2243 qemu_get_buffer(f
, HPTE(spapr
->htab
, index
),
2244 HASH_PTE_SIZE_64
* n_valid
);
2247 memset(HPTE(spapr
->htab
, index
+ n_valid
), 0,
2248 HASH_PTE_SIZE_64
* n_invalid
);
2255 rc
= kvmppc_load_htab_chunk(f
, fd
, index
, n_valid
, n_invalid
);
2270 static void htab_save_cleanup(void *opaque
)
2272 sPAPRMachineState
*spapr
= opaque
;
2274 close_htab_fd(spapr
);
2277 static SaveVMHandlers savevm_htab_handlers
= {
2278 .save_setup
= htab_save_setup
,
2279 .save_live_iterate
= htab_save_iterate
,
2280 .save_live_complete_precopy
= htab_save_complete
,
2281 .save_cleanup
= htab_save_cleanup
,
2282 .load_state
= htab_load
,
2285 static void spapr_boot_set(void *opaque
, const char *boot_device
,
2288 MachineState
*machine
= MACHINE(opaque
);
2289 machine
->boot_order
= g_strdup(boot_device
);
2292 static void spapr_create_lmb_dr_connectors(sPAPRMachineState
*spapr
)
2294 MachineState
*machine
= MACHINE(spapr
);
2295 uint64_t lmb_size
= SPAPR_MEMORY_BLOCK_SIZE
;
2296 uint32_t nr_lmbs
= (machine
->maxram_size
- machine
->ram_size
)/lmb_size
;
2299 for (i
= 0; i
< nr_lmbs
; i
++) {
2302 addr
= i
* lmb_size
+ machine
->device_memory
->base
;
2303 spapr_dr_connector_new(OBJECT(spapr
), TYPE_SPAPR_DRC_LMB
,
2309 * If RAM size, maxmem size and individual node mem sizes aren't aligned
2310 * to SPAPR_MEMORY_BLOCK_SIZE(256MB), then refuse to start the guest
2311 * since we can't support such unaligned sizes with DRCONF_MEMORY.
2313 static void spapr_validate_node_memory(MachineState
*machine
, Error
**errp
)
2317 if (machine
->ram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2318 error_setg(errp
, "Memory size 0x" RAM_ADDR_FMT
2319 " is not aligned to %llu MiB",
2321 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2325 if (machine
->maxram_size
% SPAPR_MEMORY_BLOCK_SIZE
) {
2326 error_setg(errp
, "Maximum memory size 0x" RAM_ADDR_FMT
2327 " is not aligned to %llu MiB",
2329 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2333 for (i
= 0; i
< nb_numa_nodes
; i
++) {
2334 if (numa_info
[i
].node_mem
% SPAPR_MEMORY_BLOCK_SIZE
) {
2336 "Node %d memory size 0x%" PRIx64
2337 " is not aligned to %llu MiB",
2338 i
, numa_info
[i
].node_mem
,
2339 SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
2345 /* find cpu slot in machine->possible_cpus by core_id */
2346 static CPUArchId
*spapr_find_cpu_slot(MachineState
*ms
, uint32_t id
, int *idx
)
2348 int index
= id
/ smp_threads
;
2350 if (index
>= ms
->possible_cpus
->len
) {
2356 return &ms
->possible_cpus
->cpus
[index
];
2359 static void spapr_set_vsmt_mode(sPAPRMachineState
*spapr
, Error
**errp
)
2361 Error
*local_err
= NULL
;
2362 bool vsmt_user
= !!spapr
->vsmt
;
2363 int kvm_smt
= kvmppc_smt_threads();
2366 if (!kvm_enabled() && (smp_threads
> 1)) {
2367 error_setg(&local_err
, "TCG cannot support more than 1 thread/core "
2368 "on a pseries machine");
2371 if (!is_power_of_2(smp_threads
)) {
2372 error_setg(&local_err
, "Cannot support %d threads/core on a pseries "
2373 "machine because it must be a power of 2", smp_threads
);
2377 /* Detemine the VSMT mode to use: */
2379 if (spapr
->vsmt
< smp_threads
) {
2380 error_setg(&local_err
, "Cannot support VSMT mode %d"
2381 " because it must be >= threads/core (%d)",
2382 spapr
->vsmt
, smp_threads
);
2385 /* In this case, spapr->vsmt has been set by the command line */
2388 * Default VSMT value is tricky, because we need it to be as
2389 * consistent as possible (for migration), but this requires
2390 * changing it for at least some existing cases. We pick 8 as
2391 * the value that we'd get with KVM on POWER8, the
2392 * overwhelmingly common case in production systems.
2394 spapr
->vsmt
= MAX(8, smp_threads
);
2397 /* KVM: If necessary, set the SMT mode: */
2398 if (kvm_enabled() && (spapr
->vsmt
!= kvm_smt
)) {
2399 ret
= kvmppc_set_smt_threads(spapr
->vsmt
);
2401 /* Looks like KVM isn't able to change VSMT mode */
2402 error_setg(&local_err
,
2403 "Failed to set KVM's VSMT mode to %d (errno %d)",
2405 /* We can live with that if the default one is big enough
2406 * for the number of threads, and a submultiple of the one
2407 * we want. In this case we'll waste some vcpu ids, but
2408 * behaviour will be correct */
2409 if ((kvm_smt
>= smp_threads
) && ((spapr
->vsmt
% kvm_smt
) == 0)) {
2410 warn_report_err(local_err
);
2415 error_append_hint(&local_err
,
2416 "On PPC, a VM with %d threads/core"
2417 " on a host with %d threads/core"
2418 " requires the use of VSMT mode %d.\n",
2419 smp_threads
, kvm_smt
, spapr
->vsmt
);
2421 kvmppc_hint_smt_possible(&local_err
);
2426 /* else TCG: nothing to do currently */
2428 error_propagate(errp
, local_err
);
2431 static void spapr_init_cpus(sPAPRMachineState
*spapr
)
2433 MachineState
*machine
= MACHINE(spapr
);
2434 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
2435 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
2436 const char *type
= spapr_get_cpu_core_type(machine
->cpu_type
);
2437 const CPUArchIdList
*possible_cpus
;
2438 int boot_cores_nr
= smp_cpus
/ smp_threads
;
2441 possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
2442 if (mc
->has_hotpluggable_cpus
) {
2443 if (smp_cpus
% smp_threads
) {
2444 error_report("smp_cpus (%u) must be multiple of threads (%u)",
2445 smp_cpus
, smp_threads
);
2448 if (max_cpus
% smp_threads
) {
2449 error_report("max_cpus (%u) must be multiple of threads (%u)",
2450 max_cpus
, smp_threads
);
2454 if (max_cpus
!= smp_cpus
) {
2455 error_report("This machine version does not support CPU hotplug");
2458 boot_cores_nr
= possible_cpus
->len
;
2461 /* VSMT must be set in order to be able to compute VCPU ids, ie to
2462 * call xics_max_server_number() or spapr_vcpu_id().
2464 spapr_set_vsmt_mode(spapr
, &error_fatal
);
2466 if (smc
->pre_2_10_has_unused_icps
) {
2469 for (i
= 0; i
< xics_max_server_number(spapr
); i
++) {
2470 /* Dummy entries get deregistered when real ICPState objects
2471 * are registered during CPU core hotplug.
2473 pre_2_10_vmstate_register_dummy_icp(i
);
2477 for (i
= 0; i
< possible_cpus
->len
; i
++) {
2478 int core_id
= i
* smp_threads
;
2480 if (mc
->has_hotpluggable_cpus
) {
2481 spapr_dr_connector_new(OBJECT(spapr
), TYPE_SPAPR_DRC_CPU
,
2482 spapr_vcpu_id(spapr
, core_id
));
2485 if (i
< boot_cores_nr
) {
2486 Object
*core
= object_new(type
);
2487 int nr_threads
= smp_threads
;
2489 /* Handle the partially filled core for older machine types */
2490 if ((i
+ 1) * smp_threads
>= smp_cpus
) {
2491 nr_threads
= smp_cpus
- i
* smp_threads
;
2494 object_property_set_int(core
, nr_threads
, "nr-threads",
2496 object_property_set_int(core
, core_id
, CPU_CORE_PROP_CORE_ID
,
2498 object_property_set_bool(core
, true, "realized", &error_fatal
);
2503 /* pSeries LPAR / sPAPR hardware init */
2504 static void spapr_machine_init(MachineState
*machine
)
2506 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
2507 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(machine
);
2508 const char *kernel_filename
= machine
->kernel_filename
;
2509 const char *initrd_filename
= machine
->initrd_filename
;
2512 MemoryRegion
*sysmem
= get_system_memory();
2513 MemoryRegion
*ram
= g_new(MemoryRegion
, 1);
2514 hwaddr node0_size
= spapr_node0_size(machine
);
2515 long load_limit
, fw_size
;
2517 Error
*resize_hpt_err
= NULL
;
2518 PowerPCCPU
*first_ppc_cpu
;
2520 msi_nonbroken
= true;
2522 QLIST_INIT(&spapr
->phbs
);
2523 QTAILQ_INIT(&spapr
->pending_dimm_unplugs
);
2525 /* Check HPT resizing availability */
2526 kvmppc_check_papr_resize_hpt(&resize_hpt_err
);
2527 if (spapr
->resize_hpt
== SPAPR_RESIZE_HPT_DEFAULT
) {
2529 * If the user explicitly requested a mode we should either
2530 * supply it, or fail completely (which we do below). But if
2531 * it's not set explicitly, we reset our mode to something
2534 if (resize_hpt_err
) {
2535 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DISABLED
;
2536 error_free(resize_hpt_err
);
2537 resize_hpt_err
= NULL
;
2539 spapr
->resize_hpt
= smc
->resize_hpt_default
;
2543 assert(spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DEFAULT
);
2545 if ((spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) && resize_hpt_err
) {
2547 * User requested HPT resize, but this host can't supply it. Bail out
2549 error_report_err(resize_hpt_err
);
2553 spapr
->rma_size
= node0_size
;
2555 /* With KVM, we don't actually know whether KVM supports an
2556 * unbounded RMA (PR KVM) or is limited by the hash table size
2557 * (HV KVM using VRMA), so we always assume the latter
2559 * In that case, we also limit the initial allocations for RTAS
2560 * etc... to 256M since we have no way to know what the VRMA size
2561 * is going to be as it depends on the size of the hash table
2562 * which isn't determined yet.
2564 if (kvm_enabled()) {
2565 spapr
->vrma_adjust
= 1;
2566 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x10000000);
2569 /* Actually we don't support unbounded RMA anymore since we added
2570 * proper emulation of HV mode. The max we can get is 16G which
2571 * also happens to be what we configure for PAPR mode so make sure
2572 * we don't do anything bigger than that
2574 spapr
->rma_size
= MIN(spapr
->rma_size
, 0x400000000ull
);
2576 if (spapr
->rma_size
> node0_size
) {
2577 error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx
")",
2582 /* Setup a load limit for the ramdisk leaving room for SLOF and FDT */
2583 load_limit
= MIN(spapr
->rma_size
, RTAS_MAX_ADDR
) - FW_OVERHEAD
;
2585 /* Set up Interrupt Controller before we create the VCPUs */
2586 xics_system_init(machine
, XICS_IRQS_SPAPR
, &error_fatal
);
2588 /* Set up containers for ibm,client-architecture-support negotiated options
2590 spapr
->ov5
= spapr_ovec_new();
2591 spapr
->ov5_cas
= spapr_ovec_new();
2593 if (smc
->dr_lmb_enabled
) {
2594 spapr_ovec_set(spapr
->ov5
, OV5_DRCONF_MEMORY
);
2595 spapr_validate_node_memory(machine
, &error_fatal
);
2598 spapr_ovec_set(spapr
->ov5
, OV5_FORM1_AFFINITY
);
2600 /* advertise support for dedicated HP event source to guests */
2601 if (spapr
->use_hotplug_event_source
) {
2602 spapr_ovec_set(spapr
->ov5
, OV5_HP_EVT
);
2605 /* advertise support for HPT resizing */
2606 if (spapr
->resize_hpt
!= SPAPR_RESIZE_HPT_DISABLED
) {
2607 spapr_ovec_set(spapr
->ov5
, OV5_HPT_RESIZE
);
2610 /* advertise support for ibm,dyamic-memory-v2 */
2611 spapr_ovec_set(spapr
->ov5
, OV5_DRMEM_V2
);
2614 spapr_init_cpus(spapr
);
2616 first_ppc_cpu
= POWERPC_CPU(first_cpu
);
2617 if ((!kvm_enabled() || kvmppc_has_cap_mmu_radix()) &&
2618 ppc_check_compat(first_ppc_cpu
, CPU_POWERPC_LOGICAL_3_00
, 0,
2619 spapr
->max_compat_pvr
)) {
2620 /* KVM and TCG always allow GTSE with radix... */
2621 spapr_ovec_set(spapr
->ov5
, OV5_MMU_RADIX_GTSE
);
2623 /* ... but not with hash (currently). */
2625 if (kvm_enabled()) {
2626 /* Enable H_LOGICAL_CI_* so SLOF can talk to in-kernel devices */
2627 kvmppc_enable_logical_ci_hcalls();
2628 kvmppc_enable_set_mode_hcall();
2630 /* H_CLEAR_MOD/_REF are mandatory in PAPR, but off by default */
2631 kvmppc_enable_clear_ref_mod_hcalls();
2635 memory_region_allocate_system_memory(ram
, NULL
, "ppc_spapr.ram",
2637 memory_region_add_subregion(sysmem
, 0, ram
);
2639 /* always allocate the device memory information */
2640 machine
->device_memory
= g_malloc0(sizeof(*machine
->device_memory
));
2642 /* initialize hotplug memory address space */
2643 if (machine
->ram_size
< machine
->maxram_size
) {
2644 ram_addr_t device_mem_size
= machine
->maxram_size
- machine
->ram_size
;
2646 * Limit the number of hotpluggable memory slots to half the number
2647 * slots that KVM supports, leaving the other half for PCI and other
2648 * devices. However ensure that number of slots doesn't drop below 32.
2650 int max_memslots
= kvm_enabled() ? kvm_get_max_memslots() / 2 :
2651 SPAPR_MAX_RAM_SLOTS
;
2653 if (max_memslots
< SPAPR_MAX_RAM_SLOTS
) {
2654 max_memslots
= SPAPR_MAX_RAM_SLOTS
;
2656 if (machine
->ram_slots
> max_memslots
) {
2657 error_report("Specified number of memory slots %"
2658 PRIu64
" exceeds max supported %d",
2659 machine
->ram_slots
, max_memslots
);
2663 machine
->device_memory
->base
= ROUND_UP(machine
->ram_size
,
2664 SPAPR_DEVICE_MEM_ALIGN
);
2665 memory_region_init(&machine
->device_memory
->mr
, OBJECT(spapr
),
2666 "device-memory", device_mem_size
);
2667 memory_region_add_subregion(sysmem
, machine
->device_memory
->base
,
2668 &machine
->device_memory
->mr
);
2671 if (smc
->dr_lmb_enabled
) {
2672 spapr_create_lmb_dr_connectors(spapr
);
2675 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, "spapr-rtas.bin");
2677 error_report("Could not find LPAR rtas '%s'", "spapr-rtas.bin");
2680 spapr
->rtas_size
= get_image_size(filename
);
2681 if (spapr
->rtas_size
< 0) {
2682 error_report("Could not get size of LPAR rtas '%s'", filename
);
2685 spapr
->rtas_blob
= g_malloc(spapr
->rtas_size
);
2686 if (load_image_size(filename
, spapr
->rtas_blob
, spapr
->rtas_size
) < 0) {
2687 error_report("Could not load LPAR rtas '%s'", filename
);
2690 if (spapr
->rtas_size
> RTAS_MAX_SIZE
) {
2691 error_report("RTAS too big ! 0x%zx bytes (max is 0x%x)",
2692 (size_t)spapr
->rtas_size
, RTAS_MAX_SIZE
);
2697 /* Set up RTAS event infrastructure */
2698 spapr_events_init(spapr
);
2700 /* Set up the RTC RTAS interfaces */
2701 spapr_rtc_create(spapr
);
2703 /* Set up VIO bus */
2704 spapr
->vio_bus
= spapr_vio_bus_init();
2706 for (i
= 0; i
< serial_max_hds(); i
++) {
2708 spapr_vty_create(spapr
->vio_bus
, serial_hd(i
));
2712 /* We always have at least the nvram device on VIO */
2713 spapr_create_nvram(spapr
);
2716 spapr_pci_rtas_init();
2718 phb
= spapr_create_phb(spapr
, 0);
2720 for (i
= 0; i
< nb_nics
; i
++) {
2721 NICInfo
*nd
= &nd_table
[i
];
2724 nd
->model
= g_strdup("spapr-vlan");
2727 if (g_str_equal(nd
->model
, "spapr-vlan") ||
2728 g_str_equal(nd
->model
, "ibmveth")) {
2729 spapr_vlan_create(spapr
->vio_bus
, nd
);
2731 pci_nic_init_nofail(&nd_table
[i
], phb
->bus
, nd
->model
, NULL
);
2735 for (i
= 0; i
<= drive_get_max_bus(IF_SCSI
); i
++) {
2736 spapr_vscsi_create(spapr
->vio_bus
);
2740 if (spapr_vga_init(phb
->bus
, &error_fatal
)) {
2741 spapr
->has_graphics
= true;
2742 machine
->usb
|= defaults_enabled() && !machine
->usb_disabled
;
2746 if (smc
->use_ohci_by_default
) {
2747 pci_create_simple(phb
->bus
, -1, "pci-ohci");
2749 pci_create_simple(phb
->bus
, -1, "nec-usb-xhci");
2752 if (spapr
->has_graphics
) {
2753 USBBus
*usb_bus
= usb_bus_find(-1);
2755 usb_create_simple(usb_bus
, "usb-kbd");
2756 usb_create_simple(usb_bus
, "usb-mouse");
2760 if (spapr
->rma_size
< (MIN_RMA_SLOF
<< 20)) {
2762 "pSeries SLOF firmware requires >= %ldM guest RMA (Real Mode Area memory)",
2767 if (kernel_filename
) {
2768 uint64_t lowaddr
= 0;
2770 spapr
->kernel_size
= load_elf(kernel_filename
, translate_kernel_address
,
2771 NULL
, NULL
, &lowaddr
, NULL
, 1,
2772 PPC_ELF_MACHINE
, 0, 0);
2773 if (spapr
->kernel_size
== ELF_LOAD_WRONG_ENDIAN
) {
2774 spapr
->kernel_size
= load_elf(kernel_filename
,
2775 translate_kernel_address
, NULL
, NULL
,
2776 &lowaddr
, NULL
, 0, PPC_ELF_MACHINE
,
2778 spapr
->kernel_le
= spapr
->kernel_size
> 0;
2780 if (spapr
->kernel_size
< 0) {
2781 error_report("error loading %s: %s", kernel_filename
,
2782 load_elf_strerror(spapr
->kernel_size
));
2787 if (initrd_filename
) {
2788 /* Try to locate the initrd in the gap between the kernel
2789 * and the firmware. Add a bit of space just in case
2791 spapr
->initrd_base
= (KERNEL_LOAD_ADDR
+ spapr
->kernel_size
2792 + 0x1ffff) & ~0xffff;
2793 spapr
->initrd_size
= load_image_targphys(initrd_filename
,
2796 - spapr
->initrd_base
);
2797 if (spapr
->initrd_size
< 0) {
2798 error_report("could not load initial ram disk '%s'",
2805 if (bios_name
== NULL
) {
2806 bios_name
= FW_FILE_NAME
;
2808 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
2810 error_report("Could not find LPAR firmware '%s'", bios_name
);
2813 fw_size
= load_image_targphys(filename
, 0, FW_MAX_SIZE
);
2815 error_report("Could not load LPAR firmware '%s'", filename
);
2820 /* FIXME: Should register things through the MachineState's qdev
2821 * interface, this is a legacy from the sPAPREnvironment structure
2822 * which predated MachineState but had a similar function */
2823 vmstate_register(NULL
, 0, &vmstate_spapr
, spapr
);
2824 register_savevm_live(NULL
, "spapr/htab", -1, 1,
2825 &savevm_htab_handlers
, spapr
);
2827 qemu_register_boot_set(spapr_boot_set
, spapr
);
2829 if (kvm_enabled()) {
2830 /* to stop and start vmclock */
2831 qemu_add_vm_change_state_handler(cpu_ppc_clock_vm_state_change
,
2834 kvmppc_spapr_enable_inkernel_multitce();
2838 static int spapr_kvm_type(const char *vm_type
)
2844 if (!strcmp(vm_type
, "HV")) {
2848 if (!strcmp(vm_type
, "PR")) {
2852 error_report("Unknown kvm-type specified '%s'", vm_type
);
2857 * Implementation of an interface to adjust firmware path
2858 * for the bootindex property handling.
2860 static char *spapr_get_fw_dev_path(FWPathProvider
*p
, BusState
*bus
,
2863 #define CAST(type, obj, name) \
2864 ((type *)object_dynamic_cast(OBJECT(obj), (name)))
2865 SCSIDevice
*d
= CAST(SCSIDevice
, dev
, TYPE_SCSI_DEVICE
);
2866 sPAPRPHBState
*phb
= CAST(sPAPRPHBState
, dev
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
2867 VHostSCSICommon
*vsc
= CAST(VHostSCSICommon
, dev
, TYPE_VHOST_SCSI_COMMON
);
2870 void *spapr
= CAST(void, bus
->parent
, "spapr-vscsi");
2871 VirtIOSCSI
*virtio
= CAST(VirtIOSCSI
, bus
->parent
, TYPE_VIRTIO_SCSI
);
2872 USBDevice
*usb
= CAST(USBDevice
, bus
->parent
, TYPE_USB_DEVICE
);
2876 * Replace "channel@0/disk@0,0" with "disk@8000000000000000":
2877 * We use SRP luns of the form 8000 | (bus << 8) | (id << 5) | lun
2878 * in the top 16 bits of the 64-bit LUN
2880 unsigned id
= 0x8000 | (d
->id
<< 8) | d
->lun
;
2881 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2882 (uint64_t)id
<< 48);
2883 } else if (virtio
) {
2885 * We use SRP luns of the form 01000000 | (target << 8) | lun
2886 * in the top 32 bits of the 64-bit LUN
2887 * Note: the quote above is from SLOF and it is wrong,
2888 * the actual binding is:
2889 * swap 0100 or 10 << or 20 << ( target lun-id -- srplun )
2891 unsigned id
= 0x1000000 | (d
->id
<< 16) | d
->lun
;
2892 if (d
->lun
>= 256) {
2893 /* Use the LUN "flat space addressing method" */
2896 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2897 (uint64_t)id
<< 32);
2900 * We use SRP luns of the form 01000000 | (usb-port << 16) | lun
2901 * in the top 32 bits of the 64-bit LUN
2903 unsigned usb_port
= atoi(usb
->port
->path
);
2904 unsigned id
= 0x1000000 | (usb_port
<< 16) | d
->lun
;
2905 return g_strdup_printf("%s@%"PRIX64
, qdev_fw_name(dev
),
2906 (uint64_t)id
<< 32);
2911 * SLOF probes the USB devices, and if it recognizes that the device is a
2912 * storage device, it changes its name to "storage" instead of "usb-host",
2913 * and additionally adds a child node for the SCSI LUN, so the correct
2914 * boot path in SLOF is something like .../storage@1/disk@xxx" instead.
2916 if (strcmp("usb-host", qdev_fw_name(dev
)) == 0) {
2917 USBDevice
*usbdev
= CAST(USBDevice
, dev
, TYPE_USB_DEVICE
);
2918 if (usb_host_dev_is_scsi_storage(usbdev
)) {
2919 return g_strdup_printf("storage@%s/disk", usbdev
->port
->path
);
2924 /* Replace "pci" with "pci@800000020000000" */
2925 return g_strdup_printf("pci@%"PRIX64
, phb
->buid
);
2929 /* Same logic as virtio above */
2930 unsigned id
= 0x1000000 | (vsc
->target
<< 16) | vsc
->lun
;
2931 return g_strdup_printf("disk@%"PRIX64
, (uint64_t)id
<< 32);
2934 if (g_str_equal("pci-bridge", qdev_fw_name(dev
))) {
2935 /* SLOF uses "pci" instead of "pci-bridge" for PCI bridges */
2936 PCIDevice
*pcidev
= CAST(PCIDevice
, dev
, TYPE_PCI_DEVICE
);
2937 return g_strdup_printf("pci@%x", PCI_SLOT(pcidev
->devfn
));
2943 static char *spapr_get_kvm_type(Object
*obj
, Error
**errp
)
2945 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2947 return g_strdup(spapr
->kvm_type
);
2950 static void spapr_set_kvm_type(Object
*obj
, const char *value
, Error
**errp
)
2952 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2954 g_free(spapr
->kvm_type
);
2955 spapr
->kvm_type
= g_strdup(value
);
2958 static bool spapr_get_modern_hotplug_events(Object
*obj
, Error
**errp
)
2960 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2962 return spapr
->use_hotplug_event_source
;
2965 static void spapr_set_modern_hotplug_events(Object
*obj
, bool value
,
2968 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2970 spapr
->use_hotplug_event_source
= value
;
2973 static bool spapr_get_msix_emulation(Object
*obj
, Error
**errp
)
2978 static char *spapr_get_resize_hpt(Object
*obj
, Error
**errp
)
2980 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2982 switch (spapr
->resize_hpt
) {
2983 case SPAPR_RESIZE_HPT_DEFAULT
:
2984 return g_strdup("default");
2985 case SPAPR_RESIZE_HPT_DISABLED
:
2986 return g_strdup("disabled");
2987 case SPAPR_RESIZE_HPT_ENABLED
:
2988 return g_strdup("enabled");
2989 case SPAPR_RESIZE_HPT_REQUIRED
:
2990 return g_strdup("required");
2992 g_assert_not_reached();
2995 static void spapr_set_resize_hpt(Object
*obj
, const char *value
, Error
**errp
)
2997 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
2999 if (strcmp(value
, "default") == 0) {
3000 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DEFAULT
;
3001 } else if (strcmp(value
, "disabled") == 0) {
3002 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_DISABLED
;
3003 } else if (strcmp(value
, "enabled") == 0) {
3004 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_ENABLED
;
3005 } else if (strcmp(value
, "required") == 0) {
3006 spapr
->resize_hpt
= SPAPR_RESIZE_HPT_REQUIRED
;
3008 error_setg(errp
, "Bad value for \"resize-hpt\" property");
3012 static void spapr_get_vsmt(Object
*obj
, Visitor
*v
, const char *name
,
3013 void *opaque
, Error
**errp
)
3015 visit_type_uint32(v
, name
, (uint32_t *)opaque
, errp
);
3018 static void spapr_set_vsmt(Object
*obj
, Visitor
*v
, const char *name
,
3019 void *opaque
, Error
**errp
)
3021 visit_type_uint32(v
, name
, (uint32_t *)opaque
, errp
);
3024 static void spapr_instance_init(Object
*obj
)
3026 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
3028 spapr
->htab_fd
= -1;
3029 spapr
->use_hotplug_event_source
= true;
3030 object_property_add_str(obj
, "kvm-type",
3031 spapr_get_kvm_type
, spapr_set_kvm_type
, NULL
);
3032 object_property_set_description(obj
, "kvm-type",
3033 "Specifies the KVM virtualization mode (HV, PR)",
3035 object_property_add_bool(obj
, "modern-hotplug-events",
3036 spapr_get_modern_hotplug_events
,
3037 spapr_set_modern_hotplug_events
,
3039 object_property_set_description(obj
, "modern-hotplug-events",
3040 "Use dedicated hotplug event mechanism in"
3041 " place of standard EPOW events when possible"
3042 " (required for memory hot-unplug support)",
3044 ppc_compat_add_property(obj
, "max-cpu-compat", &spapr
->max_compat_pvr
,
3045 "Maximum permitted CPU compatibility mode",
3048 object_property_add_str(obj
, "resize-hpt",
3049 spapr_get_resize_hpt
, spapr_set_resize_hpt
, NULL
);
3050 object_property_set_description(obj
, "resize-hpt",
3051 "Resizing of the Hash Page Table (enabled, disabled, required)",
3053 object_property_add(obj
, "vsmt", "uint32", spapr_get_vsmt
,
3054 spapr_set_vsmt
, NULL
, &spapr
->vsmt
, &error_abort
);
3055 object_property_set_description(obj
, "vsmt",
3056 "Virtual SMT: KVM behaves as if this were"
3057 " the host's SMT mode", &error_abort
);
3058 object_property_add_bool(obj
, "vfio-no-msix-emulation",
3059 spapr_get_msix_emulation
, NULL
, NULL
);
3062 static void spapr_machine_finalizefn(Object
*obj
)
3064 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
3066 g_free(spapr
->kvm_type
);
3069 void spapr_do_system_reset_on_cpu(CPUState
*cs
, run_on_cpu_data arg
)
3071 cpu_synchronize_state(cs
);
3072 ppc_cpu_do_system_reset(cs
);
3075 static void spapr_nmi(NMIState
*n
, int cpu_index
, Error
**errp
)
3080 async_run_on_cpu(cs
, spapr_do_system_reset_on_cpu
, RUN_ON_CPU_NULL
);
3084 static void spapr_add_lmbs(DeviceState
*dev
, uint64_t addr_start
, uint64_t size
,
3085 uint32_t node
, bool dedicated_hp_event_source
,
3088 sPAPRDRConnector
*drc
;
3089 uint32_t nr_lmbs
= size
/SPAPR_MEMORY_BLOCK_SIZE
;
3090 int i
, fdt_offset
, fdt_size
;
3092 uint64_t addr
= addr_start
;
3093 bool hotplugged
= spapr_drc_hotplugged(dev
);
3094 Error
*local_err
= NULL
;
3096 for (i
= 0; i
< nr_lmbs
; i
++) {
3097 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3098 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3101 fdt
= create_device_tree(&fdt_size
);
3102 fdt_offset
= spapr_populate_memory_node(fdt
, node
, addr
,
3103 SPAPR_MEMORY_BLOCK_SIZE
);
3105 spapr_drc_attach(drc
, dev
, fdt
, fdt_offset
, &local_err
);
3107 while (addr
> addr_start
) {
3108 addr
-= SPAPR_MEMORY_BLOCK_SIZE
;
3109 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3110 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3111 spapr_drc_detach(drc
);
3114 error_propagate(errp
, local_err
);
3118 spapr_drc_reset(drc
);
3120 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3122 /* send hotplug notification to the
3123 * guest only in case of hotplugged memory
3126 if (dedicated_hp_event_source
) {
3127 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3128 addr_start
/ SPAPR_MEMORY_BLOCK_SIZE
);
3129 spapr_hotplug_req_add_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB
,
3131 spapr_drc_index(drc
));
3133 spapr_hotplug_req_add_by_count(SPAPR_DR_CONNECTOR_TYPE_LMB
,
3139 static void spapr_memory_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3140 uint32_t node
, Error
**errp
)
3142 Error
*local_err
= NULL
;
3143 sPAPRMachineState
*ms
= SPAPR_MACHINE(hotplug_dev
);
3144 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3145 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3147 uint64_t align
, size
, addr
;
3149 mr
= ddc
->get_memory_region(dimm
, &local_err
);
3153 align
= memory_region_get_alignment(mr
);
3154 size
= memory_region_size(mr
);
3156 pc_dimm_memory_plug(dev
, MACHINE(ms
), align
, &local_err
);
3161 addr
= object_property_get_uint(OBJECT(dimm
),
3162 PC_DIMM_ADDR_PROP
, &local_err
);
3167 spapr_add_lmbs(dev
, addr
, size
, node
,
3168 spapr_ovec_test(ms
->ov5_cas
, OV5_HP_EVT
),
3177 pc_dimm_memory_unplug(dev
, MACHINE(ms
));
3179 error_propagate(errp
, local_err
);
3182 static void spapr_memory_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3185 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3186 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3191 mr
= ddc
->get_memory_region(dimm
, errp
);
3195 size
= memory_region_size(mr
);
3197 if (size
% SPAPR_MEMORY_BLOCK_SIZE
) {
3198 error_setg(errp
, "Hotplugged memory size must be a multiple of "
3199 "%lld MB", SPAPR_MEMORY_BLOCK_SIZE
/ M_BYTE
);
3203 mem_dev
= object_property_get_str(OBJECT(dimm
), PC_DIMM_MEMDEV_PROP
, NULL
);
3204 if (mem_dev
&& !kvmppc_is_mem_backend_page_size_ok(mem_dev
)) {
3205 error_setg(errp
, "Memory backend has bad page size. "
3206 "Use 'memory-backend-file' with correct mem-path.");
3214 struct sPAPRDIMMState
{
3217 QTAILQ_ENTRY(sPAPRDIMMState
) next
;
3220 static sPAPRDIMMState
*spapr_pending_dimm_unplugs_find(sPAPRMachineState
*s
,
3223 sPAPRDIMMState
*dimm_state
= NULL
;
3225 QTAILQ_FOREACH(dimm_state
, &s
->pending_dimm_unplugs
, next
) {
3226 if (dimm_state
->dimm
== dimm
) {
3233 static sPAPRDIMMState
*spapr_pending_dimm_unplugs_add(sPAPRMachineState
*spapr
,
3237 sPAPRDIMMState
*ds
= NULL
;
3240 * If this request is for a DIMM whose removal had failed earlier
3241 * (due to guest's refusal to remove the LMBs), we would have this
3242 * dimm already in the pending_dimm_unplugs list. In that
3243 * case don't add again.
3245 ds
= spapr_pending_dimm_unplugs_find(spapr
, dimm
);
3247 ds
= g_malloc0(sizeof(sPAPRDIMMState
));
3248 ds
->nr_lmbs
= nr_lmbs
;
3250 QTAILQ_INSERT_HEAD(&spapr
->pending_dimm_unplugs
, ds
, next
);
3255 static void spapr_pending_dimm_unplugs_remove(sPAPRMachineState
*spapr
,
3256 sPAPRDIMMState
*dimm_state
)
3258 QTAILQ_REMOVE(&spapr
->pending_dimm_unplugs
, dimm_state
, next
);
3262 static sPAPRDIMMState
*spapr_recover_pending_dimm_state(sPAPRMachineState
*ms
,
3265 sPAPRDRConnector
*drc
;
3266 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3267 MemoryRegion
*mr
= ddc
->get_memory_region(dimm
, &error_abort
);
3268 uint64_t size
= memory_region_size(mr
);
3269 uint32_t nr_lmbs
= size
/ SPAPR_MEMORY_BLOCK_SIZE
;
3270 uint32_t avail_lmbs
= 0;
3271 uint64_t addr_start
, addr
;
3274 addr_start
= object_property_get_int(OBJECT(dimm
), PC_DIMM_ADDR_PROP
,
3278 for (i
= 0; i
< nr_lmbs
; i
++) {
3279 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3280 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3285 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3288 return spapr_pending_dimm_unplugs_add(ms
, avail_lmbs
, dimm
);
3291 /* Callback to be called during DRC release. */
3292 void spapr_lmb_release(DeviceState
*dev
)
3294 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_hotplug_handler(dev
));
3295 sPAPRDIMMState
*ds
= spapr_pending_dimm_unplugs_find(spapr
, PC_DIMM(dev
));
3297 /* This information will get lost if a migration occurs
3298 * during the unplug process. In this case recover it. */
3300 ds
= spapr_recover_pending_dimm_state(spapr
, PC_DIMM(dev
));
3302 /* The DRC being examined by the caller at least must be counted */
3303 g_assert(ds
->nr_lmbs
);
3306 if (--ds
->nr_lmbs
) {
3311 * Now that all the LMBs have been removed by the guest, call the
3312 * pc-dimm unplug handler to cleanup up the pc-dimm device.
3314 pc_dimm_memory_unplug(dev
, MACHINE(spapr
));
3315 object_unparent(OBJECT(dev
));
3316 spapr_pending_dimm_unplugs_remove(spapr
, ds
);
3319 static void spapr_memory_unplug_request(HotplugHandler
*hotplug_dev
,
3320 DeviceState
*dev
, Error
**errp
)
3322 sPAPRMachineState
*spapr
= SPAPR_MACHINE(hotplug_dev
);
3323 Error
*local_err
= NULL
;
3324 PCDIMMDevice
*dimm
= PC_DIMM(dev
);
3325 PCDIMMDeviceClass
*ddc
= PC_DIMM_GET_CLASS(dimm
);
3328 uint64_t size
, addr_start
, addr
;
3330 sPAPRDRConnector
*drc
;
3332 mr
= ddc
->get_memory_region(dimm
, &local_err
);
3336 size
= memory_region_size(mr
);
3337 nr_lmbs
= size
/ SPAPR_MEMORY_BLOCK_SIZE
;
3339 addr_start
= object_property_get_uint(OBJECT(dimm
), PC_DIMM_ADDR_PROP
,
3346 * An existing pending dimm state for this DIMM means that there is an
3347 * unplug operation in progress, waiting for the spapr_lmb_release
3348 * callback to complete the job (BQL can't cover that far). In this case,
3349 * bail out to avoid detaching DRCs that were already released.
3351 if (spapr_pending_dimm_unplugs_find(spapr
, dimm
)) {
3352 error_setg(&local_err
,
3353 "Memory unplug already in progress for device %s",
3358 spapr_pending_dimm_unplugs_add(spapr
, nr_lmbs
, dimm
);
3361 for (i
= 0; i
< nr_lmbs
; i
++) {
3362 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3363 addr
/ SPAPR_MEMORY_BLOCK_SIZE
);
3366 spapr_drc_detach(drc
);
3367 addr
+= SPAPR_MEMORY_BLOCK_SIZE
;
3370 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_LMB
,
3371 addr_start
/ SPAPR_MEMORY_BLOCK_SIZE
);
3372 spapr_hotplug_req_remove_by_count_indexed(SPAPR_DR_CONNECTOR_TYPE_LMB
,
3373 nr_lmbs
, spapr_drc_index(drc
));
3375 error_propagate(errp
, local_err
);
3378 static void *spapr_populate_hotplug_cpu_dt(CPUState
*cs
, int *fdt_offset
,
3379 sPAPRMachineState
*spapr
)
3381 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3382 DeviceClass
*dc
= DEVICE_GET_CLASS(cs
);
3383 int id
= spapr_get_vcpu_id(cpu
);
3385 int offset
, fdt_size
;
3388 fdt
= create_device_tree(&fdt_size
);
3389 nodename
= g_strdup_printf("%s@%x", dc
->fw_name
, id
);
3390 offset
= fdt_add_subnode(fdt
, 0, nodename
);
3392 spapr_populate_cpu_dt(cs
, fdt
, offset
, spapr
);
3395 *fdt_offset
= offset
;
3399 /* Callback to be called during DRC release. */
3400 void spapr_core_release(DeviceState
*dev
)
3402 MachineState
*ms
= MACHINE(qdev_get_hotplug_handler(dev
));
3403 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(ms
);
3404 CPUCore
*cc
= CPU_CORE(dev
);
3405 CPUArchId
*core_slot
= spapr_find_cpu_slot(ms
, cc
->core_id
, NULL
);
3407 if (smc
->pre_2_10_has_unused_icps
) {
3408 sPAPRCPUCore
*sc
= SPAPR_CPU_CORE(OBJECT(dev
));
3411 for (i
= 0; i
< cc
->nr_threads
; i
++) {
3412 CPUState
*cs
= CPU(sc
->threads
[i
]);
3414 pre_2_10_vmstate_register_dummy_icp(cs
->cpu_index
);
3419 core_slot
->cpu
= NULL
;
3420 object_unparent(OBJECT(dev
));
3424 void spapr_core_unplug_request(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3427 sPAPRMachineState
*spapr
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3429 sPAPRDRConnector
*drc
;
3430 CPUCore
*cc
= CPU_CORE(dev
);
3432 if (!spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
)) {
3433 error_setg(errp
, "Unable to find CPU core with core-id: %d",
3438 error_setg(errp
, "Boot CPU core may not be unplugged");
3442 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
,
3443 spapr_vcpu_id(spapr
, cc
->core_id
));
3446 spapr_drc_detach(drc
);
3448 spapr_hotplug_req_remove_by_index(drc
);
3451 static void spapr_core_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3454 sPAPRMachineState
*spapr
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3455 MachineClass
*mc
= MACHINE_GET_CLASS(spapr
);
3456 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
3457 sPAPRCPUCore
*core
= SPAPR_CPU_CORE(OBJECT(dev
));
3458 CPUCore
*cc
= CPU_CORE(dev
);
3459 CPUState
*cs
= CPU(core
->threads
[0]);
3460 sPAPRDRConnector
*drc
;
3461 Error
*local_err
= NULL
;
3462 CPUArchId
*core_slot
;
3464 bool hotplugged
= spapr_drc_hotplugged(dev
);
3466 core_slot
= spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
);
3468 error_setg(errp
, "Unable to find CPU core with core-id: %d",
3472 drc
= spapr_drc_by_id(TYPE_SPAPR_DRC_CPU
,
3473 spapr_vcpu_id(spapr
, cc
->core_id
));
3475 g_assert(drc
|| !mc
->has_hotpluggable_cpus
);
3481 fdt
= spapr_populate_hotplug_cpu_dt(cs
, &fdt_offset
, spapr
);
3483 spapr_drc_attach(drc
, dev
, fdt
, fdt_offset
, &local_err
);
3486 error_propagate(errp
, local_err
);
3492 * Send hotplug notification interrupt to the guest only
3493 * in case of hotplugged CPUs.
3495 spapr_hotplug_req_add_by_index(drc
);
3497 spapr_drc_reset(drc
);
3501 core_slot
->cpu
= OBJECT(dev
);
3503 if (smc
->pre_2_10_has_unused_icps
) {
3506 for (i
= 0; i
< cc
->nr_threads
; i
++) {
3507 cs
= CPU(core
->threads
[i
]);
3508 pre_2_10_vmstate_unregister_dummy_icp(cs
->cpu_index
);
3513 static void spapr_core_pre_plug(HotplugHandler
*hotplug_dev
, DeviceState
*dev
,
3516 MachineState
*machine
= MACHINE(OBJECT(hotplug_dev
));
3517 MachineClass
*mc
= MACHINE_GET_CLASS(hotplug_dev
);
3518 Error
*local_err
= NULL
;
3519 CPUCore
*cc
= CPU_CORE(dev
);
3520 const char *base_core_type
= spapr_get_cpu_core_type(machine
->cpu_type
);
3521 const char *type
= object_get_typename(OBJECT(dev
));
3522 CPUArchId
*core_slot
;
3525 if (dev
->hotplugged
&& !mc
->has_hotpluggable_cpus
) {
3526 error_setg(&local_err
, "CPU hotplug not supported for this machine");
3530 if (strcmp(base_core_type
, type
)) {
3531 error_setg(&local_err
, "CPU core type should be %s", base_core_type
);
3535 if (cc
->core_id
% smp_threads
) {
3536 error_setg(&local_err
, "invalid core id %d", cc
->core_id
);
3541 * In general we should have homogeneous threads-per-core, but old
3542 * (pre hotplug support) machine types allow the last core to have
3543 * reduced threads as a compatibility hack for when we allowed
3544 * total vcpus not a multiple of threads-per-core.
3546 if (mc
->has_hotpluggable_cpus
&& (cc
->nr_threads
!= smp_threads
)) {
3547 error_setg(&local_err
, "invalid nr-threads %d, must be %d",
3548 cc
->nr_threads
, smp_threads
);
3552 core_slot
= spapr_find_cpu_slot(MACHINE(hotplug_dev
), cc
->core_id
, &index
);
3554 error_setg(&local_err
, "core id %d out of range", cc
->core_id
);
3558 if (core_slot
->cpu
) {
3559 error_setg(&local_err
, "core %d already populated", cc
->core_id
);
3563 numa_cpu_pre_plug(core_slot
, dev
, &local_err
);
3566 error_propagate(errp
, local_err
);
3569 static void spapr_machine_device_plug(HotplugHandler
*hotplug_dev
,
3570 DeviceState
*dev
, Error
**errp
)
3572 MachineState
*ms
= MACHINE(hotplug_dev
);
3573 sPAPRMachineClass
*smc
= SPAPR_MACHINE_GET_CLASS(ms
);
3575 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3578 if (!smc
->dr_lmb_enabled
) {
3579 error_setg(errp
, "Memory hotplug not supported for this machine");
3582 node
= object_property_get_uint(OBJECT(dev
), PC_DIMM_NODE_PROP
, errp
);
3586 if (node
< 0 || node
>= MAX_NODES
) {
3587 error_setg(errp
, "Invaild node %d", node
);
3591 spapr_memory_plug(hotplug_dev
, dev
, node
, errp
);
3592 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3593 spapr_core_plug(hotplug_dev
, dev
, errp
);
3597 static void spapr_machine_device_unplug_request(HotplugHandler
*hotplug_dev
,
3598 DeviceState
*dev
, Error
**errp
)
3600 sPAPRMachineState
*sms
= SPAPR_MACHINE(OBJECT(hotplug_dev
));
3601 MachineClass
*mc
= MACHINE_GET_CLASS(sms
);
3603 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3604 if (spapr_ovec_test(sms
->ov5_cas
, OV5_HP_EVT
)) {
3605 spapr_memory_unplug_request(hotplug_dev
, dev
, errp
);
3607 /* NOTE: this means there is a window after guest reset, prior to
3608 * CAS negotiation, where unplug requests will fail due to the
3609 * capability not being detected yet. This is a bit different than
3610 * the case with PCI unplug, where the events will be queued and
3611 * eventually handled by the guest after boot
3613 error_setg(errp
, "Memory hot unplug not supported for this guest");
3615 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3616 if (!mc
->has_hotpluggable_cpus
) {
3617 error_setg(errp
, "CPU hot unplug not supported on this machine");
3620 spapr_core_unplug_request(hotplug_dev
, dev
, errp
);
3624 static void spapr_machine_device_pre_plug(HotplugHandler
*hotplug_dev
,
3625 DeviceState
*dev
, Error
**errp
)
3627 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
3628 spapr_memory_pre_plug(hotplug_dev
, dev
, errp
);
3629 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3630 spapr_core_pre_plug(hotplug_dev
, dev
, errp
);
3634 static HotplugHandler
*spapr_get_hotplug_handler(MachineState
*machine
,
3637 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
) ||
3638 object_dynamic_cast(OBJECT(dev
), TYPE_SPAPR_CPU_CORE
)) {
3639 return HOTPLUG_HANDLER(machine
);
3644 static CpuInstanceProperties
3645 spapr_cpu_index_to_props(MachineState
*machine
, unsigned cpu_index
)
3647 CPUArchId
*core_slot
;
3648 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
3650 /* make sure possible_cpu are intialized */
3651 mc
->possible_cpu_arch_ids(machine
);
3652 /* get CPU core slot containing thread that matches cpu_index */
3653 core_slot
= spapr_find_cpu_slot(machine
, cpu_index
, NULL
);
3655 return core_slot
->props
;
3658 static int64_t spapr_get_default_cpu_node_id(const MachineState
*ms
, int idx
)
3660 return idx
/ smp_cores
% nb_numa_nodes
;
3663 static const CPUArchIdList
*spapr_possible_cpu_arch_ids(MachineState
*machine
)
3666 const char *core_type
;
3667 int spapr_max_cores
= max_cpus
/ smp_threads
;
3668 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
3670 if (!mc
->has_hotpluggable_cpus
) {
3671 spapr_max_cores
= QEMU_ALIGN_UP(smp_cpus
, smp_threads
) / smp_threads
;
3673 if (machine
->possible_cpus
) {
3674 assert(machine
->possible_cpus
->len
== spapr_max_cores
);
3675 return machine
->possible_cpus
;
3678 core_type
= spapr_get_cpu_core_type(machine
->cpu_type
);
3680 error_report("Unable to find sPAPR CPU Core definition");
3684 machine
->possible_cpus
= g_malloc0(sizeof(CPUArchIdList
) +
3685 sizeof(CPUArchId
) * spapr_max_cores
);
3686 machine
->possible_cpus
->len
= spapr_max_cores
;
3687 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
3688 int core_id
= i
* smp_threads
;
3690 machine
->possible_cpus
->cpus
[i
].type
= core_type
;
3691 machine
->possible_cpus
->cpus
[i
].vcpus_count
= smp_threads
;
3692 machine
->possible_cpus
->cpus
[i
].arch_id
= core_id
;
3693 machine
->possible_cpus
->cpus
[i
].props
.has_core_id
= true;
3694 machine
->possible_cpus
->cpus
[i
].props
.core_id
= core_id
;
3696 return machine
->possible_cpus
;
3699 static void spapr_phb_placement(sPAPRMachineState
*spapr
, uint32_t index
,
3700 uint64_t *buid
, hwaddr
*pio
,
3701 hwaddr
*mmio32
, hwaddr
*mmio64
,
3702 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
3705 * New-style PHB window placement.
3707 * Goals: Gives large (1TiB), naturally aligned 64-bit MMIO window
3708 * for each PHB, in addition to 2GiB 32-bit MMIO and 64kiB PIO
3711 * Some guest kernels can't work with MMIO windows above 1<<46
3712 * (64TiB), so we place up to 31 PHBs in the area 32TiB..64TiB
3714 * 32TiB..(33TiB+1984kiB) contains the 64kiB PIO windows for each
3715 * PHB stacked together. (32TiB+2GiB)..(32TiB+64GiB) contains the
3716 * 2GiB 32-bit MMIO windows for each PHB. Then 33..64TiB has the
3717 * 1TiB 64-bit MMIO windows for each PHB.
3719 const uint64_t base_buid
= 0x800000020000000ULL
;
3720 #define SPAPR_MAX_PHBS ((SPAPR_PCI_LIMIT - SPAPR_PCI_BASE) / \
3721 SPAPR_PCI_MEM64_WIN_SIZE - 1)
3724 /* Sanity check natural alignments */
3725 QEMU_BUILD_BUG_ON((SPAPR_PCI_BASE
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
3726 QEMU_BUILD_BUG_ON((SPAPR_PCI_LIMIT
% SPAPR_PCI_MEM64_WIN_SIZE
) != 0);
3727 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM64_WIN_SIZE
% SPAPR_PCI_MEM32_WIN_SIZE
) != 0);
3728 QEMU_BUILD_BUG_ON((SPAPR_PCI_MEM32_WIN_SIZE
% SPAPR_PCI_IO_WIN_SIZE
) != 0);
3729 /* Sanity check bounds */
3730 QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS
* SPAPR_PCI_IO_WIN_SIZE
) >
3731 SPAPR_PCI_MEM32_WIN_SIZE
);
3732 QEMU_BUILD_BUG_ON((SPAPR_MAX_PHBS
* SPAPR_PCI_MEM32_WIN_SIZE
) >
3733 SPAPR_PCI_MEM64_WIN_SIZE
);
3735 if (index
>= SPAPR_MAX_PHBS
) {
3736 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %llu)",
3737 SPAPR_MAX_PHBS
- 1);
3741 *buid
= base_buid
+ index
;
3742 for (i
= 0; i
< n_dma
; ++i
) {
3743 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
3746 *pio
= SPAPR_PCI_BASE
+ index
* SPAPR_PCI_IO_WIN_SIZE
;
3747 *mmio32
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM32_WIN_SIZE
;
3748 *mmio64
= SPAPR_PCI_BASE
+ (index
+ 1) * SPAPR_PCI_MEM64_WIN_SIZE
;
3751 static ICSState
*spapr_ics_get(XICSFabric
*dev
, int irq
)
3753 sPAPRMachineState
*spapr
= SPAPR_MACHINE(dev
);
3755 return ics_valid_irq(spapr
->ics
, irq
) ? spapr
->ics
: NULL
;
3758 static void spapr_ics_resend(XICSFabric
*dev
)
3760 sPAPRMachineState
*spapr
= SPAPR_MACHINE(dev
);
3762 ics_resend(spapr
->ics
);
3765 static ICPState
*spapr_icp_get(XICSFabric
*xi
, int vcpu_id
)
3767 PowerPCCPU
*cpu
= spapr_find_cpu(vcpu_id
);
3769 return cpu
? ICP(cpu
->intc
) : NULL
;
3772 #define ICS_IRQ_FREE(ics, srcno) \
3773 (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK)))
3775 static int ics_find_free_block(ICSState
*ics
, int num
, int alignnum
)
3779 for (first
= 0; first
< ics
->nr_irqs
; first
+= alignnum
) {
3780 if (num
> (ics
->nr_irqs
- first
)) {
3783 for (i
= first
; i
< first
+ num
; ++i
) {
3784 if (!ICS_IRQ_FREE(ics
, i
)) {
3788 if (i
== (first
+ num
)) {
3797 * Allocate the IRQ number and set the IRQ type, LSI or MSI
3799 static void spapr_irq_set_lsi(sPAPRMachineState
*spapr
, int irq
, bool lsi
)
3801 ics_set_irq_type(spapr
->ics
, irq
- spapr
->ics
->offset
, lsi
);
3804 int spapr_irq_alloc(sPAPRMachineState
*spapr
, int irq_hint
, bool lsi
,
3807 ICSState
*ics
= spapr
->ics
;
3813 if (!ICS_IRQ_FREE(ics
, irq_hint
- ics
->offset
)) {
3814 error_setg(errp
, "can't allocate IRQ %d: already in use", irq_hint
);
3819 irq
= ics_find_free_block(ics
, 1, 1);
3821 error_setg(errp
, "can't allocate IRQ: no IRQ left");
3827 spapr_irq_set_lsi(spapr
, irq
, lsi
);
3828 trace_spapr_irq_alloc(irq
);
3834 * Allocate block of consecutive IRQs, and return the number of the first IRQ in
3835 * the block. If align==true, aligns the first IRQ number to num.
3837 int spapr_irq_alloc_block(sPAPRMachineState
*spapr
, int num
, bool lsi
,
3838 bool align
, Error
**errp
)
3840 ICSState
*ics
= spapr
->ics
;
3846 * MSIMesage::data is used for storing VIRQ so
3847 * it has to be aligned to num to support multiple
3848 * MSI vectors. MSI-X is not affected by this.
3849 * The hint is used for the first IRQ, the rest should
3850 * be allocated continuously.
3853 assert((num
== 1) || (num
== 2) || (num
== 4) ||
3854 (num
== 8) || (num
== 16) || (num
== 32));
3855 first
= ics_find_free_block(ics
, num
, num
);
3857 first
= ics_find_free_block(ics
, num
, 1);
3860 error_setg(errp
, "can't find a free %d-IRQ block", num
);
3864 first
+= ics
->offset
;
3865 for (i
= first
; i
< first
+ num
; ++i
) {
3866 spapr_irq_set_lsi(spapr
, i
, lsi
);
3869 trace_spapr_irq_alloc_block(first
, num
, lsi
, align
);
3874 void spapr_irq_free(sPAPRMachineState
*spapr
, int irq
, int num
)
3876 ICSState
*ics
= spapr
->ics
;
3877 int srcno
= irq
- ics
->offset
;
3880 if (ics_valid_irq(ics
, irq
)) {
3881 trace_spapr_irq_free(0, irq
, num
);
3882 for (i
= srcno
; i
< srcno
+ num
; ++i
) {
3883 if (ICS_IRQ_FREE(ics
, i
)) {
3884 trace_spapr_irq_free_warn(0, i
+ ics
->offset
);
3886 memset(&ics
->irqs
[i
], 0, sizeof(ICSIRQState
));
3891 qemu_irq
spapr_qirq(sPAPRMachineState
*spapr
, int irq
)
3893 ICSState
*ics
= spapr
->ics
;
3895 if (ics_valid_irq(ics
, irq
)) {
3896 return ics
->qirqs
[irq
- ics
->offset
];
3902 static void spapr_pic_print_info(InterruptStatsProvider
*obj
,
3905 sPAPRMachineState
*spapr
= SPAPR_MACHINE(obj
);
3909 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3911 icp_pic_print_info(ICP(cpu
->intc
), mon
);
3914 ics_pic_print_info(spapr
->ics
, mon
);
3917 int spapr_get_vcpu_id(PowerPCCPU
*cpu
)
3919 return cpu
->vcpu_id
;
3922 void spapr_set_vcpu_id(PowerPCCPU
*cpu
, int cpu_index
, Error
**errp
)
3924 sPAPRMachineState
*spapr
= SPAPR_MACHINE(qdev_get_machine());
3927 vcpu_id
= spapr_vcpu_id(spapr
, cpu_index
);
3929 if (kvm_enabled() && !kvm_vcpu_id_is_valid(vcpu_id
)) {
3930 error_setg(errp
, "Can't create CPU with id %d in KVM", vcpu_id
);
3931 error_append_hint(errp
, "Adjust the number of cpus to %d "
3932 "or try to raise the number of threads per core\n",
3933 vcpu_id
* smp_threads
/ spapr
->vsmt
);
3937 cpu
->vcpu_id
= vcpu_id
;
3940 PowerPCCPU
*spapr_find_cpu(int vcpu_id
)
3945 PowerPCCPU
*cpu
= POWERPC_CPU(cs
);
3947 if (spapr_get_vcpu_id(cpu
) == vcpu_id
) {
3955 static void spapr_machine_class_init(ObjectClass
*oc
, void *data
)
3957 MachineClass
*mc
= MACHINE_CLASS(oc
);
3958 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(oc
);
3959 FWPathProviderClass
*fwc
= FW_PATH_PROVIDER_CLASS(oc
);
3960 NMIClass
*nc
= NMI_CLASS(oc
);
3961 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(oc
);
3962 PPCVirtualHypervisorClass
*vhc
= PPC_VIRTUAL_HYPERVISOR_CLASS(oc
);
3963 XICSFabricClass
*xic
= XICS_FABRIC_CLASS(oc
);
3964 InterruptStatsProviderClass
*ispc
= INTERRUPT_STATS_PROVIDER_CLASS(oc
);
3966 mc
->desc
= "pSeries Logical Partition (PAPR compliant)";
3969 * We set up the default / latest behaviour here. The class_init
3970 * functions for the specific versioned machine types can override
3971 * these details for backwards compatibility
3973 mc
->init
= spapr_machine_init
;
3974 mc
->reset
= spapr_machine_reset
;
3975 mc
->block_default_type
= IF_SCSI
;
3976 mc
->max_cpus
= 1024;
3977 mc
->no_parallel
= 1;
3978 mc
->default_boot_order
= "";
3979 mc
->default_ram_size
= 512 * M_BYTE
;
3980 mc
->kvm_type
= spapr_kvm_type
;
3981 machine_class_allow_dynamic_sysbus_dev(mc
, TYPE_SPAPR_PCI_HOST_BRIDGE
);
3982 mc
->pci_allow_0_address
= true;
3983 assert(!mc
->get_hotplug_handler
);
3984 mc
->get_hotplug_handler
= spapr_get_hotplug_handler
;
3985 hc
->pre_plug
= spapr_machine_device_pre_plug
;
3986 hc
->plug
= spapr_machine_device_plug
;
3987 mc
->cpu_index_to_instance_props
= spapr_cpu_index_to_props
;
3988 mc
->get_default_cpu_node_id
= spapr_get_default_cpu_node_id
;
3989 mc
->possible_cpu_arch_ids
= spapr_possible_cpu_arch_ids
;
3990 hc
->unplug_request
= spapr_machine_device_unplug_request
;
3992 smc
->dr_lmb_enabled
= true;
3993 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("power8_v2.0");
3994 mc
->has_hotpluggable_cpus
= true;
3995 smc
->resize_hpt_default
= SPAPR_RESIZE_HPT_ENABLED
;
3996 fwc
->get_dev_path
= spapr_get_fw_dev_path
;
3997 nc
->nmi_monitor_handler
= spapr_nmi
;
3998 smc
->phb_placement
= spapr_phb_placement
;
3999 vhc
->hypercall
= emulate_spapr_hypercall
;
4000 vhc
->hpt_mask
= spapr_hpt_mask
;
4001 vhc
->map_hptes
= spapr_map_hptes
;
4002 vhc
->unmap_hptes
= spapr_unmap_hptes
;
4003 vhc
->store_hpte
= spapr_store_hpte
;
4004 vhc
->get_patbe
= spapr_get_patbe
;
4005 vhc
->encode_hpt_for_kvm_pr
= spapr_encode_hpt_for_kvm_pr
;
4006 xic
->ics_get
= spapr_ics_get
;
4007 xic
->ics_resend
= spapr_ics_resend
;
4008 xic
->icp_get
= spapr_icp_get
;
4009 ispc
->print_info
= spapr_pic_print_info
;
4010 /* Force NUMA node memory size to be a multiple of
4011 * SPAPR_MEMORY_BLOCK_SIZE (256M) since that's the granularity
4012 * in which LMBs are represented and hot-added
4014 mc
->numa_mem_align_shift
= 28;
4016 smc
->default_caps
.caps
[SPAPR_CAP_HTM
] = SPAPR_CAP_OFF
;
4017 smc
->default_caps
.caps
[SPAPR_CAP_VSX
] = SPAPR_CAP_ON
;
4018 smc
->default_caps
.caps
[SPAPR_CAP_DFP
] = SPAPR_CAP_ON
;
4019 smc
->default_caps
.caps
[SPAPR_CAP_CFPC
] = SPAPR_CAP_BROKEN
;
4020 smc
->default_caps
.caps
[SPAPR_CAP_SBBC
] = SPAPR_CAP_BROKEN
;
4021 smc
->default_caps
.caps
[SPAPR_CAP_IBS
] = SPAPR_CAP_BROKEN
;
4022 spapr_caps_add_properties(smc
, &error_abort
);
4025 static const TypeInfo spapr_machine_info
= {
4026 .name
= TYPE_SPAPR_MACHINE
,
4027 .parent
= TYPE_MACHINE
,
4029 .instance_size
= sizeof(sPAPRMachineState
),
4030 .instance_init
= spapr_instance_init
,
4031 .instance_finalize
= spapr_machine_finalizefn
,
4032 .class_size
= sizeof(sPAPRMachineClass
),
4033 .class_init
= spapr_machine_class_init
,
4034 .interfaces
= (InterfaceInfo
[]) {
4035 { TYPE_FW_PATH_PROVIDER
},
4037 { TYPE_HOTPLUG_HANDLER
},
4038 { TYPE_PPC_VIRTUAL_HYPERVISOR
},
4039 { TYPE_XICS_FABRIC
},
4040 { TYPE_INTERRUPT_STATS_PROVIDER
},
4045 #define DEFINE_SPAPR_MACHINE(suffix, verstr, latest) \
4046 static void spapr_machine_##suffix##_class_init(ObjectClass *oc, \
4049 MachineClass *mc = MACHINE_CLASS(oc); \
4050 spapr_machine_##suffix##_class_options(mc); \
4052 mc->alias = "pseries"; \
4053 mc->is_default = 1; \
4056 static void spapr_machine_##suffix##_instance_init(Object *obj) \
4058 MachineState *machine = MACHINE(obj); \
4059 spapr_machine_##suffix##_instance_options(machine); \
4061 static const TypeInfo spapr_machine_##suffix##_info = { \
4062 .name = MACHINE_TYPE_NAME("pseries-" verstr), \
4063 .parent = TYPE_SPAPR_MACHINE, \
4064 .class_init = spapr_machine_##suffix##_class_init, \
4065 .instance_init = spapr_machine_##suffix##_instance_init, \
4067 static void spapr_machine_register_##suffix(void) \
4069 type_register(&spapr_machine_##suffix##_info); \
4071 type_init(spapr_machine_register_##suffix)
4076 static void spapr_machine_2_13_instance_options(MachineState
*machine
)
4080 static void spapr_machine_2_13_class_options(MachineClass
*mc
)
4082 /* Defaults for the latest behaviour inherited from the base class */
4085 DEFINE_SPAPR_MACHINE(2_13
, "2.13", true);
4090 #define SPAPR_COMPAT_2_12 \
4093 .driver = TYPE_POWERPC_CPU, \
4094 .property = "pre-2.13-migration", \
4098 static void spapr_machine_2_12_instance_options(MachineState
*machine
)
4100 spapr_machine_2_13_instance_options(machine
);
4103 static void spapr_machine_2_12_class_options(MachineClass
*mc
)
4105 spapr_machine_2_13_class_options(mc
);
4106 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_12
);
4109 DEFINE_SPAPR_MACHINE(2_12
, "2.12", false);
4111 static void spapr_machine_2_12_sxxm_instance_options(MachineState
*machine
)
4113 spapr_machine_2_12_instance_options(machine
);
4116 static void spapr_machine_2_12_sxxm_class_options(MachineClass
*mc
)
4118 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4120 spapr_machine_2_12_class_options(mc
);
4121 smc
->default_caps
.caps
[SPAPR_CAP_CFPC
] = SPAPR_CAP_WORKAROUND
;
4122 smc
->default_caps
.caps
[SPAPR_CAP_SBBC
] = SPAPR_CAP_WORKAROUND
;
4123 smc
->default_caps
.caps
[SPAPR_CAP_IBS
] = SPAPR_CAP_FIXED_CCD
;
4126 DEFINE_SPAPR_MACHINE(2_12_sxxm
, "2.12-sxxm", false);
4131 #define SPAPR_COMPAT_2_11 \
4134 static void spapr_machine_2_11_instance_options(MachineState
*machine
)
4136 spapr_machine_2_12_instance_options(machine
);
4139 static void spapr_machine_2_11_class_options(MachineClass
*mc
)
4141 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4143 spapr_machine_2_12_class_options(mc
);
4144 smc
->default_caps
.caps
[SPAPR_CAP_HTM
] = SPAPR_CAP_ON
;
4145 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_11
);
4148 DEFINE_SPAPR_MACHINE(2_11
, "2.11", false);
4153 #define SPAPR_COMPAT_2_10 \
4156 static void spapr_machine_2_10_instance_options(MachineState
*machine
)
4158 spapr_machine_2_11_instance_options(machine
);
4161 static void spapr_machine_2_10_class_options(MachineClass
*mc
)
4163 spapr_machine_2_11_class_options(mc
);
4164 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_10
);
4167 DEFINE_SPAPR_MACHINE(2_10
, "2.10", false);
4172 #define SPAPR_COMPAT_2_9 \
4175 .driver = TYPE_POWERPC_CPU, \
4176 .property = "pre-2.10-migration", \
4180 static void spapr_machine_2_9_instance_options(MachineState *machine)
4182 spapr_machine_2_10_instance_options(machine
);
4185 static void spapr_machine_2_9_class_options(MachineClass
*mc
)
4187 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4189 spapr_machine_2_10_class_options(mc
);
4190 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_9
);
4191 mc
->numa_auto_assign_ram
= numa_legacy_auto_assign_ram
;
4192 smc
->pre_2_10_has_unused_icps
= true;
4193 smc
->resize_hpt_default
= SPAPR_RESIZE_HPT_DISABLED
;
4196 DEFINE_SPAPR_MACHINE(2_9
, "2.9", false);
4201 #define SPAPR_COMPAT_2_8 \
4204 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
4205 .property = "pcie-extended-configuration-space", \
4209 static void spapr_machine_2_8_instance_options(MachineState
*machine
)
4211 spapr_machine_2_9_instance_options(machine
);
4214 static void spapr_machine_2_8_class_options(MachineClass
*mc
)
4216 spapr_machine_2_9_class_options(mc
);
4217 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_8
);
4218 mc
->numa_mem_align_shift
= 23;
4221 DEFINE_SPAPR_MACHINE(2_8
, "2.8", false);
4226 #define SPAPR_COMPAT_2_7 \
4229 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
4230 .property = "mem_win_size", \
4231 .value = stringify(SPAPR_PCI_2_7_MMIO_WIN_SIZE),\
4234 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
4235 .property = "mem64_win_size", \
4239 .driver = TYPE_POWERPC_CPU, \
4240 .property = "pre-2.8-migration", \
4244 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE, \
4245 .property = "pre-2.8-migration", \
4249 static void phb_placement_2_7(sPAPRMachineState
*spapr
, uint32_t index
,
4250 uint64_t *buid
, hwaddr
*pio
,
4251 hwaddr
*mmio32
, hwaddr
*mmio64
,
4252 unsigned n_dma
, uint32_t *liobns
, Error
**errp
)
4254 /* Legacy PHB placement for pseries-2.7 and earlier machine types */
4255 const uint64_t base_buid
= 0x800000020000000ULL
;
4256 const hwaddr phb_spacing
= 0x1000000000ULL
; /* 64 GiB */
4257 const hwaddr mmio_offset
= 0xa0000000; /* 2 GiB + 512 MiB */
4258 const hwaddr pio_offset
= 0x80000000; /* 2 GiB */
4259 const uint32_t max_index
= 255;
4260 const hwaddr phb0_alignment
= 0x10000000000ULL
; /* 1 TiB */
4262 uint64_t ram_top
= MACHINE(spapr
)->ram_size
;
4263 hwaddr phb0_base
, phb_base
;
4266 /* Do we have device memory? */
4267 if (MACHINE(spapr
)->maxram_size
> ram_top
) {
4268 /* Can't just use maxram_size, because there may be an
4269 * alignment gap between normal and device memory regions
4271 ram_top
= MACHINE(spapr
)->device_memory
->base
+
4272 memory_region_size(&MACHINE(spapr
)->device_memory
->mr
);
4275 phb0_base
= QEMU_ALIGN_UP(ram_top
, phb0_alignment
);
4277 if (index
> max_index
) {
4278 error_setg(errp
, "\"index\" for PAPR PHB is too large (max %u)",
4283 *buid
= base_buid
+ index
;
4284 for (i
= 0; i
< n_dma
; ++i
) {
4285 liobns
[i
] = SPAPR_PCI_LIOBN(index
, i
);
4288 phb_base
= phb0_base
+ index
* phb_spacing
;
4289 *pio
= phb_base
+ pio_offset
;
4290 *mmio32
= phb_base
+ mmio_offset
;
4292 * We don't set the 64-bit MMIO window, relying on the PHB's
4293 * fallback behaviour of automatically splitting a large "32-bit"
4294 * window into contiguous 32-bit and 64-bit windows
4298 static void spapr_machine_2_7_instance_options(MachineState
*machine
)
4300 sPAPRMachineState
*spapr
= SPAPR_MACHINE(machine
);
4302 spapr_machine_2_8_instance_options(machine
);
4303 spapr
->use_hotplug_event_source
= false;
4306 static void spapr_machine_2_7_class_options(MachineClass
*mc
)
4308 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4310 spapr_machine_2_8_class_options(mc
);
4311 mc
->default_cpu_type
= POWERPC_CPU_TYPE_NAME("power7_v2.3");
4312 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_7
);
4313 smc
->phb_placement
= phb_placement_2_7
;
4316 DEFINE_SPAPR_MACHINE(2_7
, "2.7", false);
4321 #define SPAPR_COMPAT_2_6 \
4324 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
4326 .value = stringify(off),\
4329 static void spapr_machine_2_6_instance_options(MachineState
*machine
)
4331 spapr_machine_2_7_instance_options(machine
);
4334 static void spapr_machine_2_6_class_options(MachineClass
*mc
)
4336 spapr_machine_2_7_class_options(mc
);
4337 mc
->has_hotpluggable_cpus
= false;
4338 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_6
);
4341 DEFINE_SPAPR_MACHINE(2_6
, "2.6", false);
4346 #define SPAPR_COMPAT_2_5 \
4349 .driver = "spapr-vlan", \
4350 .property = "use-rx-buffer-pools", \
4354 static void spapr_machine_2_5_instance_options(MachineState
*machine
)
4356 spapr_machine_2_6_instance_options(machine
);
4359 static void spapr_machine_2_5_class_options(MachineClass
*mc
)
4361 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4363 spapr_machine_2_6_class_options(mc
);
4364 smc
->use_ohci_by_default
= true;
4365 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_5
);
4368 DEFINE_SPAPR_MACHINE(2_5
, "2.5", false);
4373 #define SPAPR_COMPAT_2_4 \
4376 static void spapr_machine_2_4_instance_options(MachineState
*machine
)
4378 spapr_machine_2_5_instance_options(machine
);
4381 static void spapr_machine_2_4_class_options(MachineClass
*mc
)
4383 sPAPRMachineClass
*smc
= SPAPR_MACHINE_CLASS(mc
);
4385 spapr_machine_2_5_class_options(mc
);
4386 smc
->dr_lmb_enabled
= false;
4387 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_4
);
4390 DEFINE_SPAPR_MACHINE(2_4
, "2.4", false);
4395 #define SPAPR_COMPAT_2_3 \
4398 .driver = "spapr-pci-host-bridge",\
4399 .property = "dynamic-reconfiguration",\
4403 static void spapr_machine_2_3_instance_options(MachineState
*machine
)
4405 spapr_machine_2_4_instance_options(machine
);
4408 static void spapr_machine_2_3_class_options(MachineClass
*mc
)
4410 spapr_machine_2_4_class_options(mc
);
4411 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_3
);
4413 DEFINE_SPAPR_MACHINE(2_3
, "2.3", false);
4419 #define SPAPR_COMPAT_2_2 \
4422 .driver = TYPE_SPAPR_PCI_HOST_BRIDGE,\
4423 .property = "mem_win_size",\
4424 .value = "0x20000000",\
4427 static void spapr_machine_2_2_instance_options(MachineState
*machine
)
4429 spapr_machine_2_3_instance_options(machine
);
4430 machine
->suppress_vmdesc
= true;
4433 static void spapr_machine_2_2_class_options(MachineClass
*mc
)
4435 spapr_machine_2_3_class_options(mc
);
4436 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_2
);
4438 DEFINE_SPAPR_MACHINE(2_2
, "2.2", false);
4443 #define SPAPR_COMPAT_2_1 \
4446 static void spapr_machine_2_1_instance_options(MachineState
*machine
)
4448 spapr_machine_2_2_instance_options(machine
);
4451 static void spapr_machine_2_1_class_options(MachineClass
*mc
)
4453 spapr_machine_2_2_class_options(mc
);
4454 SET_MACHINE_COMPAT(mc
, SPAPR_COMPAT_2_1
);
4456 DEFINE_SPAPR_MACHINE(2_1
, "2.1", false);
4458 static void spapr_machine_register_types(void)
4460 type_register_static(&spapr_machine_info
);
4463 type_init(spapr_machine_register_types
)