target-moxie/helper.c

   1 /*
   2  *  Moxie helper routines.
   3  *
   4  *  Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <stdio.h>
  21 #include <string.h>
  22 #include <assert.h>
  23
  24 #include "config.h"
  25 #include "cpu.h"
  26 #include "mmu.h"
  27 #include "exec/exec-all.h"
  28 #include "exec/softmmu_exec.h"
  29 #include "qemu/host-utils.h"
  30 #include "helper.h"
  31
  32 #define MMUSUFFIX _mmu
  33
  34 #define SHIFT 0
  35 #include "exec/softmmu_template.h"
  36
  37 #define SHIFT 1
  38 #include "exec/softmmu_template.h"
  39
  40 #define SHIFT 2
  41 #include "exec/softmmu_template.h"
  42
  43 #define SHIFT 3
  44 #include "exec/softmmu_template.h"
  45
  46 /* Try to fill the TLB and return an exception if error. If retaddr is
  47    NULL, it means that the function was called in C code (i.e. not
  48    from generated code or from helper.c) */
  49 void tlb_fill(CPUMoxieState *env, target_ulong addr, int is_write, int mmu_idx,
  50               uintptr_t retaddr)
  51 {
  52     MoxieCPU *cpu = moxie_env_get_cpu(env);
  53     int ret;
  54
  55     ret = moxie_cpu_handle_mmu_fault(CPU(cpu), addr, is_write, mmu_idx);
  56     if (unlikely(ret)) {
  57         if (retaddr) {
  58             cpu_restore_state(env, retaddr);
  59         }
  60     }
  61     cpu_loop_exit(env);
  62 }
  63
  64 void helper_raise_exception(CPUMoxieState *env, int ex)
  65 {
  66     CPUState *cs = CPU(moxie_env_get_cpu(env));
  67
  68     cs->exception_index = ex;
  69     /* Stash the exception type.  */
  70     env->sregs[2] = ex;
  71     /* Stash the address where the exception occurred.  */
  72     cpu_restore_state(env, GETPC());
  73     env->sregs[5] = env->pc;
  74     /* Jump the the exception handline routine.  */
  75     env->pc = env->sregs[1];
  76     cpu_loop_exit(env);
  77 }
  78
  79 uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
  80 {
  81     if (unlikely(b == 0)) {
  82         helper_raise_exception(env, MOXIE_EX_DIV0);
  83         return 0;
  84     }
  85     if (unlikely(a == INT_MIN && b == -1)) {
  86         return INT_MIN;
  87     }
  88
  89     return (int32_t)a / (int32_t)b;
  90 }
  91
  92 uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
  93 {
  94     if (unlikely(b == 0)) {
  95         helper_raise_exception(env, MOXIE_EX_DIV0);
  96         return 0;
  97     }
  98     return a / b;
  99 }
 100
 101 void helper_debug(CPUMoxieState *env)
 102 {
 103     CPUState *cs = CPU(moxie_env_get_cpu(env));
 104
 105     cs->exception_index = EXCP_DEBUG;
 106     cpu_loop_exit(env);
 107 }
 108
 109 #if defined(CONFIG_USER_ONLY)
 110
 111 void moxie_cpu_do_interrupt(CPUState *cs)
 112 {
 113     CPUState *cs = CPU(moxie_env_get_cpu(env));
 114
 115     cs->exception_index = -1;
 116 }
 117
 118 int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
 119                                int rw, int mmu_idx)
 120 {
 121     MoxieCPU *cpu = MOXIE_CPU(cs);
 122
 123     cs->exception_index = 0xaa;
 124     cpu->env.debug1 = address;
 125     cpu_dump_state(cs, stderr, fprintf, 0);
 126     return 1;
 127 }
 128
 129 #else /* !CONFIG_USER_ONLY */
 130
 131 int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
 132                                int rw, int mmu_idx)
 133 {
 134     MoxieCPU *cpu = MOXIE_CPU(cs);
 135     CPUMoxieState *env = &cpu->env;
 136     MoxieMMUResult res;
 137     int prot, miss;
 138     target_ulong phy;
 139     int r = 1;
 140
 141     address &= TARGET_PAGE_MASK;
 142     prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
 143     miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
 144     if (miss) {
 145         /* handle the miss.  */
 146         phy = 0;
 147         cs->exception_index = MOXIE_EX_MMU_MISS;
 148     } else {
 149         phy = res.phy;
 150         r = 0;
 151     }
 152     tlb_set_page(env, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
 153     return r;
 154 }
 155
 156
 157 void moxie_cpu_do_interrupt(CPUState *cs)
 158 {
 159     switch (cs->exception_index) {
 160     case MOXIE_EX_BREAK:
 161         break;
 162     default:
 163         break;
 164     }
 165 }
 166
 167 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
 168 {
 169     MoxieCPU *cpu = MOXIE_CPU(cs);
 170     uint32_t phy = addr;
 171     MoxieMMUResult res;
 172     int miss;
 173
 174     miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
 175     if (!miss) {
 176         phy = res.phy;
 177     }
 178     return phy;
 179 }
 180 #endif