net: add tap_read_poll() helper
[qemu-kvm/fedora.git] / hw / virtio-pci.c
blobdf4503651573d4c92fe41ef6aa96922f9438f2e2
1 /*
2 * Virtio PCI Bindings
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
16 #include <inttypes.h>
18 #include "virtio.h"
19 #include "pci.h"
20 //#include "sysemu.h"
22 /* from Linux's linux/virtio_pci.h */
24 /* A 32-bit r/o bitmask of the features supported by the host */
25 #define VIRTIO_PCI_HOST_FEATURES 0
27 /* A 32-bit r/w bitmask of features activated by the guest */
28 #define VIRTIO_PCI_GUEST_FEATURES 4
30 /* A 32-bit r/w PFN for the currently selected queue */
31 #define VIRTIO_PCI_QUEUE_PFN 8
33 /* A 16-bit r/o queue size for the currently selected queue */
34 #define VIRTIO_PCI_QUEUE_NUM 12
36 /* A 16-bit r/w queue selector */
37 #define VIRTIO_PCI_QUEUE_SEL 14
39 /* A 16-bit r/w queue notifier */
40 #define VIRTIO_PCI_QUEUE_NOTIFY 16
42 /* An 8-bit device status register. */
43 #define VIRTIO_PCI_STATUS 18
45 /* An 8-bit r/o interrupt status register. Reading the value will return the
46 * current contents of the ISR and will also clear it. This is effectively
47 * a read-and-acknowledge. */
48 #define VIRTIO_PCI_ISR 19
50 #define VIRTIO_PCI_CONFIG 20
52 /* Virtio ABI version, if we increment this, we break the guest driver. */
53 #define VIRTIO_PCI_ABI_VERSION 0
55 /* How many bits to shift physical queue address written to QUEUE_PFN.
56 * 12 is historical, and due to x86 page size. */
57 #define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
59 /* QEMU doesn't strictly need write barriers since everything runs in
60 * lock-step. We'll leave the calls to wmb() in though to make it obvious for
61 * KVM or if kqemu gets SMP support.
63 #define wmb() do { } while (0)
65 /* PCI bindings. */
67 typedef struct {
68 PCIDevice pci_dev;
69 VirtIODevice *vdev;
70 uint32_t addr;
72 uint16_t vendor;
73 uint16_t device;
74 uint16_t subvendor;
75 uint16_t class_code;
76 uint8_t pif;
77 } VirtIOPCIProxy;
79 /* virtio device */
81 static void virtio_pci_update_irq(void *opaque)
83 VirtIOPCIProxy *proxy = opaque;
85 qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
88 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
90 VirtIOPCIProxy *proxy = opaque;
91 VirtIODevice *vdev = proxy->vdev;
92 target_phys_addr_t pa;
94 addr -= proxy->addr;
96 switch (addr) {
97 case VIRTIO_PCI_GUEST_FEATURES:
98 /* Guest does not negotiate properly? We have to assume nothing. */
99 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
100 if (vdev->bad_features)
101 val = vdev->bad_features(vdev);
102 else
103 val = 0;
105 if (vdev->set_features)
106 vdev->set_features(vdev, val);
107 vdev->features = val;
108 break;
109 case VIRTIO_PCI_QUEUE_PFN:
110 pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
111 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
112 break;
113 case VIRTIO_PCI_QUEUE_SEL:
114 if (val < VIRTIO_PCI_QUEUE_MAX)
115 vdev->queue_sel = val;
116 break;
117 case VIRTIO_PCI_QUEUE_NOTIFY:
118 virtio_queue_notify(vdev, val);
119 break;
120 case VIRTIO_PCI_STATUS:
121 vdev->status = val & 0xFF;
122 if (vdev->status == 0)
123 virtio_reset(vdev);
124 break;
128 static uint32_t virtio_ioport_read(void *opaque, uint32_t addr)
130 VirtIOPCIProxy *proxy = opaque;
131 VirtIODevice *vdev = proxy->vdev;
132 uint32_t ret = 0xFFFFFFFF;
134 addr -= proxy->addr;
136 switch (addr) {
137 case VIRTIO_PCI_HOST_FEATURES:
138 ret = vdev->get_features(vdev);
139 ret |= (1 << VIRTIO_F_NOTIFY_ON_EMPTY);
140 ret |= (1 << VIRTIO_RING_F_INDIRECT_DESC);
141 ret |= (1 << VIRTIO_F_BAD_FEATURE);
142 break;
143 case VIRTIO_PCI_GUEST_FEATURES:
144 ret = vdev->features;
145 break;
146 case VIRTIO_PCI_QUEUE_PFN:
147 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
148 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
149 break;
150 case VIRTIO_PCI_QUEUE_NUM:
151 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
152 break;
153 case VIRTIO_PCI_QUEUE_SEL:
154 ret = vdev->queue_sel;
155 break;
156 case VIRTIO_PCI_STATUS:
157 ret = vdev->status;
158 break;
159 case VIRTIO_PCI_ISR:
160 /* reading from the ISR also clears it. */
161 ret = vdev->isr;
162 vdev->isr = 0;
163 virtio_update_irq(vdev);
164 break;
165 default:
166 break;
169 return ret;
172 static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
174 VirtIOPCIProxy *proxy = opaque;
175 addr -= proxy->addr + VIRTIO_PCI_CONFIG;
176 return virtio_config_readb(proxy->vdev, addr);
179 static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
181 VirtIOPCIProxy *proxy = opaque;
182 addr -= proxy->addr + VIRTIO_PCI_CONFIG;
183 return virtio_config_readw(proxy->vdev, addr);
186 static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
188 VirtIOPCIProxy *proxy = opaque;
189 addr -= proxy->addr + VIRTIO_PCI_CONFIG;
190 return virtio_config_readl(proxy->vdev, addr);
193 static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
195 VirtIOPCIProxy *proxy = opaque;
196 addr -= proxy->addr + VIRTIO_PCI_CONFIG;
197 virtio_config_writeb(proxy->vdev, addr, val);
200 static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
202 VirtIOPCIProxy *proxy = opaque;
203 addr -= proxy->addr + VIRTIO_PCI_CONFIG;
204 virtio_config_writew(proxy->vdev, addr, val);
207 static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
209 VirtIOPCIProxy *proxy = opaque;
210 addr -= proxy->addr + VIRTIO_PCI_CONFIG;
211 virtio_config_writel(proxy->vdev, addr, val);
214 static void virtio_map(PCIDevice *pci_dev, int region_num,
215 uint32_t addr, uint32_t size, int type)
217 VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
218 VirtIODevice *vdev = proxy->vdev;
219 int i;
221 proxy->addr = addr;
222 for (i = 0; i < 3; i++) {
223 register_ioport_write(addr, VIRTIO_PCI_CONFIG, 1 << i,
224 virtio_ioport_write, proxy);
225 register_ioport_read(addr, VIRTIO_PCI_CONFIG, 1 << i,
226 virtio_ioport_read, proxy);
229 if (vdev->config_len) {
230 register_ioport_write(addr + VIRTIO_PCI_CONFIG, vdev->config_len, 1,
231 virtio_pci_config_writeb, proxy);
232 register_ioport_write(addr + VIRTIO_PCI_CONFIG, vdev->config_len, 2,
233 virtio_pci_config_writew, proxy);
234 register_ioport_write(addr + VIRTIO_PCI_CONFIG, vdev->config_len, 4,
235 virtio_pci_config_writel, proxy);
236 register_ioport_read(addr + VIRTIO_PCI_CONFIG, vdev->config_len, 1,
237 virtio_pci_config_readb, proxy);
238 register_ioport_read(addr + VIRTIO_PCI_CONFIG, vdev->config_len, 2,
239 virtio_pci_config_readw, proxy);
240 register_ioport_read(addr + VIRTIO_PCI_CONFIG, vdev->config_len, 4,
241 virtio_pci_config_readl, proxy);
243 vdev->get_config(vdev, vdev->config);
247 static const VirtIOBindings virtio_pci_bindings = {
248 .update_irq = virtio_pci_update_irq
251 static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
252 uint16_t vendor, uint16_t device,
253 uint16_t class_code, uint8_t pif)
255 uint8_t *config;
256 uint32_t size;
258 proxy->vdev = vdev;
260 config = proxy->pci_dev.config;
261 pci_config_set_vendor_id(config, vendor);
262 pci_config_set_device_id(config, device);
264 config[0x08] = VIRTIO_PCI_ABI_VERSION;
266 config[0x09] = pif;
267 pci_config_set_class(config, class_code);
268 config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL;
270 config[0x2c] = vendor & 0xFF;
271 config[0x2d] = (vendor >> 8) & 0xFF;
272 config[0x2e] = vdev->device_id & 0xFF;
273 config[0x2f] = (vdev->device_id >> 8) & 0xFF;
275 config[0x3d] = 1;
277 size = 20 + vdev->config_len;
278 if (size & (size-1))
279 size = 1 << qemu_fls(size);
281 pci_register_bar(&proxy->pci_dev, 0, size, PCI_ADDRESS_SPACE_IO,
282 virtio_map);
284 virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
287 static void virtio_blk_init_pci(PCIDevice *pci_dev)
289 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
290 VirtIODevice *vdev;
292 vdev = virtio_blk_init(&pci_dev->qdev);
293 virtio_init_pci(proxy, vdev,
294 PCI_VENDOR_ID_REDHAT_QUMRANET,
295 PCI_DEVICE_ID_VIRTIO_BLOCK,
296 PCI_CLASS_STORAGE_OTHER,
297 0x00);
300 static void virtio_console_init_pci(PCIDevice *pci_dev)
302 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
303 VirtIODevice *vdev;
305 vdev = virtio_console_init(&pci_dev->qdev);
306 virtio_init_pci(proxy, vdev,
307 PCI_VENDOR_ID_REDHAT_QUMRANET,
308 PCI_DEVICE_ID_VIRTIO_CONSOLE,
309 PCI_CLASS_DISPLAY_OTHER,
310 0x00);
313 static void virtio_net_init_pci(PCIDevice *pci_dev)
315 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
316 VirtIODevice *vdev;
318 vdev = virtio_net_init(&pci_dev->qdev);
319 virtio_init_pci(proxy, vdev,
320 PCI_VENDOR_ID_REDHAT_QUMRANET,
321 PCI_DEVICE_ID_VIRTIO_NET,
322 PCI_CLASS_NETWORK_ETHERNET,
323 0x00);
326 static void virtio_balloon_init_pci(PCIDevice *pci_dev)
328 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
329 VirtIODevice *vdev;
331 vdev = virtio_balloon_init(&pci_dev->qdev);
332 virtio_init_pci(proxy, vdev,
333 PCI_VENDOR_ID_REDHAT_QUMRANET,
334 PCI_DEVICE_ID_VIRTIO_BALLOON,
335 PCI_CLASS_MEMORY_RAM,
336 0x00);
339 static void virtio_pci_register_devices(void)
341 pci_qdev_register("virtio-blk-pci", sizeof(VirtIOPCIProxy),
342 virtio_blk_init_pci);
343 pci_qdev_register("virtio-net-pci", sizeof(VirtIOPCIProxy),
344 virtio_net_init_pci);
345 pci_qdev_register("virtio-console-pci", sizeof(VirtIOPCIProxy),
346 virtio_console_init_pci);
347 pci_qdev_register("virtio-balloon-pci", sizeof(VirtIOPCIProxy),
348 virtio_balloon_init_pci);
351 device_init(virtio_pci_register_devices)