9 void register_machines(void)
11 qemu_register_machine(&pc_machine
);
12 qemu_register_machine(&isapc_machine
);
15 static void cpu_put_seg(QEMUFile
*f
, SegmentCache
*dt
)
17 qemu_put_be32(f
, dt
->selector
);
18 qemu_put_betl(f
, dt
->base
);
19 qemu_put_be32(f
, dt
->limit
);
20 qemu_put_be32(f
, dt
->flags
);
23 static void cpu_get_seg(QEMUFile
*f
, SegmentCache
*dt
)
25 dt
->selector
= qemu_get_be32(f
);
26 dt
->base
= qemu_get_betl(f
);
27 dt
->limit
= qemu_get_be32(f
);
28 dt
->flags
= qemu_get_be32(f
);
31 void cpu_save(QEMUFile
*f
, void *opaque
)
33 CPUState
*env
= opaque
;
34 uint16_t fptag
, fpus
, fpuc
, fpregs_format
;
40 kvm_save_registers(env
);
41 kvm_save_mpstate(env
);
44 for(i
= 0; i
< CPU_NB_REGS
; i
++)
45 qemu_put_betls(f
, &env
->regs
[i
]);
46 qemu_put_betls(f
, &env
->eip
);
47 qemu_put_betls(f
, &env
->eflags
);
48 hflags
= env
->hflags
; /* XXX: suppress most of the redundant hflags */
49 qemu_put_be32s(f
, &hflags
);
53 fpus
= (env
->fpus
& ~0x3800) | (env
->fpstt
& 0x7) << 11;
55 for(i
= 0; i
< 8; i
++) {
56 fptag
|= ((!env
->fptags
[i
]) << i
);
59 qemu_put_be16s(f
, &fpuc
);
60 qemu_put_be16s(f
, &fpus
);
61 qemu_put_be16s(f
, &fptag
);
68 qemu_put_be16s(f
, &fpregs_format
);
70 for(i
= 0; i
< 8; i
++) {
75 /* we save the real CPU data (in case of MMX usage only 'mant'
76 contains the MMX register */
77 cpu_get_fp80(&mant
, &exp
, env
->fpregs
[i
].d
);
78 qemu_put_be64(f
, mant
);
79 qemu_put_be16(f
, exp
);
82 /* if we use doubles for float emulation, we save the doubles to
83 avoid losing information in case of MMX usage. It can give
84 problems if the image is restored on a CPU where long
85 doubles are used instead. */
86 qemu_put_be64(f
, env
->fpregs
[i
].mmx
.MMX_Q(0));
90 for(i
= 0; i
< 6; i
++)
91 cpu_put_seg(f
, &env
->segs
[i
]);
92 cpu_put_seg(f
, &env
->ldt
);
93 cpu_put_seg(f
, &env
->tr
);
94 cpu_put_seg(f
, &env
->gdt
);
95 cpu_put_seg(f
, &env
->idt
);
97 qemu_put_be32s(f
, &env
->sysenter_cs
);
98 qemu_put_be32s(f
, &env
->sysenter_esp
);
99 qemu_put_be32s(f
, &env
->sysenter_eip
);
101 qemu_put_betls(f
, &env
->cr
[0]);
102 qemu_put_betls(f
, &env
->cr
[2]);
103 qemu_put_betls(f
, &env
->cr
[3]);
104 qemu_put_betls(f
, &env
->cr
[4]);
106 for(i
= 0; i
< 8; i
++)
107 qemu_put_betls(f
, &env
->dr
[i
]);
110 a20_mask
= (int32_t) env
->a20_mask
;
111 qemu_put_be32s(f
, &a20_mask
);
114 qemu_put_be32s(f
, &env
->mxcsr
);
115 for(i
= 0; i
< CPU_NB_REGS
; i
++) {
116 qemu_put_be64s(f
, &env
->xmm_regs
[i
].XMM_Q(0));
117 qemu_put_be64s(f
, &env
->xmm_regs
[i
].XMM_Q(1));
121 qemu_put_be64s(f
, &env
->efer
);
122 qemu_put_be64s(f
, &env
->star
);
123 qemu_put_be64s(f
, &env
->lstar
);
124 qemu_put_be64s(f
, &env
->cstar
);
125 qemu_put_be64s(f
, &env
->fmask
);
126 qemu_put_be64s(f
, &env
->kernelgsbase
);
128 qemu_put_be32s(f
, &env
->smbase
);
129 qemu_put_be64s(f
, &env
->pat
);
130 qemu_put_be32s(f
, &env
->hflags2
);
132 qemu_put_be64s(f
, &env
->vm_hsave
);
133 qemu_put_be64s(f
, &env
->vm_vmcb
);
134 qemu_put_be64s(f
, &env
->tsc_offset
);
135 qemu_put_be64s(f
, &env
->intercept
);
136 qemu_put_be16s(f
, &env
->intercept_cr_read
);
137 qemu_put_be16s(f
, &env
->intercept_cr_write
);
138 qemu_put_be16s(f
, &env
->intercept_dr_read
);
139 qemu_put_be16s(f
, &env
->intercept_dr_write
);
140 qemu_put_be32s(f
, &env
->intercept_exceptions
);
141 qemu_put_8s(f
, &env
->v_tpr
);
144 for (i
= 0; i
< NR_IRQ_WORDS
; i
++) {
145 qemu_put_be32s(f
, &env
->kvm_interrupt_bitmap
[i
]);
147 qemu_put_be64s(f
, &env
->tsc
);
148 qemu_put_be32s(f
, &env
->mp_state
);
152 #ifdef USE_X86LDOUBLE
153 /* XXX: add that in a FPU generic layer */
154 union x86_longdouble
{
159 #define MANTD1(fp) (fp & ((1LL << 52) - 1))
160 #define EXPBIAS1 1023
161 #define EXPD1(fp) ((fp >> 52) & 0x7FF)
162 #define SIGND1(fp) ((fp >> 32) & 0x80000000)
164 static void fp64_to_fp80(union x86_longdouble
*p
, uint64_t temp
)
168 p
->mant
= (MANTD1(temp
) << 11) | (1LL << 63);
169 /* exponent + sign */
170 e
= EXPD1(temp
) - EXPBIAS1
+ 16383;
171 e
|= SIGND1(temp
) >> 16;
176 int cpu_load(QEMUFile
*f
, void *opaque
, int version_id
)
178 CPUState
*env
= opaque
;
181 uint16_t fpus
, fpuc
, fptag
, fpregs_format
;
184 if (version_id
!= 3 && version_id
!= 4 && version_id
!= 5
187 for(i
= 0; i
< CPU_NB_REGS
; i
++)
188 qemu_get_betls(f
, &env
->regs
[i
]);
189 qemu_get_betls(f
, &env
->eip
);
190 qemu_get_betls(f
, &env
->eflags
);
191 qemu_get_be32s(f
, &hflags
);
193 qemu_get_be16s(f
, &fpuc
);
194 qemu_get_be16s(f
, &fpus
);
195 qemu_get_be16s(f
, &fptag
);
196 qemu_get_be16s(f
, &fpregs_format
);
198 /* NOTE: we cannot always restore the FPU state if the image come
199 from a host with a different 'USE_X86LDOUBLE' define. We guess
200 if we are in an MMX state to restore correctly in that case. */
201 guess_mmx
= ((fptag
== 0xff) && (fpus
& 0x3800) == 0);
202 for(i
= 0; i
< 8; i
++) {
206 switch(fpregs_format
) {
208 mant
= qemu_get_be64(f
);
209 exp
= qemu_get_be16(f
);
210 #ifdef USE_X86LDOUBLE
211 env
->fpregs
[i
].d
= cpu_set_fp80(mant
, exp
);
215 env
->fpregs
[i
].mmx
.MMX_Q(0) = mant
;
217 env
->fpregs
[i
].d
= cpu_set_fp80(mant
, exp
);
221 mant
= qemu_get_be64(f
);
222 #ifdef USE_X86LDOUBLE
224 union x86_longdouble
*p
;
226 p
= (void *)&env
->fpregs
[i
];
231 fp64_to_fp80(p
, mant
);
235 env
->fpregs
[i
].mmx
.MMX_Q(0) = mant
;
244 /* XXX: restore FPU round state */
245 env
->fpstt
= (fpus
>> 11) & 7;
246 env
->fpus
= fpus
& ~0x3800;
248 for(i
= 0; i
< 8; i
++) {
249 env
->fptags
[i
] = (fptag
>> i
) & 1;
252 for(i
= 0; i
< 6; i
++)
253 cpu_get_seg(f
, &env
->segs
[i
]);
254 cpu_get_seg(f
, &env
->ldt
);
255 cpu_get_seg(f
, &env
->tr
);
256 cpu_get_seg(f
, &env
->gdt
);
257 cpu_get_seg(f
, &env
->idt
);
259 qemu_get_be32s(f
, &env
->sysenter_cs
);
260 qemu_get_be32s(f
, &env
->sysenter_esp
);
261 qemu_get_be32s(f
, &env
->sysenter_eip
);
263 qemu_get_betls(f
, &env
->cr
[0]);
264 qemu_get_betls(f
, &env
->cr
[2]);
265 qemu_get_betls(f
, &env
->cr
[3]);
266 qemu_get_betls(f
, &env
->cr
[4]);
268 for(i
= 0; i
< 8; i
++)
269 qemu_get_betls(f
, &env
->dr
[i
]);
272 qemu_get_be32s(f
, &a20_mask
);
273 env
->a20_mask
= a20_mask
;
275 qemu_get_be32s(f
, &env
->mxcsr
);
276 for(i
= 0; i
< CPU_NB_REGS
; i
++) {
277 qemu_get_be64s(f
, &env
->xmm_regs
[i
].XMM_Q(0));
278 qemu_get_be64s(f
, &env
->xmm_regs
[i
].XMM_Q(1));
282 qemu_get_be64s(f
, &env
->efer
);
283 qemu_get_be64s(f
, &env
->star
);
284 qemu_get_be64s(f
, &env
->lstar
);
285 qemu_get_be64s(f
, &env
->cstar
);
286 qemu_get_be64s(f
, &env
->fmask
);
287 qemu_get_be64s(f
, &env
->kernelgsbase
);
289 if (version_id
>= 4) {
290 qemu_get_be32s(f
, &env
->smbase
);
292 if (version_id
>= 5) {
293 qemu_get_be64s(f
, &env
->pat
);
294 qemu_get_be32s(f
, &env
->hflags2
);
296 qemu_get_be32s(f
, &env
->halted
);
298 qemu_get_be64s(f
, &env
->vm_hsave
);
299 qemu_get_be64s(f
, &env
->vm_vmcb
);
300 qemu_get_be64s(f
, &env
->tsc_offset
);
301 qemu_get_be64s(f
, &env
->intercept
);
302 qemu_get_be16s(f
, &env
->intercept_cr_read
);
303 qemu_get_be16s(f
, &env
->intercept_cr_write
);
304 qemu_get_be16s(f
, &env
->intercept_dr_read
);
305 qemu_get_be16s(f
, &env
->intercept_dr_write
);
306 qemu_get_be32s(f
, &env
->intercept_exceptions
);
307 qemu_get_8s(f
, &env
->v_tpr
);
309 /* XXX: ensure compatiblity for halted bit ? */
310 /* XXX: compute redundant hflags bits */
311 env
->hflags
= hflags
;
314 /* when in-kernel irqchip is used, env->halted causes deadlock
315 because no userspace IRQs will ever clear this flag */
317 for (i
= 0; i
< NR_IRQ_WORDS
; i
++) {
318 qemu_get_be32s(f
, &env
->kvm_interrupt_bitmap
[i
]);
320 qemu_get_be64s(f
, &env
->tsc
);
321 kvm_load_registers(env
);
322 if (version_id
>= 5) {
323 qemu_get_be32s(f
, &env
->mp_state
);
324 kvm_load_mpstate(env
);