apb: fix IOMMU register sizes
commitfd7fbc8ff713ebf8fa2ae5078f1024079bde90b1
authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Wed, 28 May 2014 07:28:21 +0000 (28 08:28 +0100)
committerMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Thu, 5 Jun 2014 20:00:03 +0000 (5 21:00 +0100)
treedc5ebbbdbdc6d080ce2983435c5508d9e8200db2
parentea9a6606b1559baaf4ddeba3cdce9858055f4044
apb: fix IOMMU register sizes

According to the referenced documentation, the IOMMU has 3 64-bit registers
consisting of a control register, base register and flush register.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
hw/pci-host/apb.c