| commit | afcb7375123fcb73649dba56f5393e2f2e173b5e | |
| author | Tsuneo Saito <tsnsaito@gmail.com> | |
| Mon, 18 Jul 2011 06:00:00 +0000 (18 15:00 +0900) | ||
| committer | Blue Swirl <blauwirbel@gmail.com> | |
| Wed, 20 Jul 2011 20:44:23 +0000 (20 20:44 +0000) | ||
| tree | 5d780c0cc56865d7dedebea0c8d49ed5b47c2785 | treesnapshot (tar.gz zip) |
| parent | a3ce3668ccff7d350a4f795ad99a012a6d41caef | commitdiff |
SPARC64: fix VIS1 SIMD signed compare instructions
The destination registers of SIMD signed compare instructions
(fcmp*<16|32>) are not FP registers but general purpose r registers.
Comparisons should be freg_rs1 CMP freg_rs2, that were reversed.
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
The destination registers of SIMD signed compare instructions
(fcmp*<16|32>) are not FP registers but general purpose r registers.
Comparisons should be freg_rs1 CMP freg_rs2, that were reversed.
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| target-sparc/helper.h | diffblobblamehistory | |
| target-sparc/op_helper.c | diffblobblamehistory | |
| target-sparc/translate.c | diffblobblamehistory |