| commit | a9d477c4e3d614409a48d12f34624c2dd9f1ec2d | |
| author | Christoffer Dall <christoffer.dall@linaro.org> | |
| Tue, 19 Nov 2013 03:26:33 +0000 (18 19:26 -0800) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Sat, 8 Feb 2014 14:50:48 +0000 (8 14:50 +0000) | ||
| tree | 71fe4a9c627ea3e375b1c428a527b9bf61ee2ea6 | treesnapshot (tar.gz zip) |
| parent | a1b1d277cdaac98f25be249e7819aac781a35530 | commitdiff |
arm_gic: Add GICC_APRn state to the GICState
The GICC_APRn registers are not currently supported by the ARM GIC v2.0
emulation. This patch adds the missing state.
Note that we also change the number of APRs to use a define GIC_NR_APRS
based on the maximum number of preemption levels. This patch also adds
RAZ/WI accessors for the four registers on the emulated CPU interface.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
The GICC_APRn registers are not currently supported by the ARM GIC v2.0
emulation. This patch adds the missing state.
Note that we also change the number of APRs to use a define GIC_NR_APRS
based on the maximum number of preemption levels. This patch also adds
RAZ/WI accessors for the four registers on the emulated CPU interface.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/intc/arm_gic.c | diffblobblamehistory | |
| hw/intc/arm_gic_common.c | diffblobblamehistory | |
| include/hw/intc/arm_gic_common.h | diffblobblamehistory |