xilinx_axi*: Re-implemented interconnect
commit669b4983018cf13e2adafe1b1b4e1e4053eeb90b
authorPeter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Fri, 10 Aug 2012 03:16:11 +0000 (10 13:16 +1000)
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>
Mon, 13 Aug 2012 09:20:41 +0000 (13 11:20 +0200)
treebf6af35a149c9bef8262b6c09cb8dd2a934f65b2
parent346fe0c4c0b88f11a3d0c01c34d9a170d73429cc
xilinx_axi*: Re-implemented interconnect

Re-implemented the interconnect between the Xilinx AXI ethernet and DMA
controllers. A QOM interface "stream" is created, for the two stream interfaces.

As per Edgars request, this is designed to be more generic than AXI-stream,
so in the future we may see more clients of this interface beyond AXI stream.

This is based primarily on Paolos original refactoring of the interconnect.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter A.G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
hw/Makefile.objs
hw/petalogix_ml605_mmu.c
hw/stream.c [new file with mode: 0644]
hw/stream.h [new file with mode: 0644]
hw/xilinx.h
hw/xilinx_axidma.c
hw/xilinx_axidma.h [deleted file]
hw/xilinx_axienet.c