2 * Copyright 2010-2011 INRIA Saclay
3 * Copyright 2012-2013 Ecole Normale Superieure
5 * Use of this software is governed by the MIT license
7 * Written by Sven Verdoolaege, INRIA Saclay - Ile-de-France,
8 * Parc Club Orsay Universite, ZAC des vignes, 4 rue Jacques Monod,
10 * and Ecole Normale Superieure, 45 rue d’Ulm, 75230 Paris, France
17 #include <isl/polynomial.h>
18 #include <isl/union_set.h>
23 #include <isl/schedule.h>
24 #include <isl/options.h>
25 #include <isl/ast_build.h>
30 #include "ppcg_options.h"
33 /* The fields stride and shift only contain valid information
35 * If so, they express that current index is such that if you add shift,
36 * then the result is always a multiple of stride.
37 * Let D represent the initial shared_len dimensions of the computed schedule.
38 * The spaces of "lb" and "shift" are of the form
42 struct gpu_array_bound
{
50 /* A tile of an array.
52 * n is the dimension of the array.
53 * bound is an array of size "n" representing the lower bound
54 * and size for each index.
56 * tiling maps a tile in the global array to the corresponding
57 * shared/private memory tile and is of the form
59 * { [D[i] -> A[a]] -> T[(a + shift(i))/stride - lb(i)] }
61 * where D represents the initial shared_len dimensions
62 * of the computed schedule.
64 struct gpu_array_tile
{
66 struct gpu_array_bound
*bound
;
67 isl_multi_aff
*tiling
;
70 struct gpu_array_info
;
72 /* A group of array references in a kernel that should be handled together.
73 * If private_tile is not NULL, then it is mapped to registers.
74 * Otherwise, if shared_tile is not NULL, it is mapped to shared memory.
75 * Otherwise, it is accessed from global memory.
77 struct gpu_array_ref_group
{
78 /* The references in this group access this array. */
79 struct gpu_array_info
*array
;
80 /* Position of this group in the list of reference groups of array. */
83 /* The following fields are use during the construction of the groups.
84 * access is the combined access relation relative to the shared
85 * memory tiling. In particular, the domain of the map corresponds
86 * to the first shared_len dimensions of the computed schedule.
87 * write is set if any access in the group is a write.
88 * exact_write is set if all writes are definite writes.
89 * slice is set if there is at least one access in the group
90 * that refers to more than one element
97 /* The shared memory tile, NULL if none. */
98 struct gpu_array_tile
*shared_tile
;
100 /* The private memory tile, NULL if none. */
101 struct gpu_array_tile
*private_tile
;
103 /* References in this group; point to elements of a linked list. */
105 struct gpu_stmt_access
**refs
;
107 /* Last shared memory tile dimension that affects tile of this group. */
113 struct ppcg_options
*options
;
115 /* Callback for printing of AST in appropriate format. */
116 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
117 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
118 struct gpu_types
*types
, void *user
);
121 struct gpu_prog
*prog
;
122 /* The generated AST. */
125 /* The sequence of types for which a definition has been printed. */
126 struct gpu_types types
;
128 /* User specified tile, grid and block sizes for each kernel */
129 isl_union_map
*sizes
;
131 /* Effectively used tile, grid and block sizes for each kernel */
132 isl_union_map
*used_sizes
;
134 /* Identifier of current kernel. */
136 /* Pointer to the current kernel. */
137 struct ppcg_kernel
*kernel
;
138 /* Does the computed schedule exhibit any parallelism? */
141 /* First tile dimension. */
143 /* Number of tile dimensions. */
145 /* Number of initial parallel loops among tile dimensions. */
148 /* Number of dimensions determining shared memory. */
151 /* Number of rows in the untiled schedule. */
153 /* Number of rows in the tiled schedule. */
155 /* Number of rows in schedule after tiling/wrapping over threads. */
156 int thread_tiled_len
;
158 /* Global untiled schedule. */
159 isl_union_map
*sched
;
160 /* Local (per kernel launch) tiled schedule. */
161 isl_union_map
*tiled_sched
;
162 /* Local schedule per shared memory tile loop iteration. */
163 isl_union_map
*local_sched
;
165 /* Local tiled schedule projected onto the shared tile loops and
166 * the loops that will be wrapped over the threads,
167 * with all shared tile loops parametrized.
169 isl_union_map
*shared_sched
;
170 /* Projects out the loops that will be wrapped over the threads
173 isl_union_map
*shared_proj
;
175 /* A map that takes the range of shared_sched as input,
176 * wraps the appropriate loops over the threads and then projects
179 isl_map
*privatization
;
181 /* The array reference group corresponding to copy_sched. */
182 struct gpu_array_ref_group
*copy_group
;
184 /* Is any array in the current kernel marked force_private? */
185 int any_force_private
;
187 /* First loop to unroll (or -1 if none) in the current part of the
194 /* Note: in the input file, the sizes of the grid and the blocks
195 * are specified in the order x, y, z, but internally, the sizes
196 * are stored in reverse order, so that the last element always
197 * refers to the x dimension.
204 /* Print the name of the local copy of a given group of array references.
206 static __isl_give isl_printer
*print_array_name(__isl_take isl_printer
*p
,
207 struct gpu_array_ref_group
*group
)
211 if (group
->private_tile
)
212 p
= isl_printer_print_str(p
, "private_");
213 else if (group
->shared_tile
)
214 p
= isl_printer_print_str(p
, "shared_");
217 p
= isl_printer_print_str(p
, group
->array
->name
);
218 if (!global
&& group
->array
->n_group
> 1) {
219 p
= isl_printer_print_str(p
, "_");
220 p
= isl_printer_print_int(p
, group
->nr
);
226 /* Collect all references to the given array and store pointers to them
229 * If the array contains structures, then there is no need to collect
230 * the references since we will not be computing any reference groups.
232 static void collect_references(struct gpu_prog
*prog
,
233 struct gpu_array_info
*array
)
238 if (array
->has_compound_element
)
242 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
243 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
244 struct gpu_stmt_access
*access
;
246 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
248 name
= isl_map_get_tuple_name(access
->access
,
250 if (name
&& !strcmp(array
->name
, name
))
256 array
->refs
= isl_alloc_array(prog
->ctx
, struct gpu_stmt_access
*, n
);
260 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
261 struct gpu_stmt
*stmt
= &prog
->stmts
[i
];
262 struct gpu_stmt_access
*access
;
264 for (access
= stmt
->accesses
; access
; access
= access
->next
) {
266 name
= isl_map_get_tuple_name(access
->access
,
268 if (!name
|| strcmp(array
->name
, name
))
271 array
->refs
[n
++] = access
;
276 /* Create a gpu_array_tile for an array of dimension "n_index".
278 static struct gpu_array_tile
*create_tile(isl_ctx
*ctx
, int n_index
)
281 struct gpu_array_tile
*tile
;
283 tile
= isl_calloc_type(ctx
, struct gpu_array_tile
);
288 tile
->bound
= isl_alloc_array(ctx
, struct gpu_array_bound
, n_index
);
291 for (i
= 0; i
< n_index
; ++i
) {
292 tile
->bound
[i
].size
= NULL
;
293 tile
->bound
[i
].lb
= NULL
;
294 tile
->bound
[i
].stride
= NULL
;
295 tile
->bound
[i
].shift
= NULL
;
301 static void *free_tile(struct gpu_array_tile
*tile
)
308 for (j
= 0; j
< tile
->n
; ++j
) {
309 isl_val_free(tile
->bound
[j
].size
);
310 isl_val_free(tile
->bound
[j
].stride
);
311 isl_aff_free(tile
->bound
[j
].lb
);
312 isl_aff_free(tile
->bound
[j
].shift
);
315 isl_multi_aff_free(tile
->tiling
);
321 static struct pet_array
*find_array(struct ppcg_scop
*scop
,
322 __isl_keep isl_set
*accessed
)
327 id
= isl_set_get_tuple_id(accessed
);
329 for (i
= 0; i
< scop
->pet
->n_array
; ++i
) {
332 id_i
= isl_set_get_tuple_id(scop
->pet
->arrays
[i
]->extent
);
339 return i
< scop
->pet
->n_array
? scop
->pet
->arrays
[i
] : NULL
;
342 /* Compute and return the extent of "array", taking into account the set of
345 * In particular, the extent in the outer dimension is taken
346 * from "accessed", while then extent in the remaing dimensions
347 * are taken from array->extent.
349 * The extent in the outer dimension cannot be taken from array->extent
350 * because that may be unbounded. Furthermore, even if it is bounded,
351 * it may be larger than the piece of the array that is being accessed.
353 static __isl_give isl_set
*compute_extent(struct pet_array
*array
,
354 __isl_keep isl_set
*accessed
)
361 extent
= isl_set_copy(array
->extent
);
363 n_index
= isl_set_dim(accessed
, isl_dim_set
);
367 extent
= isl_set_project_out(extent
, isl_dim_set
, 0, 1);
368 outer
= isl_set_copy(accessed
);
369 outer
= isl_set_project_out(outer
, isl_dim_set
, 1, n_index
- 1);
370 extent
= isl_set_flat_product(outer
, extent
);
371 id
= isl_set_get_tuple_id(accessed
);
372 extent
= isl_set_set_tuple_id(extent
, id
);
377 /* Is the array "array" being extracted a read-only scalar?
379 * That is, is "array" a scalar that is never possibly written to.
380 * An array containing structures is never considered to be a scalar.
382 static int is_read_only_scalar(struct gpu_array_info
*array
,
383 struct gpu_prog
*prog
)
386 isl_union_map
*write
;
389 if (array
->has_compound_element
)
391 if (array
->n_index
!= 0)
394 write
= isl_union_map_copy(prog
->may_write
);
395 space
= isl_set_universe(isl_space_copy(array
->space
));
396 write
= isl_union_map_intersect_range(write
,
397 isl_union_set_from_set(space
));
398 empty
= isl_union_map_is_empty(write
);
399 isl_union_map_free(write
);
404 /* Compute bounds on the host arrays based on the accessed elements
405 * and collect all references to the array.
407 * If the array is zero-dimensional and does not contain structures,
408 * i.e., if the array is a scalar, we check whether it is read-only.
410 static int extract_array_info(__isl_take isl_set
*array
, void *user
)
413 struct gpu_prog
*prog
= (struct gpu_prog
*)user
;
417 struct pet_array
*pa
;
418 struct gpu_array_info
*info
;
421 info
= &prog
->array
[prog
->n_array
];
424 n_index
= isl_set_dim(array
, isl_dim_set
);
425 name
= isl_set_get_tuple_name(array
);
426 bounds
= isl_alloc_array(isl_set_get_ctx(array
),
427 isl_pw_aff
*, n_index
);
431 info
->space
= isl_set_get_space(array
);
432 info
->name
= strdup(name
);
433 info
->n_index
= n_index
;
434 info
->bound
= bounds
;
435 info
->linearize
= prog
->scop
->options
->linearize_device_arrays
;
437 pa
= find_array(prog
->scop
, array
);
439 isl_die(isl_set_get_ctx(array
), isl_error_internal
,
440 "unable to find array in scop", goto error
);
442 info
->type
= strdup(pa
->element_type
);
443 info
->size
= pa
->element_size
;
444 info
->local
= pa
->declared
&& !pa
->exposed
;
445 info
->has_compound_element
= pa
->element_is_record
;
446 info
->read_only_scalar
= is_read_only_scalar(info
, prog
);
448 extent
= compute_extent(pa
, array
);
449 info
->extent
= extent
;
450 for (i
= 0; i
< n_index
; ++i
) {
456 dom
= isl_set_copy(extent
);
457 dom
= isl_set_project_out(dom
, isl_dim_set
, i
+ 1,
459 dom
= isl_set_project_out(dom
, isl_dim_set
, 0, i
);
460 if (!isl_set_dim_has_upper_bound(dom
, isl_dim_set
, 0)) {
461 fprintf(stderr
, "unable to determine extent of '%s' "
462 "in dimension %d\n", info
->name
, i
);
463 dom
= isl_set_free(dom
);
465 bound
= isl_set_dim_max(dom
, 0);
466 dom
= isl_pw_aff_domain(isl_pw_aff_copy(bound
));
467 ls
= isl_local_space_from_space(isl_set_get_space(dom
));
468 one
= isl_aff_zero_on_domain(ls
);
469 one
= isl_aff_add_constant_si(one
, 1);
470 bound
= isl_pw_aff_add(bound
, isl_pw_aff_alloc(dom
, one
));
471 bound
= isl_pw_aff_gist(bound
, isl_set_copy(prog
->context
));
474 if (!isl_pw_aff_is_cst(bound
))
478 collect_references(prog
, info
);
487 /* Remove independence from the order constraints "order" on array "array".
488 * Since the pairs of iterations in the filter relation of an independence
489 * are guaranteed to be completely independent by the user, there is
490 * no need to ensure that live ranges are ordered along thong pairs.
491 * We make an exception for local variables, though, as the independence
492 * guarantee does not apply to those.
494 * The order constraints are used in two places.
495 * Those on scalars are used in check_scalar_live_ranges to check if
496 * we need to force the scalar to be private. Any non-local scalar
497 * should not be forced scalar if it only appears in independent loops.
498 * Those on non-scalars are added to the coincidence constraints
499 * in compute_schedule because we do not support any array expansion.
500 * Accesses to non-local arrays should not prevent a loop from being
501 * considered coincident so we should indeed remove those constraints
502 * from the order constraints.
504 static __isl_give isl_union_map
*remove_independences(struct gpu_prog
*prog
,
505 struct gpu_array_info
*array
, __isl_take isl_union_map
*order
)
509 for (i
= 0; i
< prog
->scop
->pet
->n_independence
; ++i
) {
510 struct pet_independence
*pi
= prog
->scop
->pet
->independences
[i
];
511 if (isl_union_set_contains(pi
->local
, array
->space
))
514 order
= isl_union_map_subtract(order
,
515 isl_union_map_copy(pi
->filter
));
521 /* For each array in "prog", store the (untagged) order dependences
522 * derived from the array in array->dep_order.
523 * In particular, consider all references that access the given array
524 * and take the order dependences that have one of these references
525 * as source. (Since an order dependence relates two references to
526 * the same array, the target of these order dependences will also
527 * be one of these references.)
528 * Additionally, store the union of these array->dep_order relations
529 * for all non-scalar arrays in prog->array_order.
531 void collect_order_dependences(struct gpu_prog
*prog
)
535 isl_union_map
*accesses
;
537 space
= isl_union_map_get_space(prog
->read
);
538 prog
->array_order
= isl_union_map_empty(space
);
540 accesses
= isl_union_map_copy(prog
->scop
->tagged_reads
);
541 accesses
= isl_union_map_union(accesses
,
542 isl_union_map_copy(prog
->scop
->tagged_may_writes
));
543 accesses
= isl_union_map_universe(accesses
);
544 accesses
= isl_union_map_apply_range(accesses
,
545 isl_union_map_copy(prog
->to_outer
));
547 for (i
= 0; i
< prog
->n_array
; ++i
) {
548 struct gpu_array_info
*array
= &prog
->array
[i
];
551 isl_union_map
*order
;
553 set
= isl_set_universe(isl_space_copy(array
->space
));
554 uset
= isl_union_set_from_set(set
);
555 uset
= isl_union_map_domain(
556 isl_union_map_intersect_range(isl_union_map_copy(accesses
),
558 order
= isl_union_map_copy(prog
->scop
->tagged_dep_order
);
559 order
= isl_union_map_intersect_domain(order
, uset
);
560 order
= isl_union_map_zip(order
);
561 order
= isl_union_set_unwrap(isl_union_map_domain(order
));
562 order
= remove_independences(prog
, array
, order
);
563 array
->dep_order
= order
;
565 if (gpu_array_is_scalar(array
))
568 prog
->array_order
= isl_union_map_union(prog
->array_order
,
569 isl_union_map_copy(array
->dep_order
));
572 isl_union_map_free(accesses
);
575 /* Construct a gpu_array_info for each array possibly accessed by "prog" and
576 * collect them in prog->array.
578 * If there are any member accesses involved, then they are first mapped
579 * to the outer arrays of structs.
581 * If we are allowing live range reordering, then also set
582 * the dep_order field. Otherwise leave it NULL.
584 static int collect_array_info(struct gpu_prog
*prog
)
587 isl_union_set
*arrays
;
589 arrays
= isl_union_map_range(isl_union_map_copy(prog
->read
));
590 arrays
= isl_union_set_union(arrays
,
591 isl_union_map_range(isl_union_map_copy(prog
->may_write
)));
593 arrays
= isl_union_set_apply(arrays
,
594 isl_union_map_copy(prog
->to_outer
));
596 arrays
= isl_union_set_coalesce(arrays
);
598 prog
->n_array
= isl_union_set_n_set(arrays
);
599 prog
->array
= isl_calloc_array(prog
->ctx
,
600 struct gpu_array_info
, prog
->n_array
);
603 r
= isl_union_set_foreach_set(arrays
, &extract_array_info
, prog
);
604 isl_union_set_free(arrays
);
606 if (prog
->scop
->options
->live_range_reordering
)
607 collect_order_dependences(prog
);
612 static void free_array_info(struct gpu_prog
*prog
)
616 for (i
= 0; i
< prog
->n_array
; ++i
) {
617 int n_index
= prog
->array
[i
].n_index
;
618 free(prog
->array
[i
].type
);
619 free(prog
->array
[i
].name
);
620 for (j
= 0; j
< n_index
; ++j
)
621 isl_pw_aff_free(prog
->array
[i
].bound
[j
]);
622 isl_space_free(prog
->array
[i
].space
);
623 isl_set_free(prog
->array
[i
].extent
);
624 free(prog
->array
[i
].bound
);
625 free(prog
->array
[i
].refs
);
626 isl_union_map_free(prog
->array
[i
].dep_order
);
631 /* Check if a gpu array is a scalar. A scalar is a value that is not stored
632 * as an array or through a pointer reference, but as a single data element.
633 * At the moment, scalars are represented as zero-dimensional arrays.
634 * A zero-dimensional array containing structures is not considered
637 int gpu_array_is_scalar(struct gpu_array_info
*array
)
639 return !array
->has_compound_element
&& array
->n_index
== 0;
642 /* Is "array" a read-only scalar?
644 int gpu_array_is_read_only_scalar(struct gpu_array_info
*array
)
646 return array
->read_only_scalar
;
649 /* Return the set of parameter values for which the array has a positive
650 * size in all dimensions.
651 * If the sizes are only valid for some parameter values, then those
652 * constraints are also taken into account.
654 __isl_give isl_set
*gpu_array_positive_size_guard(struct gpu_array_info
*array
)
660 space
= isl_space_params(isl_space_copy(array
->space
));
661 guard
= isl_set_universe(space
);
663 for (i
= 0; i
< array
->n_index
; ++i
) {
665 isl_set
*guard_i
, *zero
;
667 bound
= isl_pw_aff_copy(array
->bound
[i
]);
668 guard_i
= isl_pw_aff_nonneg_set(isl_pw_aff_copy(bound
));
669 zero
= isl_pw_aff_zero_set(bound
);
670 guard_i
= isl_set_subtract(guard_i
, zero
);
671 guard
= isl_set_intersect(guard
, guard_i
);
677 /* Internal data structure for extract_size_of_type.
678 * "type" specifies the name of the space that we want to extract.
679 * "res" is used to store the subset of that space.
681 struct ppcg_extract_size_data
{
686 /* This function is called for each set in a union_set.
687 * If the name of the set matches data->type, we store the
690 static int extract_size_of_type(__isl_take isl_set
*size
, void *user
)
692 struct ppcg_extract_size_data
*data
= user
;
695 name
= isl_set_get_tuple_name(size
);
696 if (name
&& !strcmp(name
, data
->type
)) {
705 /* Given a union map { kernel[i] -> *[...] },
706 * return the range in the space called "type" for the kernel with
707 * sequence number "id".
709 static __isl_give isl_set
*extract_sizes(__isl_keep isl_union_map
*sizes
,
710 const char *type
, int id
)
714 isl_union_set
*local_sizes
;
715 struct ppcg_extract_size_data data
= { type
, NULL
};
720 space
= isl_union_map_get_space(sizes
);
721 space
= isl_space_set_from_params(space
);
722 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
723 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
724 dom
= isl_set_universe(space
);
725 dom
= isl_set_fix_si(dom
, isl_dim_set
, 0, id
);
727 local_sizes
= isl_union_set_apply(isl_union_set_from_set(dom
),
728 isl_union_map_copy(sizes
));
729 isl_union_set_foreach_set(local_sizes
, &extract_size_of_type
, &data
);
730 isl_union_set_free(local_sizes
);
734 /* Given a singleton set, extract the first (at most *len) elements
735 * of the single integer tuple into *sizes and update *len if needed.
737 static void read_sizes_from_set(__isl_take isl_set
*set
, int *sizes
, int *len
)
745 dim
= isl_set_dim(set
, isl_dim_set
);
749 for (i
= 0; i
< *len
; ++i
) {
752 v
= isl_set_plain_get_val_if_fixed(set
, isl_dim_set
, i
);
755 sizes
[i
] = isl_val_get_num_si(v
);
762 /* Add the map { kernel[id] -> type[sizes] } to gen->used_sizes,
763 * if the option debug->dump_sizes is set.
765 static void set_used_sizes(struct gpu_gen
*gen
, const char *type
, int id
,
772 if (!gen
->options
->debug
->dump_sizes
)
775 space
= isl_union_map_get_space(gen
->used_sizes
);
776 space
= isl_space_set_from_params(space
);
777 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
778 space
= isl_space_set_tuple_name(space
, isl_dim_set
, "kernel");
779 space
= isl_space_from_domain(space
);
780 space
= isl_space_add_dims(space
, isl_dim_out
, len
);
781 space
= isl_space_set_tuple_name(space
, isl_dim_out
, type
);
783 map
= isl_map_universe(space
);
784 map
= isl_map_fix_si(map
, isl_dim_in
, 0, id
);
785 for (i
= 0; i
< len
; ++i
)
786 map
= isl_map_fix_si(map
, isl_dim_out
, i
, sizes
[i
]);
788 gen
->used_sizes
= isl_union_map_add_map(gen
->used_sizes
, map
);
791 /* Extract user specified "tile" sizes from the "sizes" command line option,
792 * defaulting to option->tile_size in each dimension.
793 * Add the effectively used sizes to gen->used_sizes.
795 static void read_tile_sizes(struct gpu_gen
*gen
)
800 gen
->tile_size
= isl_alloc_array(gen
->ctx
, int, gen
->tile_len
);
801 assert(gen
->tile_size
);
802 for (n
= 0; n
< gen
->tile_len
; ++n
)
803 gen
->tile_size
[n
] = gen
->options
->tile_size
;
805 size
= extract_sizes(gen
->sizes
, "tile", gen
->kernel_id
);
806 read_sizes_from_set(size
, gen
->tile_size
, &gen
->tile_len
);
807 set_used_sizes(gen
, "tile", gen
->kernel_id
,
808 gen
->tile_size
, gen
->tile_len
);
810 if (gen
->n_parallel
> gen
->tile_len
)
811 gen
->n_parallel
= gen
->tile_len
;
814 /* Extract user specified "block" sizes from the "sizes" command line option,
815 * after filling in some potentially useful defaults.
816 * Add the effectively used sizes to gen->used_sizes.
818 static void read_block_sizes(struct gpu_gen
*gen
)
824 gen
->n_block
= (n
<= 3) ? n
: 3;
825 switch (gen
->n_block
) {
827 gen
->block_dim
[0] = 512;
830 gen
->block_dim
[0] = 32;
831 gen
->block_dim
[1] = 16;
834 gen
->block_dim
[0] = 32;
835 gen
->block_dim
[1] = 4;
836 gen
->block_dim
[2] = 4;
840 size
= extract_sizes(gen
->sizes
, "block", gen
->kernel_id
);
841 read_sizes_from_set(size
, gen
->block_dim
, &gen
->n_block
);
842 set_used_sizes(gen
, "block", gen
->kernel_id
,
843 gen
->block_dim
, gen
->n_block
);
846 /* Extract user specified "grid" sizes from the "sizes" command line option,
847 * after filling in some potentially useful defaults.
848 * Add the effectively used sizes to gen->used_sizes.
850 static void read_grid_sizes(struct gpu_gen
*gen
)
852 int n
= gen
->n_parallel
;
855 gen
->n_grid
= (n
<= 2) ? n
: 2;
856 switch (gen
->n_grid
) {
858 gen
->grid_dim
[0] = 32768;
861 gen
->grid_dim
[0] = 256;
862 gen
->grid_dim
[1] = 256;
866 size
= extract_sizes(gen
->sizes
, "grid", gen
->kernel_id
);
867 read_sizes_from_set(size
, gen
->grid_dim
, &gen
->n_grid
);
868 set_used_sizes(gen
, "grid", gen
->kernel_id
, gen
->grid_dim
, gen
->n_grid
);
871 /* Extract user specified sizes from the "sizes" command line option
872 * after filling in some potentially useful defaults.
874 static void read_sizes(struct gpu_gen
*gen
)
876 read_tile_sizes(gen
);
877 read_block_sizes(gen
);
878 read_grid_sizes(gen
);
881 static void *free_stmts(struct gpu_stmt
*stmts
, int n
)
888 for (i
= 0; i
< n
; ++i
) {
889 struct gpu_stmt_access
*access
, *next
;
891 for (access
= stmts
[i
].accesses
; access
; access
= next
) {
893 isl_id_free(access
->ref_id
);
894 isl_map_free(access
->access
);
895 isl_map_free(access
->tagged_access
);
899 isl_id_free(stmts
[i
].id
);
906 /* Construct a map from a domain of dimensionality "len"
907 * to a domain of dimensionality "len" + "tile_len" that tiles
908 * the "tile_len" coordinates starting at "first".
909 * In particular, [s_i] -> [s_i / tile_size[i], s_i % tile_size[i]].
910 * "dim" prescribes the parameters.
912 static __isl_give isl_map
*tile(__isl_take isl_space
*dim
, int len
,
913 int first
, int tile_len
, int *tile_size
)
920 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
921 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ tile_len
);
922 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
923 ls
= isl_local_space_from_space(dim
);
925 for (i
= 0; i
< len
- tile_len
; ++i
) {
926 int j
= i
< first
? i
: i
+ tile_len
;
927 int k
= i
< first
? i
: i
+ 2 * tile_len
;
929 c
= isl_equality_alloc(isl_local_space_copy(ls
));
930 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, j
, -1);
931 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
932 bmap
= isl_basic_map_add_constraint(bmap
, c
);
935 for (i
= 0; i
< tile_len
; ++i
) {
936 c
= isl_equality_alloc(isl_local_space_copy(ls
));
937 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
,
939 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
940 first
+ i
, tile_size
[i
]);
941 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
942 first
+ i
+ tile_len
, 1);
943 bmap
= isl_basic_map_add_constraint(bmap
, c
);
945 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
946 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
947 first
+ i
+ tile_len
, 1);
948 bmap
= isl_basic_map_add_constraint(bmap
, c
);
950 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
951 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
952 first
+ i
+ tile_len
, -1);
953 c
= isl_constraint_set_constant_si(c
, tile_size
[i
] - 1);
954 bmap
= isl_basic_map_add_constraint(bmap
, c
);
957 isl_local_space_free(ls
);
959 return isl_map_from_basic_map(bmap
);
962 /* Construct a map from a domain of dimensionality "len"
963 * to a domain of dimensionality "len" + "wrap_len" that "wraps"
964 * the "wrap_len" coordinates starting at "first" according to "wrap_size".
965 * In particular, [s_i] -> [s_i, s_i % wrap_size[i]].
966 * To do so, we need extra variables corresponding to [s_i / wrap_size[i]],
967 * that are projected out at the end.
968 * "dim" prescribes the parameters.
970 static __isl_give isl_map
*wrap(__isl_take isl_space
*dim
, int len
,
971 int first
, int wrap_len
, int *wrap_size
)
978 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
979 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
+ 2 * wrap_len
);
980 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
981 ls
= isl_local_space_from_space(dim
);
983 for (i
= 0; i
< len
; ++i
) {
984 int k
= i
< first
+ wrap_len
? i
: i
+ 2 * wrap_len
;
986 c
= isl_equality_alloc(isl_local_space_copy(ls
));
987 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, -1);
988 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, k
, 1);
989 bmap
= isl_basic_map_add_constraint(bmap
, c
);
992 for (i
= 0; i
< wrap_len
; ++i
) {
993 c
= isl_equality_alloc(isl_local_space_copy(ls
));
994 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
996 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
997 first
+ wrap_len
+ i
, 1);
998 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
999 first
+ 2 * wrap_len
+ i
, wrap_size
[i
]);
1000 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1002 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1003 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1004 first
+ wrap_len
+ i
, 1);
1005 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1007 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1008 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
,
1009 first
+ wrap_len
+ i
, -1);
1010 c
= isl_constraint_set_constant_si(c
, wrap_size
[i
] - 1);
1011 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1014 isl_local_space_free(ls
);
1016 bmap
= isl_basic_map_project_out(bmap
, isl_dim_out
,
1017 first
+ 2 * wrap_len
, wrap_len
);
1019 return isl_map_from_basic_map(bmap
);
1022 /* Add "n" parameters named prefix%d.
1024 static __isl_give isl_set
*add_params( __isl_take isl_set
*set
,
1025 int n
, const char *prefix
)
1031 nparam
= isl_set_dim(set
, isl_dim_param
);
1032 set
= isl_set_add_dims(set
, isl_dim_param
, n
);
1034 for (i
= 0; i
< n
; ++i
) {
1035 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1036 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1043 /* Equate the "n" dimensions of "set" starting at "first" to
1044 * freshly created parameters named prefix%d.
1046 static __isl_give isl_set
*parametrize(__isl_take isl_set
*set
,
1047 int first
, int n
, const char *prefix
)
1052 nparam
= isl_set_dim(set
, isl_dim_param
);
1054 set
= add_params(set
, n
, prefix
);
1056 for (i
= 0; i
< n
; ++i
)
1057 set
= isl_set_equate(set
, isl_dim_param
, nparam
+ i
,
1058 isl_dim_set
, first
+ i
);
1063 /* Given a parameter space "space", create a set of dimension "len"
1064 * of which the "n" dimensions starting at "first" are equated to
1065 * freshly created parameters named prefix%d.
1067 static __isl_give isl_set
*parametrization(__isl_take isl_space
*space
,
1068 int len
, int first
, int n
, const char *prefix
)
1072 space
= isl_space_set_from_params(space
);
1073 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
1074 set
= isl_set_universe(space
);
1076 return parametrize(set
, first
, n
, prefix
);
1079 /* Tile the B loops over the tile sizes and then tile/wrap
1080 * the T1 loops over the blocks.
1082 static __isl_give isl_union_map
*tile_schedule(struct gpu_gen
*gen
,
1083 __isl_take isl_union_map
*sched
)
1086 isl_map
*tiling
, *block_tiling
;
1088 dim
= isl_union_map_get_space(sched
);
1089 tiling
= tile(isl_space_copy(dim
), gen
->untiled_len
,
1090 gen
->tile_first
, gen
->tile_len
, gen
->tile_size
);
1092 if (gen
->options
->wrap
)
1093 block_tiling
= wrap(dim
, gen
->untiled_len
+ gen
->tile_len
,
1094 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
1096 block_tiling
= tile(dim
, gen
->untiled_len
+ gen
->tile_len
,
1097 gen
->tile_first
, gen
->n_grid
, gen
->grid_dim
);
1099 gen
->tiled_len
= gen
->untiled_len
+ gen
->tile_len
+ gen
->n_grid
;
1101 tiling
= isl_map_apply_range(tiling
, block_tiling
);
1103 sched
= isl_union_map_apply_range(sched
,
1104 isl_union_map_from_map(tiling
));
1106 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1111 /* Equate the "T1P" iterators in the tiled schedule "sched"
1112 * to the block dimensions.
1114 static __isl_give isl_union_map
*parametrize_tiled_schedule(
1115 struct gpu_gen
*gen
, __isl_take isl_union_map
*sched
)
1120 dim
= isl_union_map_get_space(sched
);
1121 par
= parametrization(dim
, gen
->tiled_len
,
1122 gen
->tile_first
+ gen
->n_grid
, gen
->n_grid
, "b");
1123 sched
= isl_union_map_intersect_range(sched
,
1124 isl_union_set_from_set(par
));
1129 /* Tile/wrap the P1 loops over the threads.
1131 static __isl_give isl_union_map
*thread_tile_schedule(struct gpu_gen
*gen
,
1132 __isl_take isl_union_map
*sched
)
1138 dim
= isl_union_map_get_space(sched
);
1140 if (gen
->options
->wrap
)
1141 tiling
= wrap(isl_space_copy(dim
), gen
->tiled_len
,
1142 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1144 tiling
= tile(isl_space_copy(dim
), gen
->tiled_len
,
1145 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
1146 gen
->thread_tiled_len
= gen
->tiled_len
+ gen
->n_block
;
1148 sched
= isl_union_map_apply_range(sched
,
1149 isl_union_map_from_map(tiling
));
1151 par
= parametrization(dim
, gen
->thread_tiled_len
,
1152 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
1154 sched
= isl_union_map_intersect_range(sched
,
1155 isl_union_set_from_set(par
));
1157 gen
->shared_len
= gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
;
1162 /* If the user asked for it, scale the shared memory tile loops
1163 * (T1T and T2) of "sched" by gen->tile_size[i].
1164 * If we are not performing "wrapping", then additionally scale the T1P
1165 * loops by gen->grid_dim[i].
1167 static __isl_give isl_union_map
*scale_tile_loops(struct gpu_gen
*gen
,
1168 __isl_take isl_union_map
*sched
)
1172 isl_basic_map
*scale
;
1174 isl_local_space
*ls
;
1176 if (!gen
->options
->scale_tile_loops
)
1179 dim
= isl_union_map_get_space(sched
);
1180 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->tiled_len
);
1181 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->tiled_len
);
1182 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1183 ls
= isl_local_space_from_space(dim
);
1185 for (i
= 0; i
< gen
->tiled_len
; ++i
) {
1188 if (i
>= gen
->tile_first
&& i
< gen
->tile_first
+ gen
->n_grid
) {
1189 f
= gen
->tile_size
[i
- gen
->tile_first
];
1190 if (!gen
->options
->wrap
)
1191 f
*= gen
->grid_dim
[i
- gen
->tile_first
];
1192 } else if (i
>= gen
->tile_first
+ gen
->n_grid
&&
1193 i
< gen
->tile_first
+ gen
->n_grid
+ gen
->tile_len
) {
1194 f
= gen
->tile_size
[i
- (gen
->tile_first
+ gen
->n_grid
)];
1197 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1198 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1199 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1200 scale
= isl_basic_map_add_constraint(scale
, c
);
1203 isl_local_space_free(ls
);
1205 sched
= isl_union_map_apply_range(sched
,
1206 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1211 /* If we are not performing "wrapping" and if the user asked for it,
1212 * scale the thread tile loops (P1T) of "sched" by gen->block_dim[i].
1214 static __isl_give isl_union_map
*scale_thread_tile_loops(struct gpu_gen
*gen
,
1215 __isl_take isl_union_map
*sched
)
1219 isl_basic_map
*scale
;
1221 isl_local_space
*ls
;
1223 if (gen
->options
->wrap
)
1225 if (!gen
->options
->scale_tile_loops
)
1228 dim
= isl_union_map_get_space(sched
);
1229 dim
= isl_space_add_dims(dim
, isl_dim_in
, gen
->thread_tiled_len
);
1230 dim
= isl_space_add_dims(dim
, isl_dim_out
, gen
->thread_tiled_len
);
1231 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1232 ls
= isl_local_space_from_space(dim
);
1234 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
) {
1237 if (i
>= gen
->shared_len
&&
1238 i
< gen
->shared_len
+ gen
->n_block
)
1239 f
= gen
->block_dim
[i
- gen
->shared_len
];
1241 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1242 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1243 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1244 scale
= isl_basic_map_add_constraint(scale
, c
);
1247 isl_local_space_free(ls
);
1249 sched
= isl_union_map_apply_range(sched
,
1250 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1255 /* If we are not performing "wrapping" and if the user asked for it,
1256 * scale the "n_tile" loops starting at "first" of "sched" by gen->block_dim[i].
1258 static __isl_give isl_union_map
*scale_access_tile_loops(struct gpu_gen
*gen
,
1259 __isl_take isl_union_map
*sched
, int len
, int first
, int n_tile
)
1263 isl_basic_map
*scale
;
1265 isl_local_space
*ls
;
1267 if (gen
->options
->wrap
)
1269 if (!gen
->options
->scale_tile_loops
)
1272 dim
= isl_union_map_get_space(sched
);
1273 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1274 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1275 scale
= isl_basic_map_universe(isl_space_copy(dim
));
1276 ls
= isl_local_space_from_space(dim
);
1278 for (i
= 0; i
< len
; ++i
) {
1281 if (i
>= first
&& i
< first
+ n_tile
)
1282 f
= gen
->kernel
->block_dim
[i
- first
];
1284 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1285 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, f
);
1286 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
1287 scale
= isl_basic_map_add_constraint(scale
, c
);
1290 isl_local_space_free(ls
);
1292 sched
= isl_union_map_apply_range(sched
,
1293 isl_union_map_from_map(isl_map_from_basic_map(scale
)));
1298 /* Add "len" parameters p[i] called prefix%d,
1299 * with bounds to 0 <= p[i] < size[i].
1301 __isl_give isl_set
*add_bounded_parameters(__isl_take isl_set
*set
,
1302 int len
, int *size
, const char *prefix
)
1307 isl_basic_set
*bset
;
1309 isl_local_space
*ls
;
1312 nparam
= isl_set_dim(set
, isl_dim_param
);
1313 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1315 for (i
= 0; i
< len
; ++i
) {
1316 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1317 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1321 dim
= isl_set_get_space(set
);
1322 bset
= isl_basic_set_universe(isl_space_copy(dim
));
1323 ls
= isl_local_space_from_space(dim
);
1325 for (i
= 0; i
< len
; ++i
) {
1326 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1327 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1329 bset
= isl_basic_set_add_constraint(bset
, c
);
1331 c
= isl_inequality_alloc(isl_local_space_copy(ls
));
1332 c
= isl_constraint_set_coefficient_si(c
, isl_dim_param
,
1334 c
= isl_constraint_set_constant_si(c
, size
[i
] - 1);
1335 bset
= isl_basic_set_add_constraint(bset
, c
);
1338 isl_local_space_free(ls
);
1340 return isl_set_intersect(set
, isl_set_from_basic_set(bset
));
1343 /* Add "len" parameters p[i] called prefix%d and intersect "set"
1346 * { : 0 <= p[i] < size[i] }
1348 * or an overapproximation.
1350 static __isl_give isl_set
*add_bounded_parameters_dynamic(
1351 __isl_take isl_set
*set
, __isl_keep isl_multi_pw_aff
*size
,
1357 isl_local_space
*ls
;
1360 len
= isl_multi_pw_aff_dim(size
, isl_dim_out
);
1361 nparam
= isl_set_dim(set
, isl_dim_param
);
1362 set
= isl_set_add_dims(set
, isl_dim_param
, len
);
1364 for (i
= 0; i
< len
; ++i
) {
1365 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
1366 set
= isl_set_set_dim_name(set
, isl_dim_param
,
1370 space
= isl_space_params(isl_set_get_space(set
));
1371 ls
= isl_local_space_from_space(space
);
1372 for (i
= 0; i
< len
; ++i
) {
1373 isl_pw_aff
*param
, *size_i
, *zero
;
1376 param
= isl_pw_aff_var_on_domain(isl_local_space_copy(ls
),
1377 isl_dim_param
, nparam
+ i
);
1379 size_i
= isl_multi_pw_aff_get_pw_aff(size
, i
);
1380 bound
= isl_pw_aff_lt_set(isl_pw_aff_copy(param
), size_i
);
1381 bound
= isl_set_from_basic_set(isl_set_simple_hull(bound
));
1382 set
= isl_set_intersect_params(set
, bound
);
1384 zero
= isl_pw_aff_zero_on_domain(isl_local_space_copy(ls
));
1385 bound
= isl_pw_aff_ge_set(param
, zero
);
1386 set
= isl_set_intersect_params(set
, bound
);
1388 isl_local_space_free(ls
);
1393 /* Construct a map from an access to group->array to the corresponding
1394 * shared/private memory tile.
1395 * The map is of the form
1397 * { [D[i] -> A[a]] -> T[t] }
1399 * where D represents the initial shared_len dimensions
1400 * of the computed schedule.
1402 static __isl_give isl_map
*shift_access(struct gpu_array_ref_group
*group
)
1404 struct gpu_array_tile
*tile
;
1405 isl_multi_aff
*tiling
;
1407 tile
= group
->private_tile
;
1409 tile
= group
->shared_tile
;
1411 tiling
= isl_multi_aff_copy(tile
->tiling
);
1413 return isl_map_from_multi_aff(tiling
);
1416 /* Does "map" have an obviously fixed value at variable "pos" of "type"?
1418 static int map_plain_is_fixed(isl_map
*map
, enum isl_dim_type type
,
1424 v
= isl_map_plain_get_val_if_fixed(map
, type
, pos
);
1427 fixed
= isl_val_is_int(v
);
1433 /* Given a schedule that iterates over all elements in a piece of an array,
1434 * perform tiling/wrapping over the threads.
1436 * In particular, we tile the final iterators so that the final thread
1437 * dimension runs over the final array dimension.
1438 * However, if those final iterators have only a single iteration,
1439 * we try to tile earlier iterators instead.
1441 static __isl_give isl_map
*tile_access_schedule(struct gpu_gen
*gen
,
1442 __isl_take isl_map
*sched
)
1445 isl_union_map
*usched
;
1448 unsigned nvar
= isl_map_dim(sched
, isl_dim_out
);
1452 n_tile
= gen
->kernel
->n_block
;
1453 if (n_tile
> nvar
) {
1455 sched
= isl_map_insert_dims(sched
,
1456 isl_dim_out
, 0, n_tile
- nvar
);
1457 for (i
= 0; i
< n_tile
- nvar
; ++i
)
1458 sched
= isl_map_fix_si(sched
, isl_dim_out
, i
, 0);
1462 first
= nvar
- n_tile
;
1464 for (; first
> 0; first
--)
1465 if (!map_plain_is_fixed(sched
, isl_dim_out
, first
+ n_tile
- 1))
1468 dim
= isl_map_get_space(sched
);
1469 dim
= isl_space_params(dim
);
1470 if (gen
->options
->wrap
)
1471 tiling
= wrap(isl_space_copy(dim
), nvar
, first
,
1472 n_tile
, gen
->kernel
->block_dim
);
1474 tiling
= tile(isl_space_copy(dim
), nvar
, first
,
1475 n_tile
, gen
->kernel
->block_dim
);
1476 sched
= isl_map_apply_range(sched
, tiling
);
1478 par
= parametrization(dim
, nvar
+ n_tile
, first
+ n_tile
, n_tile
, "t");
1479 sched
= isl_map_intersect_range(sched
, par
);
1481 usched
= isl_union_map_from_map(sched
);
1482 usched
= scale_access_tile_loops(gen
, usched
, nvar
+ n_tile
,
1484 sched
= isl_map_from_union_map(usched
);
1489 /* Return the union of all read (read = 1) and/or write (write = 1)
1490 * access relations in the group.
1492 static __isl_give isl_union_map
*group_access_relation(
1493 struct gpu_array_ref_group
*group
, int read
, int write
)
1496 isl_union_map
*access
;
1498 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1499 for (i
= 0; i
< group
->n_ref
; ++i
) {
1502 if (!((read
&& group
->refs
[i
]->read
) ||
1503 (write
&& group
->refs
[i
]->write
)))
1505 map_i
= isl_map_copy(group
->refs
[i
]->access
);
1506 access
= isl_union_map_union(access
,
1507 isl_union_map_from_map(map_i
));
1513 /* Return the union of all tagged access relations in the group.
1515 static __isl_give isl_union_map
*group_tagged_access_relation(
1516 struct gpu_array_ref_group
*group
)
1519 isl_union_map
*access
;
1521 access
= isl_union_map_empty(isl_map_get_space(group
->access
));
1522 for (i
= 0; i
< group
->n_ref
; ++i
) {
1525 map_i
= isl_map_copy(group
->refs
[i
]->tagged_access
);
1526 access
= isl_union_map_union(access
,
1527 isl_union_map_from_map(map_i
));
1533 /* Return the extent of "array", recomputed from the bounds.
1534 * The recomputed extent may be simpler than the original extent.
1536 static __isl_give isl_set
*array_extent(struct gpu_array_info
*array
)
1541 isl_local_space
*ls
;
1544 id
= isl_set_get_tuple_id(array
->extent
);
1545 space
= isl_set_get_space(array
->extent
);
1546 extent
= isl_set_universe(isl_space_copy(space
));
1547 ls
= isl_local_space_from_space(space
);
1548 for (i
= 0; i
< array
->n_index
; ++i
) {
1554 extent
= isl_set_lower_bound_si(extent
, isl_dim_set
, i
, 0);
1556 aff
= isl_aff_var_on_domain(isl_local_space_copy(ls
),
1558 index
= isl_pw_aff_from_aff(aff
);
1559 bound
= isl_pw_aff_copy(array
->bound
[i
]);
1560 bound
= isl_pw_aff_from_range(bound
);
1561 bound
= isl_pw_aff_add_dims(bound
, isl_dim_in
, array
->n_index
);
1562 bound
= isl_pw_aff_set_tuple_id(bound
, isl_dim_in
,
1564 lt
= isl_pw_aff_lt_set(index
, bound
);
1565 extent
= isl_set_intersect(extent
, lt
);
1567 isl_local_space_free(ls
);
1573 /* Return a map from the first shared_len dimensions of the computed
1574 * schedule to the array tile in
1575 * global memory that corresponds to the shared memory copy.
1577 * In particular, return a map
1583 * tile_offset(i) <= a <= tile_offset(i) + tile_size - 1 (1)
1587 * 0 <= a <= array_size - 1 (2)
1589 * Note that if some stride has been detected (i.e., when
1590 * group->shared_tile->bound[i].shift is set), then a in (1) refers
1591 * to the shifted and scaled down version.
1593 * Constraints (1) are obtained by mapping the size constraints on the
1594 * shared/private memory tile back to the access relation.
1595 * Constraints (2) are obtained from the (recomputed) extent.
1597 static __isl_give isl_map
*group_tile(struct gpu_array_ref_group
*group
)
1600 int n_index
= group
->array
->n_index
;
1606 space
= isl_multi_aff_get_space(group
->shared_tile
->tiling
);
1607 space
= isl_space_range(space
);
1608 local
= isl_set_universe(space
);
1609 for (i
= 0; i
< n_index
; ++i
) {
1612 local
= isl_set_lower_bound_si(local
, isl_dim_set
, i
, 0);
1613 bound
= isl_val_copy(group
->shared_tile
->bound
[i
].size
);
1614 bound
= isl_val_sub_ui(bound
, 1);
1615 local
= isl_set_upper_bound_val(local
, isl_dim_set
, i
, bound
);
1617 local
= isl_set_preimage_multi_aff(local
,
1618 isl_multi_aff_copy(group
->shared_tile
->tiling
));
1619 tile
= isl_set_unwrap(local
);
1620 extent
= array_extent(group
->array
);
1621 tile
= isl_map_intersect_range(tile
, extent
);
1626 /* Given a mapping "iterator_map" from the AST schedule to a domain,
1627 * return the corresponding mapping from the AST schedule to
1628 * to the first shared_len dimensions of the schedule computed by PPCG.
1630 static __isl_give isl_pw_multi_aff
*compute_sched_to_shared(struct gpu_gen
*gen
,
1631 __isl_take isl_pw_multi_aff
*iterator_map
)
1633 isl_union_map
*umap
;
1635 isl_map
*map
, *sched
;;
1637 space
= isl_space_range(isl_pw_multi_aff_get_space(iterator_map
));
1638 space
= isl_space_from_domain(space
);
1639 space
= isl_space_add_dims(space
, isl_dim_out
, gen
->shared_len
);
1641 umap
= isl_union_map_copy(gen
->shared_sched
);
1642 umap
= isl_union_map_apply_range(umap
,
1643 isl_union_map_copy(gen
->shared_proj
));
1644 map
= isl_union_map_extract_map(umap
, space
);
1645 isl_union_map_free(umap
);
1647 sched
= isl_map_preimage_domain_pw_multi_aff(map
, iterator_map
);
1648 sched
= isl_map_detect_equalities(sched
);
1650 return isl_pw_multi_aff_from_map(sched
);
1653 /* Set unroll[j] if the input dimension j is involved in
1654 * the index expression represented by ma.
1656 static int check_unroll(__isl_take isl_set
*set
, __isl_take isl_multi_aff
*ma
,
1660 int n_in
= isl_multi_aff_dim(ma
, isl_dim_in
);
1661 int n_out
= isl_multi_aff_dim(ma
, isl_dim_out
);
1664 for (i
= 0; i
< n_out
; ++i
) {
1667 aff
= isl_multi_aff_get_aff(ma
, i
);
1668 for (j
= 0; j
< n_in
; ++j
)
1669 if (isl_aff_involves_dims(aff
, isl_dim_in
, j
, 1))
1675 isl_multi_aff_free(ma
);
1679 /* Given an array pos mapping input dimensions to the corresponding
1680 * output dimension, construct the corresponding map.
1682 static __isl_give isl_map
*permutation(__isl_take isl_space
*dim
,
1687 isl_basic_map
*bmap
;
1688 isl_local_space
*ls
;
1690 dim
= isl_space_add_dims(dim
, isl_dim_in
, len
);
1691 dim
= isl_space_add_dims(dim
, isl_dim_out
, len
);
1692 bmap
= isl_basic_map_universe(isl_space_copy(dim
));
1693 ls
= isl_local_space_from_space(dim
);
1695 for (i
= 0; i
< len
; ++i
) {
1696 c
= isl_equality_alloc(isl_local_space_copy(ls
));
1697 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
,
1699 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, pos
[i
],
1701 bmap
= isl_basic_map_add_constraint(bmap
, c
);
1703 isl_local_space_free(ls
);
1705 return isl_map_from_basic_map(bmap
);
1708 /* Remove the private tiles from all array reference groups,
1709 * except for the groups of arrays that are marked force_private.
1711 static void remove_private_tiles(struct gpu_gen
*gen
)
1715 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1716 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1718 if (array
->force_private
)
1721 for (j
= 0; j
< array
->n_group
; ++j
) {
1722 struct gpu_array_ref_group
*group
= array
->groups
[j
];
1724 group
->private_tile
= free_tile(group
->private_tile
);
1729 /* Find all loops involved in any of the index expressions for any of
1730 * the private accesses, move them innermost and then mark them as
1731 * requiring unrolling by setting gen->first_unroll.
1732 * The loops involved should all be parallel because of the checks
1733 * we performed in check_private_group_access. Moving them innermost
1734 * is therefore a valid transformation.
1736 * If any of the arrays are marked force_private, however, then
1737 * those loops may not be parallel with respect to the marked arrays.
1738 * If any of the loops would have to be moved innermost for the
1739 * (non forced) private accesses and if there are any force_private
1740 * arrays, then we revert the decision to map the selected arrays
1741 * to private memory. An alternative solution would be to expand
1742 * the force_private arrays.
1744 * Loops up to gen->shared_len are generated before the mapping to
1745 * threads is applied. They should therefore be ignored.
1747 * We compute the hidden equalities of the schedule first
1748 * since we will need them in our calls to isl_pw_multi_aff_from_map
1749 * and because we want to make sure that the same equalities
1750 * are also available to the code generator.
1752 static __isl_give isl_union_map
*interchange_for_unroll(struct gpu_gen
*gen
,
1753 __isl_take isl_union_map
*sched
)
1756 int unroll
[gen
->thread_tiled_len
];
1757 int perm
[gen
->thread_tiled_len
];
1760 int len
= gen
->shared_len
+ gen
->n_parallel
+ gen
->n_block
;
1762 gen
->first_unroll
= -1;
1764 sched
= isl_union_map_detect_equalities(sched
);
1765 for (i
= 0; i
< gen
->thread_tiled_len
; ++i
)
1767 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
1768 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
1770 for (j
= 0; j
< array
->n_group
; ++j
) {
1771 isl_union_map
*access
;
1773 isl_pw_multi_aff
*pma
;
1775 if (!array
->groups
[j
]->private_tile
)
1778 access
= group_access_relation(array
->groups
[j
], 1, 1);
1779 access
= isl_union_map_apply_domain(access
,
1780 isl_union_map_copy(sched
));
1782 acc
= isl_map_from_union_map(access
);
1783 pma
= isl_pw_multi_aff_from_map(acc
);
1784 isl_pw_multi_aff_foreach_piece(pma
,
1785 &check_unroll
, unroll
);
1787 isl_pw_multi_aff_free(pma
);
1791 for (i
= gen
->shared_len
; i
< len
; ++i
)
1798 for (i
= len
; i
< gen
->thread_tiled_len
; ++i
)
1802 if (gen
->any_force_private
) {
1803 remove_private_tiles(gen
);
1808 for (i
= 0; i
< gen
->shared_len
; ++i
)
1810 for (i
= gen
->shared_len
; i
< gen
->thread_tiled_len
; ++i
)
1813 gen
->first_unroll
= j
- gen
->shared_len
;
1814 for (i
= gen
->shared_len
; i
< len
; ++i
)
1818 dim
= isl_union_map_get_space(sched
);
1819 permute
= permutation(dim
, perm
, gen
->thread_tiled_len
);
1820 sched
= isl_union_map_apply_range(sched
,
1821 isl_union_map_from_map(permute
));
1826 /* Given a constraint
1828 * a(p,i) + j = g f(e)
1830 * or -a(p,i) - j = g f(e) if sign < 0,
1831 * store a(p,i) in bound->shift and g (stride) in bound->stride.
1832 * a(p,i) is assumed to be an expression in only the parameters
1833 * and the input dimensions.
1835 static void extract_stride(__isl_keep isl_constraint
*c
,
1836 struct gpu_array_bound
*bound
, __isl_keep isl_val
*stride
, int sign
)
1845 isl_val_free(bound
->stride
);
1846 bound
->stride
= isl_val_copy(stride
);
1848 space
= isl_constraint_get_space(c
);
1849 space
= isl_space_domain(space
);
1851 nparam
= isl_space_dim(space
, isl_dim_param
);
1852 nvar
= isl_space_dim(space
, isl_dim_set
);
1854 v
= isl_constraint_get_constant_val(c
);
1857 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
1858 aff
= isl_aff_set_constant_val(aff
, v
);
1860 for (i
= 0; i
< nparam
; ++i
) {
1861 if (!isl_constraint_involves_dims(c
, isl_dim_param
, i
, 1))
1863 v
= isl_constraint_get_coefficient_val(c
, isl_dim_param
, i
);
1866 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_param
, i
, v
);
1869 for (i
= 0; i
< nvar
; ++i
) {
1870 if (!isl_constraint_involves_dims(c
, isl_dim_in
, i
, 1))
1872 v
= isl_constraint_get_coefficient_val(c
, isl_dim_in
, i
);
1875 aff
= isl_aff_add_coefficient_val(aff
, isl_dim_in
, i
, v
);
1881 /* Given an equality constraint of a map with a single output dimension j,
1882 * check if the constraint is of the form
1884 * a(p,i) + j = g f(e)
1886 * with a(p,i) an expression in the parameters and input dimensions
1887 * and f(e) an expression in the existentially quantified variables.
1888 * If so, and if g is larger than any such g from a previously considered
1889 * constraint, then call extract_stride to record the stride information
1892 static int check_stride_constraint(__isl_take isl_constraint
*c
, void *user
)
1898 struct gpu_array_bound
*bound
= user
;
1900 ctx
= isl_constraint_get_ctx(c
);
1901 n_div
= isl_constraint_dim(c
, isl_dim_div
);
1902 v
= isl_constraint_get_coefficient_val(c
, isl_dim_out
, 0);
1904 if (n_div
&& (isl_val_is_one(v
) || isl_val_is_negone(v
))) {
1905 int s
= isl_val_sgn(v
);
1906 isl_val
*stride
= isl_val_zero(ctx
);
1909 for (i
= 0; i
< n_div
; ++i
) {
1910 v
= isl_constraint_get_coefficient_val(c
,
1912 stride
= isl_val_gcd(stride
, v
);
1914 if (!isl_val_is_zero(stride
) &&
1915 isl_val_gt(stride
, bound
->stride
))
1916 extract_stride(c
, bound
, stride
, s
);
1918 isl_val_free(stride
);
1922 isl_constraint_free(c
);
1926 /* Given contraints on an array index i, check if we can find
1927 * a shift a(p) and a stride g such that
1929 * a(p) + i = 0 mod g
1931 * If so, record the information in bound and apply the mapping
1932 * i -> (i + a(p))/g to the array index in bounds and return
1933 * the new constraints.
1934 * If not, simply return the original constraints.
1936 * If bounds is a subset of the space
1940 * then the bound recorded in bound->shift is of the form
1944 * with s(D) equal to a(p) above.
1945 * Next, we construct a mapping of the form
1947 * [D -> i] -> [D -> (i + S(D))/g]
1949 * This mapping is computed as follows.
1950 * We first introduce "i" in the domain through precomposition
1951 * with [D -> i] -> D obtaining
1955 * Adding [D -> i] -> i produces
1957 * [D -> i] -> i + s(D)
1959 * and the domain product with [D -> i] -> D yields
1961 * [D -> i] -> [D -> i + s(D)]
1963 * Composition with [D -> i] -> [D -> i/g] gives the desired result.
1965 static __isl_give isl_basic_map
*check_stride(struct gpu_array_bound
*bound
,
1966 __isl_take isl_basic_map
*bounds
)
1969 isl_basic_map
*hull
;
1970 isl_basic_map
*shift
, *id
, *bmap
, *scale
;
1971 isl_basic_set
*bset
;
1974 bound
->stride
= NULL
;
1976 hull
= isl_basic_map_affine_hull(isl_basic_map_copy(bounds
));
1978 isl_basic_map_foreach_constraint(hull
, &check_stride_constraint
, bound
);
1980 isl_basic_map_free(hull
);
1985 shift
= isl_basic_map_from_aff(isl_aff_copy(bound
->shift
));
1986 space
= isl_basic_map_get_space(bounds
);
1987 bmap
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1988 shift
= isl_basic_map_apply_range(bmap
, shift
);
1989 space
= isl_basic_map_get_space(bounds
);
1990 id
= isl_basic_map_range_map(isl_basic_map_universe(space
));
1991 shift
= isl_basic_map_sum(id
, shift
);
1992 space
= isl_basic_map_get_space(bounds
);
1993 id
= isl_basic_map_domain_map(isl_basic_map_universe(space
));
1994 shift
= isl_basic_map_range_product(id
, shift
);
1996 space
= isl_space_domain(isl_basic_map_get_space(bounds
));
1997 id
= isl_basic_map_identity(isl_space_map_from_set(space
));
1998 space
= isl_space_range(isl_basic_map_get_space(bounds
));
1999 aff
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
2000 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, 0, 1);
2001 aff
= isl_aff_scale_down_val(aff
, isl_val_copy(bound
->stride
));
2002 scale
= isl_basic_map_from_aff(aff
);
2003 scale
= isl_basic_map_product(id
, scale
);
2005 bmap
= isl_basic_map_apply_range(shift
, scale
);
2006 bset
= isl_basic_set_apply(isl_basic_map_wrap(bounds
), bmap
);
2007 bounds
= isl_basic_set_unwrap(bset
);
2012 /* Data used in compute_array_dim_size and compute_size_in_direction.
2014 * pos is the position of the variable representing the array index,
2015 * i.e., the variable for which want to compute the size. This variable
2016 * is also the last variable in the set.
2018 struct gpu_size_info
{
2019 isl_basic_set
*bset
;
2020 struct gpu_array_bound
*bound
;
2024 /* Given a constraint from the basic set describing the bounds on
2025 * an array index, check if it is a lower bound, say m i >= b(x), and,
2026 * if so, check whether the expression "i - ceil(b(x)/m) + 1" has a constant
2027 * upper bound. If so, and if this bound is smaller than any bound
2028 * derived from earlier constraints, set the size to this bound on
2029 * the expression and the lower bound to ceil(b(x)/m).
2031 static int compute_size_in_direction(__isl_take isl_constraint
*c
, void *user
)
2033 struct gpu_size_info
*size
= user
;
2040 nparam
= isl_basic_set_dim(size
->bset
, isl_dim_param
);
2041 n_div
= isl_constraint_dim(c
, isl_dim_div
);
2043 if (isl_constraint_involves_dims(c
, isl_dim_div
, 0, n_div
) ||
2044 !isl_constraint_is_lower_bound(c
, isl_dim_set
, size
->pos
)) {
2045 isl_constraint_free(c
);
2049 aff
= isl_constraint_get_bound(c
, isl_dim_set
, size
->pos
);
2050 aff
= isl_aff_ceil(aff
);
2052 lb
= isl_aff_copy(aff
);
2054 aff
= isl_aff_neg(aff
);
2055 aff
= isl_aff_add_coefficient_si(aff
, isl_dim_in
, size
->pos
, 1);
2057 v
= isl_basic_set_max_val(size
->bset
, aff
);
2060 if (isl_val_is_int(v
)) {
2061 v
= isl_val_add_ui(v
, 1);
2062 if (!size
->bound
->size
|| isl_val_lt(v
, size
->bound
->size
)) {
2063 isl_val_free(size
->bound
->size
);
2064 size
->bound
->size
= isl_val_copy(v
);
2065 lb
= isl_aff_drop_dims(lb
, isl_dim_in
, size
->pos
, 1);
2066 isl_aff_free(size
->bound
->lb
);
2067 size
->bound
->lb
= isl_aff_copy(lb
);
2073 isl_constraint_free(c
);
2078 /* Given a basic map "bounds" that maps parameters and input dimensions
2079 * to a single output dimension, look for an expression in the parameters
2080 * and input dimensions such that the range of the output dimension shifted
2081 * by this expression is a constant.
2083 * In particular, we currently only consider lower bounds on the output
2084 * dimension as candidate expressions.
2086 static int compute_array_dim_size(struct gpu_array_bound
*bound
,
2087 __isl_take isl_basic_map
*bounds
)
2089 struct gpu_size_info size
;
2091 bounds
= isl_basic_map_detect_equalities(bounds
);
2092 bounds
= check_stride(bound
, bounds
);
2098 size
.pos
= isl_basic_map_dim(bounds
, isl_dim_in
);
2099 size
.bset
= isl_basic_map_wrap(bounds
);
2100 size
.bset
= isl_basic_set_flatten(size
.bset
);
2101 size
.bset
= isl_set_simple_hull(isl_basic_set_compute_divs(size
.bset
));
2102 isl_basic_set_foreach_constraint(size
.bset
, &compute_size_in_direction
,
2104 isl_basic_set_free(size
.bset
);
2106 return bound
->size
? 0 : -1;
2109 /* Check if we can find a memory tile for the given array
2110 * based on the given accesses, and if so, put the results in "tile".
2112 * We project the accesses on each index in turn and look for a parametric
2113 * offset such that the size is constant.
2115 static int can_tile(__isl_keep isl_map
*access
, struct gpu_array_tile
*tile
)
2119 for (i
= 0; i
< tile
->n
; ++i
) {
2121 isl_basic_map
*hull
;
2123 access_i
= isl_map_copy(access
);
2124 access_i
= isl_map_project_out(access_i
, isl_dim_out
, 0, i
);
2125 access_i
= isl_map_project_out(access_i
, isl_dim_out
,
2126 1, tile
->n
- (i
+ 1));
2127 access_i
= isl_map_compute_divs(access_i
);
2128 hull
= isl_map_simple_hull(access_i
);
2129 if (compute_array_dim_size(&tile
->bound
[i
], hull
) < 0)
2136 /* Construct a map with input the shared tile loops and the loops that
2137 * will be wrapped around the threads that relates these later loops
2138 * to the thread indices and then projects them out.
2140 static __isl_give isl_map
*compute_privatization(struct gpu_gen
*gen
)
2148 dim
= isl_union_map_get_space(gen
->shared_sched
);
2150 if (gen
->options
->wrap
)
2151 tiling
= wrap(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2152 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2154 tiling
= tile(isl_space_copy(dim
), gen
->shared_len
+ gen
->n_block
,
2155 gen
->shared_len
, gen
->n_block
, gen
->block_dim
);
2159 par
= parametrization(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2160 gen
->tile_first
+ gen
->tile_len
+ gen
->n_grid
+ gen
->n_block
,
2163 priv
= isl_map_align_params(priv
, isl_set_get_space(par
));
2164 priv
= isl_map_intersect_range(priv
, par
);
2166 dim
= isl_map_get_space(priv
);
2167 dim
= isl_space_drop_dims(dim
, isl_dim_in
, 0, isl_space_dim(dim
, isl_dim_in
));
2168 dim
= isl_space_drop_dims(dim
, isl_dim_out
, 0, isl_space_dim(dim
, isl_dim_out
));
2169 proj
= projection(dim
, gen
->shared_len
+ 2 * gen
->n_block
,
2172 priv
= isl_map_apply_range(priv
, proj
);
2177 /* Construct a map from domain_dim to domain_dim that increments
2178 * the dimension at position "pos" and leaves all other dimensions
2181 static __isl_give isl_map
*next(__isl_take isl_space
*domain_dim
, int pos
)
2184 int len
= isl_space_dim(domain_dim
, isl_dim_set
);
2186 isl_basic_map
*next
;
2187 isl_local_space
*ls
;
2189 dim
= isl_space_map_from_set(domain_dim
);
2190 next
= isl_basic_map_universe(isl_space_copy(dim
));
2191 ls
= isl_local_space_from_space(dim
);
2193 for (i
= 0; i
< len
; ++i
) {
2196 c
= isl_equality_alloc(isl_local_space_copy(ls
));
2197 c
= isl_constraint_set_coefficient_si(c
, isl_dim_in
, i
, 1);
2198 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, i
, -1);
2200 c
= isl_constraint_set_constant_si(c
, 1);
2201 next
= isl_basic_map_add_constraint(next
, c
);
2204 isl_local_space_free(ls
);
2206 return isl_map_from_basic_map(next
);
2209 /* Check if the given access is coalesced.
2210 * That is, check whether incrementing the dimension that will get
2211 * wrapped over the last thread index results in incrementing
2212 * the last array index.
2214 * This function is only called for access relations without reuse and
2215 * kernels with at least one block dimension.
2217 static int access_is_coalesced(struct gpu_gen
*gen
,
2218 __isl_keep isl_union_map
*access
)
2221 isl_map
*access_map
;
2222 isl_map
*next_thread_x
;
2223 isl_map
*next_element
;
2227 access
= isl_union_map_copy(access
);
2228 access
= isl_union_map_apply_domain(access
,
2229 isl_union_map_copy(gen
->tiled_sched
));
2230 access_map
= isl_map_from_union_map(access
);
2232 dim
= isl_map_get_space(access_map
);
2233 dim
= isl_space_domain(dim
);
2234 next_thread_x
= next(dim
, gen
->shared_len
+ gen
->n_block
- 1);
2236 dim
= isl_map_get_space(access_map
);
2237 dim
= isl_space_range(dim
);
2238 next_element
= next(dim
, isl_space_dim(dim
, isl_dim_set
) - 1);
2240 map
= isl_map_apply_domain(next_thread_x
, isl_map_copy(access_map
));
2241 map
= isl_map_apply_range(map
, access_map
);
2243 coalesced
= isl_map_is_subset(map
, next_element
);
2245 isl_map_free(next_element
);
2251 /* Given an access relation in terms of the first gen->shared_len + gen->n_block
2252 * dimensions of the computed schedule, check if it is bijective for
2253 * fixed values of the first gen->shared_len dimensions.
2254 * We perform this check by equating these dimensions to parameters.
2256 static int access_is_bijective(struct gpu_gen
*gen
, __isl_keep isl_map
*access
)
2262 access
= isl_map_copy(access
);
2263 space
= isl_space_params(isl_map_get_space(access
));
2264 par
= parametrization(space
, gen
->shared_len
+ gen
->n_block
,
2265 0, gen
->shared_len
, "s");
2266 access
= isl_map_intersect_domain(access
, par
);
2267 res
= isl_map_is_bijective(access
);
2268 isl_map_free(access
);
2273 /* Look for the last shared tile loop that affects the offset of "tile"
2274 * and return the result.
2275 * If there is no such loop, then return the index of the loop
2276 * before the first shared tile loop, in particular gen->tile_first - 1.
2278 static int compute_tile_last_shared(struct gpu_gen
*gen
,
2279 struct gpu_array_tile
*tile
)
2283 for (j
= gen
->shared_len
- 1; j
>= gen
->tile_first
; --j
) {
2284 for (i
= 0; i
< tile
->n
; ++i
) {
2288 lb
= tile
->bound
[i
].lb
;
2289 if (isl_aff_involves_dims(lb
, isl_dim_in
, j
, 1))
2292 shift
= tile
->bound
[i
].shift
;
2295 if (isl_aff_involves_dims(shift
, isl_dim_in
, j
, 1))
2305 /* Look for the last shared tile loop that affects the offset of the
2306 * shared or private tile and store the result in group->last_shared.
2307 * If there is no such loop, then group->last_shared is set to a value
2308 * before the first shared tile loop, in particular gen->tile_first - 1.
2309 * If there is no tile defined on the array reference group,
2310 * then set group->last_shared to gen->shared_len - 1.
2312 static void set_last_shared(struct gpu_gen
*gen
,
2313 struct gpu_array_ref_group
*group
)
2315 struct gpu_array_tile
*tile
;
2317 group
->last_shared
= gen
->shared_len
- 1;
2319 tile
= group
->private_tile
;
2321 tile
= group
->shared_tile
;
2325 group
->last_shared
= compute_tile_last_shared(gen
, tile
);
2328 /* Compute the size of the tile specified by "tile"
2329 * in number of elements and return the result.
2331 static __isl_give isl_val
*tile_size(isl_ctx
*ctx
, struct gpu_array_tile
*tile
)
2336 size
= isl_val_one(ctx
);
2338 for (i
= 0; i
< tile
->n
; ++i
)
2339 size
= isl_val_mul(size
, isl_val_copy(tile
->bound
[i
].size
));
2344 /* If max_shared_memory is not set to infinity (-1), then make
2345 * sure that the total amount of shared memory required by the
2346 * array reference groups mapped to shared memory is no larger
2347 * than this maximum.
2349 * We apply a greedy approach and discard (keep in global memory)
2350 * those groups that would result in a total memory size that
2351 * is larger than the maximum.
2353 * This function should be called after any function that may
2354 * affect the decision on whether to place a reference group
2355 * in private, shared or global memory.
2357 static void check_shared_memory_bound(struct gpu_gen
*gen
)
2360 isl_val
*left
, *size
;
2362 if (gen
->options
->max_shared_memory
< 0)
2365 left
= isl_val_int_from_si(gen
->ctx
, gen
->options
->max_shared_memory
);
2367 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2368 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2370 for (j
= 0; j
< array
->n_group
; ++j
) {
2371 struct gpu_array_ref_group
*group
;
2373 group
= array
->groups
[j
];
2374 if (group
->private_tile
)
2376 if (!group
->shared_tile
)
2379 size
= tile_size(gen
->ctx
, group
->shared_tile
);
2380 size
= isl_val_mul_ui(size
, array
->size
);
2382 if (isl_val_le(size
, left
)) {
2383 left
= isl_val_sub(left
, size
);
2388 group
->shared_tile
= free_tile(group
->shared_tile
);
2395 /* Given a description of an array tile "tile" and the "space"
2399 * where D represents the first shared_len schedule dimensions
2400 * and A represents the array, construct an isl_multi_aff
2402 * { [D[i] -> A[a]] -> A'[a'] }
2404 * with A' a scaled down copy of A according to the shifts and strides
2405 * in "tile". In particular,
2407 * a' = (a + shift(i))/stride
2409 * "insert_array" represents
2413 * and is used to insert A into the domain of functions that only
2416 static __isl_give isl_multi_aff
*strided_tile(
2417 struct gpu_array_tile
*tile
, __isl_keep isl_space
*space
,
2418 __isl_keep isl_multi_aff
*insert_array
)
2422 isl_multi_aff
*shift
;
2423 isl_multi_val
*stride
;
2425 isl_local_space
*ls
;
2426 isl_multi_aff
*tiling
;
2428 ctx
= isl_space_get_ctx(space
);
2429 space2
= isl_space_domain(isl_space_copy(space
));
2430 ls
= isl_local_space_from_space(space2
);
2431 space2
= isl_space_range(isl_space_copy(space
));
2432 stride
= isl_multi_val_zero(space2
);
2433 shift
= isl_multi_aff_zero(isl_space_copy(space
));
2435 for (i
= 0; i
< tile
->n
; ++i
) {
2436 struct gpu_array_bound
*bound
= &tile
->bound
[i
];
2440 if (tile
->bound
[i
].shift
) {
2441 stride_i
= isl_val_copy(bound
->stride
);
2442 shift_i
= isl_aff_copy(bound
->shift
);
2444 stride_i
= isl_val_one(ctx
);
2445 shift_i
= isl_aff_zero_on_domain(
2446 isl_local_space_copy(ls
));
2449 stride
= isl_multi_val_set_val(stride
, i
, stride_i
);
2450 shift
= isl_multi_aff_set_aff(shift
, i
, shift_i
);
2452 isl_local_space_free(ls
);
2454 shift
= isl_multi_aff_pullback_multi_aff(shift
,
2455 isl_multi_aff_copy(insert_array
));
2457 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2458 tiling
= isl_multi_aff_add(tiling
, shift
);
2459 tiling
= isl_multi_aff_scale_down_multi_val(tiling
, stride
);
2464 /* Compute a tiling for the array reference group "group".
2466 * The tiling is of the form
2468 * { [D[i] -> A[a]] -> T[t] }
2470 * where D represents the first shared_len schedule dimensions,
2471 * A represents the global array and T represents the shared or
2472 * private memory tile. The name of T is the name of the local
2475 * If there is any stride in the accesses, then the mapping is
2477 * t = (a + shift(i))/stride - lb(i)
2479 * otherwise, it is simply
2483 static void compute_group_tiling(struct gpu_array_ref_group
*group
)
2486 struct gpu_array_tile
*tile
;
2487 struct gpu_array_info
*array
= group
->array
;
2489 isl_multi_aff
*tiling
, *lb
, *insert_array
;
2493 tile
= group
->private_tile
;
2495 tile
= group
->shared_tile
;
2499 space
= isl_map_get_space(group
->access
);
2500 insert_array
= isl_multi_aff_domain_map(isl_space_copy(space
));
2502 for (i
= 0; i
< tile
->n
; ++i
)
2503 if (tile
->bound
[i
].shift
)
2507 tiling
= strided_tile(tile
, space
, insert_array
);
2509 tiling
= isl_multi_aff_range_map(isl_space_copy(space
));
2511 lb
= isl_multi_aff_zero(space
);
2512 for (i
= 0; i
< tile
->n
; ++i
) {
2513 isl_aff
*lb_i
= isl_aff_copy(tile
->bound
[i
].lb
);
2514 lb
= isl_multi_aff_set_aff(lb
, i
, lb_i
);
2516 lb
= isl_multi_aff_pullback_multi_aff(lb
, insert_array
);
2518 tiling
= isl_multi_aff_sub(tiling
, lb
);
2520 p
= isl_printer_to_str(isl_multi_aff_get_ctx(tiling
));
2521 p
= print_array_name(p
, group
);
2522 local_name
= isl_printer_get_str(p
);
2523 isl_printer_free(p
);
2524 tiling
= isl_multi_aff_set_tuple_name(tiling
, isl_dim_out
, local_name
);
2527 tile
->tiling
= tiling
;
2530 /* Compute a tiling for all the array reference groups.
2532 static void compute_group_tilings(struct gpu_gen
*gen
)
2536 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
2537 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
2539 for (j
= 0; j
< array
->n_group
; ++j
)
2540 compute_group_tiling(array
->groups
[j
]);
2544 /* Fill up the groups array with singleton groups, i.e., one group
2545 * per reference, initializing the array, access, write, n_ref and refs fields.
2546 * In particular the access field is initialized to the scheduled
2547 * access relation of the array reference.
2549 * Return the number of elements initialized, i.e., the number of
2550 * active references in the current kernel.
2552 static int populate_array_references(struct gpu_array_info
*array
,
2553 __isl_keep isl_union_map
*sched
, struct gpu_array_ref_group
**groups
)
2557 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
2560 for (i
= 0; i
< array
->n_ref
; ++i
) {
2561 isl_union_map
*umap
;
2563 struct gpu_array_ref_group
*group
;
2564 struct gpu_stmt_access
*access
= array
->refs
[i
];
2566 map
= isl_map_copy(access
->access
);
2567 umap
= isl_union_map_from_map(map
);
2568 umap
= isl_union_map_apply_domain(umap
,
2569 isl_union_map_copy(sched
));
2571 if (isl_union_map_is_empty(umap
)) {
2572 isl_union_map_free(umap
);
2576 map
= isl_map_from_union_map(umap
);
2577 map
= isl_map_detect_equalities(map
);
2579 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2581 group
->array
= array
;
2582 group
->access
= map
;
2583 group
->write
= access
->write
;
2584 group
->exact_write
= access
->exact_write
;
2585 group
->slice
= access
->n_index
< array
->n_index
;
2586 group
->refs
= &array
->refs
[i
];
2589 groups
[n
++] = group
;
2595 /* If group->n_ref == 1, then group->refs was set by
2596 * populate_array_references to point directly into
2597 * group->array->refs and should not be freed.
2598 * If group->n_ref > 1, then group->refs was set by join_groups
2599 * to point to a newly allocated array.
2601 static void free_array_ref_group(struct gpu_array_ref_group
*group
)
2605 free_tile(group
->shared_tile
);
2606 free_tile(group
->private_tile
);
2607 isl_map_free(group
->access
);
2608 if (group
->n_ref
> 1)
2613 /* Given a map where the input dimensions represent the tile loops,
2614 * eliminate the innermost of those that have a fixed value
2615 * until we reach one that does not (obviously) have a fixed value.
2617 static __isl_give isl_map
*eliminate_fixed_inner_loops(
2618 __isl_take isl_map
*access
)
2622 n
= isl_map_dim(access
, isl_dim_in
);
2624 for (i
= n
- 1; i
>= 0; --i
) {
2625 if (!map_plain_is_fixed(access
, isl_dim_in
, i
))
2627 access
= isl_map_eliminate(access
, isl_dim_in
, i
, 1);
2632 /* Check if the access relations of group1 and group2 overlap within
2633 * the innermost loop. In particular, ignore any inner dimension
2634 * with a fixed value.
2635 * The copying to and from shared memory will be performed within
2636 * the innermost actual loop so we are only allowed to consider
2637 * the dimensions up to that innermost loop while checking whether
2638 * two access relations overlap.
2640 static int accesses_overlap(struct gpu_array_ref_group
*group1
,
2641 struct gpu_array_ref_group
*group2
)
2644 isl_map
*access1
, *access2
;
2646 access1
= isl_map_copy(group1
->access
);
2647 access1
= eliminate_fixed_inner_loops(access1
);
2648 access2
= isl_map_copy(group2
->access
);
2649 access2
= eliminate_fixed_inner_loops(access2
);
2650 access1
= isl_map_intersect(access1
, access2
);
2651 empty
= isl_map_is_empty(access1
);
2652 isl_map_free(access1
);
2657 /* Combine the given two groups into a single group, containing
2658 * the references of both groups.
2660 static struct gpu_array_ref_group
*join_groups(
2661 struct gpu_array_ref_group
*group1
,
2662 struct gpu_array_ref_group
*group2
)
2666 struct gpu_array_ref_group
*group
;
2668 ctx
= isl_map_get_ctx(group1
->access
);
2669 group
= isl_calloc_type(ctx
, struct gpu_array_ref_group
);
2671 group
->array
= group1
->array
;
2672 group
->access
= isl_map_union(isl_map_copy(group1
->access
),
2673 isl_map_copy(group2
->access
));
2674 group
->write
= group1
->write
|| group2
->write
;
2675 group
->exact_write
= group1
->exact_write
&& group2
->exact_write
;
2676 group
->slice
= group1
->slice
|| group2
->slice
;
2677 group
->n_ref
= group1
->n_ref
+ group2
->n_ref
;
2678 group
->refs
= isl_alloc_array(ctx
, struct gpu_stmt_access
*,
2680 assert(group
->refs
);
2681 for (i
= 0; i
< group1
->n_ref
; ++i
)
2682 group
->refs
[i
] = group1
->refs
[i
];
2683 for (i
= 0; i
< group2
->n_ref
; ++i
)
2684 group
->refs
[group1
->n_ref
+ i
] = group2
->refs
[i
];
2689 /* Combine the given two groups into a single group and free
2690 * the original two groups.
2692 static struct gpu_array_ref_group
*join_groups_and_free(
2693 struct gpu_array_ref_group
*group1
,
2694 struct gpu_array_ref_group
*group2
)
2696 struct gpu_array_ref_group
*group
;
2698 group
= join_groups(group1
, group2
);
2699 free_array_ref_group(group1
);
2700 free_array_ref_group(group2
);
2704 /* Report that the array reference group with the given access relation
2705 * is not mapped to shared memory in the given kernel because
2706 * it does not exhibit any reuse and is considered to be coalesced.
2708 static void report_no_reuse_and_coalesced(struct ppcg_kernel
*kernel
,
2709 __isl_keep isl_union_map
*access
)
2714 ctx
= isl_union_map_get_ctx(access
);
2715 p
= isl_printer_to_file(ctx
, stdout
);
2716 p
= isl_printer_print_str(p
, "Array reference group ");
2717 p
= isl_printer_print_union_map(p
, access
);
2718 p
= isl_printer_print_str(p
,
2719 " not considered for mapping to shared memory in kernel");
2720 p
= isl_printer_print_int(p
, kernel
->id
);
2721 p
= isl_printer_print_str(p
,
2722 " because it exhibits no reuse and is considered to be coalesced");
2723 p
= isl_printer_end_line(p
);
2724 isl_printer_free(p
);
2727 /* Compute the private and/or shared memory tiles for the array
2728 * reference group "group" of array "array".
2729 * Return 0 on success and -1 on error.
2731 * If the array is a read-only scalar or if the user requested
2732 * not to use shared or private memory, then we do not need to do anything.
2734 * If any reference in the reference group accesses more than one element,
2735 * then we would have to make sure that the layout in shared memory
2736 * is the same as that in global memory. Since we do not handle this yet
2737 * (and it may not even be possible), we refuse to map to private or
2738 * shared memory in such cases.
2740 * If the array group involves any may writes (that are not must writes),
2741 * then we would have to make sure that we load the data into shared/private
2742 * memory first in case the data is not written by the kernel
2743 * (but still written back out to global memory).
2744 * Since we don't have any such mechanism at the moment, we don't
2745 * compute shared/private tiles for groups involving may writes.
2747 * We only try to compute a shared memory tile if there is any reuse
2748 * or if the access is not coalesced.
2750 * For computing a private memory tile, we also require that there is
2751 * some reuse. Moreover, we require that the access is private
2752 * to the thread. That is, we check that any given array element
2753 * is only accessed by a single thread.
2754 * We compute an access relation that maps the shared tile loop iterators
2755 * and the shared point loop iterators that will be wrapped over the
2756 * threads to the array elements.
2757 * We actually check that those iterators that will be wrapped
2758 * partition the array space. This check is stricter than necessary
2759 * since several iterations may be mapped onto the same thread
2760 * and then they could be allowed to access the same memory elements,
2761 * but our check does not allow this situation.
2763 * We also check that the index expression only depends on parallel
2764 * loops. That way, we can move those loops innermost and unroll them.
2765 * Again, we use a test that is stricter than necessary.
2766 * We actually check whether the index expression only depends
2767 * on the iterators that are wrapped over the threads.
2768 * These are necessarily parallel, but there may be more parallel loops.
2770 * Combining the injectivity of the first test with the single-valuedness
2771 * of the second test, we simply test for bijectivity.
2773 * If the array is marked force_private, then we bypass all checks
2774 * and assume we can (and should) use registers.
2776 * If it turns out we can (or have to) use registers, we compute
2777 * the private memory tile size using can_tile, after introducing a dependence
2778 * on the thread indices.
2780 static int compute_group_bounds_core(struct gpu_gen
*gen
,
2781 struct gpu_array_ref_group
*group
)
2783 isl_ctx
*ctx
= isl_space_get_ctx(group
->array
->space
);
2784 isl_union_map
*access
;
2785 int n_index
= group
->array
->n_index
;
2786 int no_reuse
, coalesced
;
2788 int force_private
= group
->array
->force_private
;
2789 int use_shared
= gen
->options
->use_shared_memory
&& gen
->n_block
> 0;
2790 int use_private
= force_private
|| gen
->options
->use_private_memory
;
2792 if (!use_shared
&& !use_private
)
2794 if (gpu_array_is_read_only_scalar(group
->array
))
2796 if (!force_private
&& !group
->exact_write
)
2801 access
= group_access_relation(group
, 1, 1);
2802 no_reuse
= isl_union_map_is_injective(access
);
2803 if (use_shared
&& no_reuse
)
2804 coalesced
= access_is_coalesced(gen
, access
);
2806 if (gen
->options
->debug
->verbose
&& use_shared
&& no_reuse
&& coalesced
)
2807 report_no_reuse_and_coalesced(gen
->kernel
, access
);
2809 if (use_shared
&& (!no_reuse
|| !coalesced
)) {
2810 group
->shared_tile
= create_tile(ctx
, group
->array
->n_index
);
2811 if (!can_tile(group
->access
, group
->shared_tile
))
2812 group
->shared_tile
= free_tile(group
->shared_tile
);
2815 if (!force_private
&& (!use_private
|| no_reuse
)) {
2816 isl_union_map_free(access
);
2820 access
= isl_union_map_apply_domain(access
,
2821 isl_union_map_copy(gen
->shared_sched
));
2823 acc
= isl_map_from_union_map(access
);
2825 if (!force_private
&& !access_is_bijective(gen
, acc
)) {
2830 group
->private_tile
= create_tile(gen
->ctx
, n_index
);
2831 acc
= isl_map_apply_domain(acc
, isl_map_copy(gen
->privatization
));
2832 if (!can_tile(acc
, group
->private_tile
))
2833 group
->private_tile
= free_tile(group
->private_tile
);
2837 if (force_private
&& !group
->private_tile
)
2838 isl_die(ctx
, isl_error_internal
,
2839 "unable to map array reference group to registers",
2845 /* Compute the private and/or shared memory tiles for the array
2846 * reference group "group" of array "array" and set last_shared.
2847 * Return 0 on success and -1 on error.
2849 static int compute_group_bounds(struct gpu_gen
*gen
,
2850 struct gpu_array_ref_group
*group
)
2852 if (compute_group_bounds_core(gen
, group
) < 0)
2854 set_last_shared(gen
, group
);
2859 /* If two groups have overlapping access relations (as determined by
2860 * the "overlap" function) and if one of them involves a write,
2861 * then merge the two groups into one.
2862 * If "compute_bounds" is set, then call compute_group_bounds
2863 * on the merged groups.
2865 * Return the updated number of groups.
2866 * Return -1 on error.
2868 static int group_writes(struct gpu_gen
*gen
,
2869 int n
, struct gpu_array_ref_group
**groups
,
2870 int (*overlap
)(struct gpu_array_ref_group
*group1
,
2871 struct gpu_array_ref_group
*group2
), int compute_bounds
)
2875 for (i
= 0; i
< n
; ++i
) {
2876 for (j
= n
- 1; j
> i
; --j
) {
2877 if (!groups
[i
]->write
&& !groups
[j
]->write
)
2880 if (!overlap(groups
[i
], groups
[j
]))
2883 groups
[i
] = join_groups_and_free(groups
[i
], groups
[j
]);
2884 if (compute_bounds
&&
2885 compute_group_bounds(gen
, groups
[i
]) < 0)
2888 groups
[j
] = groups
[n
- 1];
2889 groups
[n
- 1] = NULL
;
2897 /* If two groups have overlapping access relations (within the innermost
2898 * loop) and if one of them involves a write, then merge the two groups
2901 * Return the updated number of groups.
2903 static int group_overlapping_writes(struct gpu_gen
*gen
,
2904 int n
, struct gpu_array_ref_group
**groups
)
2906 return group_writes(gen
, n
, groups
, &accesses_overlap
, 0);
2909 /* Check if the access relations of group1 and group2 overlap within
2910 * the outermost min(group1->last_shared, group2->last_shared) loops.
2912 static int last_shared_accesses_overlap(struct gpu_array_ref_group
*group1
,
2913 struct gpu_array_ref_group
*group2
)
2918 isl_map
*map_i
, *map_j
, *map
;
2920 last_shared
= group1
->last_shared
;
2921 if (group2
->last_shared
< last_shared
)
2922 last_shared
= group2
->last_shared
;
2923 map_i
= isl_map_copy(group1
->access
);
2924 dim
= isl_map_dim(map_i
, isl_dim_in
);
2925 map_i
= isl_map_eliminate(map_i
, isl_dim_in
,
2926 last_shared
+ 1, dim
- (last_shared
+ 1));
2927 map_j
= isl_map_copy(group2
->access
);
2928 map_j
= isl_map_eliminate(map_j
, isl_dim_in
,
2929 last_shared
+ 1, dim
- (last_shared
+ 1));
2930 map
= isl_map_intersect(map_i
, map_j
);
2931 empty
= isl_map_is_empty(map
);
2937 /* If two groups have overlapping access relations (within the outer
2938 * last_shared loops) and if one of them involves a write,
2939 * then merge the two groups into one.
2941 * Return the updated number of groups.
2943 static int group_last_shared_overlapping_writes(struct gpu_gen
*gen
, int n
,
2944 struct gpu_array_ref_group
**groups
)
2946 return group_writes(gen
, n
, groups
, &last_shared_accesses_overlap
, 1);
2949 /* Is the size of the tile specified by "tile" smaller than the sum of
2950 * the sizes of the tiles specified by "tile1" and "tile2"?
2952 static int smaller_tile(isl_ctx
*ctx
, struct gpu_array_tile
*tile
,
2953 struct gpu_array_tile
*tile1
, struct gpu_array_tile
*tile2
)
2956 isl_val
*size
, *size1
, *size2
;
2958 size
= tile_size(ctx
, tile
);
2959 size1
= tile_size(ctx
, tile1
);
2960 size2
= tile_size(ctx
, tile2
);
2962 size
= isl_val_sub(size
, size1
);
2963 size
= isl_val_sub(size
, size2
);
2964 smaller
= isl_val_is_neg(size
);
2971 /* Given an initial grouping of array references and shared memory tiles
2972 * for each group that allows for a shared memory tile, merge two groups
2973 * if both have a shared memory tile, the merged group also has
2974 * a shared memory tile and the size of the tile for the merge group
2975 * is smaller than the sum of the tile sizes of the individual groups.
2977 * If merging two groups decreases the "last_shared" dimension of
2978 * one or both of the two groups, then we need to check for overlapping
2981 * Return the number of groups after merging.
2982 * Return -1 on error.
2984 static int group_common_shared_memory_tile(struct gpu_gen
*gen
,
2985 struct gpu_array_info
*array
, int n
,
2986 struct gpu_array_ref_group
**groups
)
2989 int recompute_overlap
= 0;
2990 isl_ctx
*ctx
= isl_space_get_ctx(array
->space
);
2992 for (i
= 0; i
< n
; ++i
) {
2993 if (!groups
[i
]->shared_tile
)
2995 for (j
= n
- 1; j
> i
; --j
) {
2998 struct gpu_array_ref_group
*group
;
3000 if (!groups
[j
]->shared_tile
)
3003 map
= isl_map_intersect(isl_map_copy(groups
[i
]->access
),
3004 isl_map_copy(groups
[j
]->access
));
3005 empty
= isl_map_is_empty(map
);
3011 group
= join_groups(groups
[i
], groups
[j
]);
3012 if (compute_group_bounds(gen
, group
) < 0) {
3013 free_array_ref_group(group
);
3016 if (!group
->shared_tile
||
3017 !smaller_tile(ctx
, group
->shared_tile
,
3018 groups
[i
]->shared_tile
,
3019 groups
[j
]->shared_tile
)) {
3020 free_array_ref_group(group
);
3024 if (group
->last_shared
< groups
[i
]->last_shared
||
3025 group
->last_shared
< groups
[j
]->last_shared
)
3026 recompute_overlap
= 1;
3027 free_array_ref_group(groups
[i
]);
3028 free_array_ref_group(groups
[j
]);
3031 groups
[j
] = groups
[n
- 1];
3036 if (recompute_overlap
)
3037 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
3041 /* Set array->n_group and array->groups to n and groups.
3043 * Additionally, set the "nr" field of each group
3044 * and the "group" field of each reference in each group.
3046 static void set_array_groups(struct gpu_array_info
*array
,
3047 int n
, struct gpu_array_ref_group
**groups
)
3052 array
->groups
= groups
;
3054 for (i
= 0; i
< n
; ++i
) {
3057 for (j
= 0; j
< groups
[i
]->n_ref
; ++j
)
3058 groups
[i
]->refs
[j
]->group
= i
;
3062 /* Group array references that should be considered together when
3063 * deciding whether to access them from private, shared or global memory.
3064 * Return -1 on error.
3066 * In particular, if two array references overlap and if one of them
3067 * is a write, then the two references are grouped together.
3068 * We first perform an initial grouping based only on the access relation.
3069 * After computing shared and private memory tiles, we check for
3070 * overlapping writes again, but this time taking into account
3071 * the "last_shared" property.
3073 * Furthermore, if two groups admit a shared memory tile and if the
3074 * combination of the two also admits a shared memory tile, we merge
3077 * If the array contains structures, then there is no need to compute
3078 * reference groups since we do not map such arrays to private or shared
3081 static int group_array_references(struct gpu_gen
*gen
,
3082 struct gpu_array_info
*array
, __isl_keep isl_union_map
*sched
)
3086 isl_ctx
*ctx
= isl_union_map_get_ctx(sched
);
3087 struct gpu_array_ref_group
**groups
;
3089 if (array
->has_compound_element
)
3092 groups
= isl_calloc_array(ctx
, struct gpu_array_ref_group
*,
3097 n
= populate_array_references(array
, sched
, groups
);
3099 n
= group_overlapping_writes(gen
, n
, groups
);
3101 for (i
= 0; i
< n
; ++i
)
3102 if (compute_group_bounds(gen
, groups
[i
]) < 0)
3105 n
= group_last_shared_overlapping_writes(gen
, n
, groups
);
3107 n
= group_common_shared_memory_tile(gen
, array
, n
, groups
);
3109 set_array_groups(array
, n
, groups
);
3114 for (i
= 0; i
< array
->n_ref
; ++i
)
3115 free_array_ref_group(groups
[i
]);
3119 /* Take tiled_sched, project it onto the shared tile loops and
3120 * the loops that will be wrapped over the threads and
3121 * store the result in gen->shared_sched.
3122 * Also compute a projection that projects out the loops that will be
3123 * wrapped over the threads and store this projection in gen->shared_proj.
3125 static void compute_shared_sched(struct gpu_gen
*gen
)
3130 isl_union_map
*sched
;
3132 sched
= isl_union_map_copy(gen
->tiled_sched
);
3134 dim
= isl_union_map_get_space(sched
);
3135 proj
= projection(dim
, gen
->tiled_len
, gen
->shared_len
+ gen
->n_block
);
3136 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3138 dim
= isl_union_map_get_space(sched
);
3139 proj
= projection(dim
, gen
->shared_len
+ gen
->n_block
, gen
->shared_len
);
3141 gen
->shared_sched
= sched
;
3142 gen
->shared_proj
= isl_union_map_from_map(proj
);
3145 /* For each scalar in the input program, check if there are any
3146 * order dependences active inside the current kernel, within
3147 * the same iteration of the host schedule.
3148 * If so, mark the scalar as force_private so that it will be
3149 * mapped to a register.
3151 static void check_scalar_live_ranges(struct gpu_gen
*gen
)
3155 isl_union_map
*sched
;
3156 isl_union_set
*domain
;
3157 isl_union_map
*same_host_iteration
;
3159 gen
->any_force_private
= 0;
3161 if (!gen
->options
->live_range_reordering
)
3164 sched
= gen
->shared_sched
;
3165 sched
= isl_union_map_universe(isl_union_map_copy(sched
));
3166 domain
= isl_union_map_domain(sched
);
3168 sched
= isl_union_map_copy(gen
->sched
);
3169 proj
= projection(isl_union_map_get_space(sched
),
3170 gen
->untiled_len
, gen
->tile_first
);
3171 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
3172 same_host_iteration
= isl_union_map_apply_range(sched
,
3173 isl_union_map_reverse(isl_union_map_copy(sched
)));
3175 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3176 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3177 isl_union_map
*order
;
3179 array
->force_private
= 0;
3180 if (array
->n_index
!= 0)
3182 order
= isl_union_map_copy(array
->dep_order
);
3183 order
= isl_union_map_intersect_domain(order
,
3184 isl_union_set_copy(domain
));
3185 order
= isl_union_map_intersect_range(order
,
3186 isl_union_set_copy(domain
));
3187 order
= isl_union_map_intersect(order
,
3188 isl_union_map_copy(same_host_iteration
));
3189 if (!isl_union_map_is_empty(order
)) {
3190 array
->force_private
= 1;
3191 gen
->any_force_private
= 1;
3193 isl_union_map_free(order
);
3196 isl_union_map_free(same_host_iteration
);
3197 isl_union_set_free(domain
);
3200 /* Group references of all arrays in the program.
3202 static int group_references(struct gpu_gen
*gen
)
3206 isl_union_map
*sched
;
3208 sched
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
3209 isl_union_map_copy(gen
->shared_proj
));
3211 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3212 r
= group_array_references(gen
, &gen
->prog
->array
[i
], sched
);
3217 isl_union_map_free(sched
);
3222 /* Free all array information that is local to the current kernel.
3224 static void free_local_array_info(struct gpu_gen
*gen
)
3228 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3229 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3231 for (j
= 0; j
< array
->n_group
; ++j
)
3232 free_array_ref_group(array
->groups
[j
]);
3233 free(array
->groups
);
3237 /* Compute the size of a bounding box around the origin and "set",
3238 * where "set" is assumed to contain only non-negative elements.
3239 * In particular, compute the maximal value of "set" in each direction
3242 static __isl_give isl_multi_pw_aff
*extract_size(__isl_take isl_set
*set
,
3243 __isl_keep isl_set
*context
)
3246 isl_multi_pw_aff
*mpa
;
3248 n
= isl_set_dim(set
, isl_dim_set
);
3249 mpa
= isl_multi_pw_aff_zero(isl_set_get_space(set
));
3250 for (i
= 0; i
< n
; ++i
) {
3255 bound
= isl_set_dim_max(isl_set_copy(set
), i
);
3256 bound
= isl_pw_aff_coalesce(bound
);
3257 bound
= isl_pw_aff_gist(bound
, isl_set_copy(context
));
3259 space
= isl_pw_aff_get_domain_space(bound
);
3260 one
= isl_aff_zero_on_domain(isl_local_space_from_space(space
));
3261 one
= isl_aff_add_constant_si(one
, 1);
3262 bound
= isl_pw_aff_add(bound
, isl_pw_aff_from_aff(one
));
3263 mpa
= isl_multi_pw_aff_set_pw_aff(mpa
, i
, bound
);
3270 /* Compute the effective grid size as a list of the sizes in each dimension.
3272 * The grid size specified by the user or set by default
3273 * in read_grid_sizes() and applied in tile_schedule(),
3274 * may be too large for the given code in the sense that
3275 * it may contain blocks that don't need to execute anything.
3276 * We therefore don't return this grid size, but instead the
3277 * smallest grid size that ensures that all blocks that actually
3278 * execute code are included in the grid.
3280 * We first extract a description of the grid, i.e., the possible values
3281 * of the block ids, from gen->tiled_sched.
3282 * The block ids are parameters in gen->tiled_sched.
3283 * We simply need to change them into set dimensions.
3285 * Then, for each block dimension, we compute the maximal value of the block id
3288 static __isl_give isl_multi_pw_aff
*extract_grid_size(struct gpu_gen
*gen
,
3289 struct ppcg_kernel
*kernel
)
3294 grid
= isl_union_map_params(isl_union_map_copy(gen
->tiled_sched
));
3295 grid
= isl_set_from_params(grid
);
3296 grid
= isl_set_add_dims(grid
, isl_dim_set
, gen
->n_grid
);
3297 for (i
= 0; i
< gen
->n_grid
; ++i
) {
3301 snprintf(name
, sizeof(name
), "b%d", i
);
3302 pos
= isl_set_find_dim_by_name(grid
, isl_dim_param
, name
);
3304 grid
= isl_set_equate(grid
, isl_dim_param
, pos
, isl_dim_set
, i
);
3305 grid
= isl_set_project_out(grid
, isl_dim_param
, pos
, 1);
3308 return extract_size(grid
, kernel
->context
);
3311 /* Compute the size of a fixed bounding box around the origin and "set",
3312 * where "set" is assumed to contain only non-negative elements,
3313 * and store the results in "size".
3314 * In particular, compute the maximal value of "set" in each direction
3317 static void extract_fixed_size(__isl_take isl_set
*set
, int *size
)
3320 isl_local_space
*ls
;
3323 n
= isl_set_dim(set
, isl_dim_set
);
3324 ls
= isl_local_space_from_space(isl_set_get_space(set
));
3325 obj
= isl_aff_zero_on_domain(ls
);
3326 for (i
= 0; i
< n
; ++i
) {
3329 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 1);
3330 max
= isl_set_max_val(set
, obj
);
3331 size
[i
] = isl_val_get_num_si(max
) + 1;
3333 obj
= isl_aff_set_coefficient_si(obj
, isl_dim_in
, i
, 0);
3339 /* Compute the effective block size as a list of the sizes in each dimension
3340 * and store the sizes in kernel->block_dim.
3342 * The block size specified by the user or set by default
3343 * in read_block_sizes() and applied in thread_tile_schedule(),
3344 * may be too large for the given code in the sense that
3345 * it may contain threads that don't need to execute anything.
3346 * We therefore don't store this block size in kernel->block_dim,
3347 * but instead the smallest block size that ensures that all threads
3348 * that actually execute code are included in the block.
3350 * The current implementation eliminates all parameters, ensuring
3351 * that the size is a fixed constant in each dimension.
3352 * In principle we could also compute parametric sizes.
3353 * We would have to make sure to project out all b%d and t%d parameters,
3356 static void extract_block_size(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3361 isl_multi_pw_aff
*mpa
;
3363 block
= isl_union_map_params(isl_union_map_copy(gen
->local_sched
));
3364 block
= isl_set_from_params(block
);
3365 block
= isl_set_add_dims(block
, isl_dim_set
, gen
->n_block
);
3366 kernel
->n_block
= gen
->n_block
;
3367 for (i
= 0; i
< gen
->n_block
; ++i
) {
3371 snprintf(name
, sizeof(name
), "t%d", i
);
3372 pos
= isl_set_find_dim_by_name(block
, isl_dim_param
, name
);
3374 block
= isl_set_equate(block
, isl_dim_param
, pos
,
3377 nparam
= isl_set_dim(block
, isl_dim_param
);
3378 block
= isl_set_project_out(block
, isl_dim_param
, 0, nparam
);
3380 extract_fixed_size(block
, kernel
->block_dim
);
3383 void ppcg_kernel_free(void *user
)
3385 struct ppcg_kernel
*kernel
= user
;
3391 isl_multi_pw_aff_free(kernel
->grid_size
);
3392 isl_set_free(kernel
->context
);
3393 isl_union_set_free(kernel
->arrays
);
3394 isl_space_free(kernel
->space
);
3395 isl_ast_node_free(kernel
->tree
);
3397 for (i
= 0; i
< kernel
->n_array
; ++i
)
3398 isl_pw_aff_list_free(kernel
->array
[i
].bound
);
3399 free(kernel
->array
);
3401 for (i
= 0; i
< kernel
->n_var
; ++i
) {
3402 free(kernel
->var
[i
].name
);
3403 isl_vec_free(kernel
->var
[i
].size
);
3410 static void create_kernel_var(isl_ctx
*ctx
, struct gpu_array_ref_group
*group
,
3411 struct ppcg_kernel_var
*var
)
3414 struct gpu_array_tile
*tile
;
3418 var
->array
= group
->array
;
3420 tile
= group
->private_tile
;
3421 var
->type
= ppcg_access_private
;
3423 tile
= group
->shared_tile
;
3424 var
->type
= ppcg_access_shared
;
3427 p
= isl_printer_to_str(ctx
);
3428 p
= print_array_name(p
, group
);
3429 var
->name
= isl_printer_get_str(p
);
3430 isl_printer_free(p
);
3432 var
->size
= isl_vec_alloc(ctx
, group
->array
->n_index
);
3434 for (j
= 0; j
< group
->array
->n_index
; ++j
)
3435 var
->size
= isl_vec_set_element_val(var
->size
, j
,
3436 isl_val_copy(tile
->bound
[j
].size
));
3439 static void create_kernel_vars(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
)
3444 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3445 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3447 for (j
= 0; j
< array
->n_group
; ++j
) {
3448 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3449 if (group
->private_tile
|| group
->shared_tile
)
3455 kernel
->var
= isl_calloc_array(gen
->ctx
, struct ppcg_kernel_var
, n
);
3456 assert(kernel
->var
);
3459 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3460 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3462 for (j
= 0; j
< array
->n_group
; ++j
) {
3463 struct gpu_array_ref_group
*group
= array
->groups
[j
];
3464 if (!group
->private_tile
&& !group
->shared_tile
)
3466 create_kernel_var(gen
->ctx
, group
, &kernel
->var
[n
]);
3472 /* The sizes of the arrays on the host that have been computed by
3473 * extract_array_info may depend on the parameters. Use the extra
3474 * constraints on the parameters that are valid at "host_domain"
3475 * to simplify these expressions and store the results in kernel->array.
3477 * We only need these localized bounds for arrays that are accessed
3478 * by the current kernel. If we have found at least one reference group
3479 * then the array is accessed by the kernel. If the array has compound
3480 * elements then we skipped the construction of array reference groups.
3482 static void localize_bounds(struct gpu_gen
*gen
, struct ppcg_kernel
*kernel
,
3483 __isl_keep isl_set
*host_domain
)
3488 kernel
->array
= isl_calloc_array(gen
->ctx
,
3489 struct gpu_local_array_info
, gen
->prog
->n_array
);
3490 assert(kernel
->array
);
3491 kernel
->n_array
= gen
->prog
->n_array
;
3493 context
= isl_set_copy(host_domain
);
3494 context
= isl_set_params(context
);
3496 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
3497 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
3498 isl_pw_aff_list
*local
;
3500 if (array
->n_group
== 0 && !array
->has_compound_element
)
3503 local
= isl_pw_aff_list_alloc(gen
->ctx
, array
->n_index
);
3505 for (j
= 0; j
< array
->n_index
; ++j
) {
3508 pwaff
= isl_pw_aff_copy(array
->bound
[j
]);
3509 pwaff
= isl_pw_aff_gist(pwaff
, isl_set_copy(context
));
3510 local
= isl_pw_aff_list_add(local
, pwaff
);
3513 kernel
->array
[i
].n_index
= array
->n_index
;
3514 kernel
->array
[i
].bound
= local
;
3516 isl_set_free(context
);
3519 /* Find the element in gen->stmt that has the given "id".
3520 * Return NULL if no such gpu_stmt can be found.
3522 static struct gpu_stmt
*find_stmt(struct gpu_prog
*prog
, __isl_keep isl_id
*id
)
3526 for (i
= 0; i
< prog
->n_stmts
; ++i
) {
3527 if (id
== prog
->stmts
[i
].id
)
3531 return i
< prog
->n_stmts
? &prog
->stmts
[i
] : NULL
;
3534 /* Set gen->tile_len and gen->n_parallel to those of the statement
3535 * affected by the first map (part of the schedule)
3536 * on which this function is called.
3537 * Because of the way the schedule is constructed, the other statements
3538 * in the list, if any, should have the same values for these properties.
3540 static int extract_tile_len(__isl_take isl_map
*map
, void *user
)
3542 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
3544 struct gpu_stmt
*stmt
;
3546 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
3547 stmt
= find_stmt(gen
->prog
, id
);
3553 isl_die(gen
->ctx
, isl_error_unknown
,
3554 "statement not found", return -1);
3556 gen
->tile_len
= stmt
->tile_len
;
3557 gen
->n_parallel
= stmt
->n_parallel
;
3562 void ppcg_kernel_stmt_free(void *user
)
3565 struct ppcg_kernel_stmt
*stmt
= user
;
3570 switch (stmt
->type
) {
3571 case ppcg_kernel_copy
:
3572 isl_ast_expr_free(stmt
->u
.c
.index
);
3573 isl_ast_expr_free(stmt
->u
.c
.local_index
);
3575 case ppcg_kernel_domain
:
3576 isl_id_to_ast_expr_free(stmt
->u
.d
.ref2expr
);
3578 case ppcg_kernel_sync
:
3585 /* Set the options of "context" to
3587 * { space -> [x] : x >= first }
3589 static __isl_give isl_ast_build
*set_unroll(
3590 __isl_take isl_ast_build
*build
, __isl_take isl_space
*space
,
3597 ctx
= isl_ast_build_get_ctx(build
);
3599 space
= isl_space_from_domain(space
);
3600 space
= isl_space_add_dims(space
, isl_dim_out
, 1);
3601 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "unroll");
3602 unroll
= isl_map_universe(space
);
3603 unroll
= isl_map_lower_bound_si(unroll
, isl_dim_out
, 0, first
);
3604 opt
= isl_union_map_from_map(unroll
);
3606 build
= isl_ast_build_set_options(build
, opt
);
3611 /* Return a list of isl_ids of the form "prefix%d".
3613 static __isl_give isl_id_list
*generate_names(isl_ctx
*ctx
,
3614 int n
, const char *prefix
)
3620 names
= isl_id_list_alloc(ctx
, n
);
3621 for (i
= 0; i
< n
; ++i
) {
3624 snprintf(name
, sizeof(name
), "%s%d", prefix
, i
);
3625 id
= isl_id_alloc(ctx
, name
, NULL
);
3626 names
= isl_id_list_add(names
, id
);
3632 /* Extend the schedule "schedule" with the part of "extension"
3633 * starting at "first" up to "len".
3635 static __isl_give isl_union_map
*extend_schedule(
3636 __isl_take isl_union_map
*schedule
,
3637 __isl_take isl_union_map
*extension
, int first
, int len
)
3641 isl_union_map
*umap
;
3644 space
= isl_union_map_get_space(schedule
);
3645 space
= isl_space_set_from_params(space
);
3646 space
= isl_space_add_dims(space
, isl_dim_set
, len
);
3647 proj
= isl_set_identity(isl_set_universe(space
));
3648 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, first
);
3649 extension
= isl_union_map_apply_range(extension
,
3650 isl_union_map_from_map(proj
));
3652 schedule
= isl_union_map_range_product(schedule
, extension
);
3657 /* Return the gpu_stmt_access in the list "accesses" that corresponds
3660 static struct gpu_stmt_access
*find_access(struct gpu_stmt_access
*accesses
,
3661 __isl_keep isl_id
*ref_id
)
3663 struct gpu_stmt_access
*access
;
3665 for (access
= accesses
; access
; access
= access
->next
)
3666 if (access
->ref_id
== ref_id
)
3672 /* Return the index of the array called "name" in the list of arrays.
3674 static int find_array_index(struct gpu_gen
*gen
, const char *name
)
3678 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
3679 if (!strcmp(name
, gen
->prog
->array
[i
].name
))
3685 /* Internal data structure for the index and AST expression transformation
3686 * callbacks for pet_stmt_build_ast_exprs.
3688 * "accesses" is the list of gpu_stmt_access in the statement.
3689 * "iterator_map" expresses the statement iterators in terms of
3690 * the AST loop iterators.
3691 * "sched2shared" expresses the first shared_len dimensions of
3692 * the computed schedule in terms of the AST loop iterators.
3694 * The following fields are set in transform_index and used in transform_expr.
3695 * "array" is the array that is being accessed.
3696 * "global" is set if the global array is accessed (rather than
3697 * shared/private memory).
3698 * "local_array" refers to information on the array specialized
3699 * to the current kernel.
3701 struct ppcg_transform_data
{
3702 struct gpu_gen
*gen
;
3703 struct gpu_stmt_access
*accesses
;
3704 isl_pw_multi_aff
*iterator_map
;
3705 isl_pw_multi_aff
*sched2shared
;
3707 struct gpu_array_info
*array
;
3709 struct gpu_local_array_info
*local_array
;
3712 /* Return the name of the outer array (of structs) accessed by "access".
3714 static const char *get_outer_array_name(__isl_keep isl_map
*access
)
3719 space
= isl_space_range(isl_map_get_space(access
));
3720 while (space
&& isl_space_is_wrapping(space
))
3721 space
= isl_space_domain(isl_space_unwrap(space
));
3722 name
= isl_space_get_tuple_name(space
, isl_dim_set
);
3723 isl_space_free(space
);
3728 /* Index transformation callback for pet_stmt_build_ast_exprs.
3730 * "index" expresses the array indices in terms of statement iterators
3732 * We first reformulate "index" in terms of the AST loop iterators.
3733 * Then we check if we are accessing the global array or
3734 * a shared/private copy. In the former case, we simply return
3735 * the updated index. If "index" is an affine expression rather
3736 * than an array access, then we also return the updated index here.
3738 * If no reference groups have been computed for the array,
3739 * then we can only be accessing the global array.
3741 * Otherwise, we apply the tiling to the index.
3742 * This tiling is of the form
3746 * The index is of the form
3750 * We update the tiling to refer to the AST loop iterators
3754 * and modify index to keep track of those iterators
3758 * Combining these two yields a tiled index expression in terms
3759 * of the AST loop iterators
3763 static __isl_give isl_multi_pw_aff
*transform_index(
3764 __isl_take isl_multi_pw_aff
*index
, __isl_keep isl_id
*ref_id
,
3767 struct ppcg_transform_data
*data
= user
;
3768 struct gpu_stmt_access
*access
;
3769 struct gpu_array_ref_group
*group
;
3770 struct gpu_array_tile
*tile
;
3771 isl_pw_multi_aff
*iterator_map
;
3775 isl_multi_pw_aff
*tiling
;
3776 isl_pw_multi_aff
*pma
;
3777 isl_multi_pw_aff
*mpa
;
3781 iterator_map
= isl_pw_multi_aff_copy(data
->iterator_map
);
3782 index
= isl_multi_pw_aff_pullback_pw_multi_aff(index
, iterator_map
);
3784 access
= find_access(data
->accesses
, ref_id
);
3787 if (!isl_map_has_tuple_name(access
->access
, isl_dim_out
))
3790 name
= get_outer_array_name(access
->access
);
3791 i
= find_array_index(data
->gen
, name
);
3793 isl_die(isl_multi_pw_aff_get_ctx(index
), isl_error_internal
,
3794 "cannot find array",
3795 return isl_multi_pw_aff_free(index
));
3796 data
->array
= &data
->gen
->prog
->array
[i
];
3797 data
->local_array
= &data
->gen
->kernel
->array
[i
];
3799 if (access
->group
< 0) {
3804 group
= data
->array
->groups
[access
->group
];
3805 tile
= group
->private_tile
;
3807 tile
= group
->shared_tile
;
3808 data
->global
= !tile
;
3812 space
= isl_space_range(isl_multi_pw_aff_get_space(index
));
3813 space
= isl_space_map_from_set(space
);
3814 pma
= isl_pw_multi_aff_identity(space
);
3815 pma
= isl_pw_multi_aff_product(
3816 isl_pw_multi_aff_copy(data
->sched2shared
), pma
);
3817 tiling
= isl_multi_pw_aff_from_multi_aff(
3818 isl_multi_aff_copy(tile
->tiling
));
3819 tiling
= isl_multi_pw_aff_pullback_pw_multi_aff(tiling
, pma
);
3821 space
= isl_space_domain(isl_multi_pw_aff_get_space(index
));
3822 space
= isl_space_map_from_set(space
);
3823 mpa
= isl_multi_pw_aff_identity(space
);
3824 index
= isl_multi_pw_aff_range_product(mpa
, index
);
3825 index
= isl_multi_pw_aff_pullback_multi_pw_aff(tiling
, index
);
3830 /* Dereference "expr" by adding an index [0].
3831 * The original "expr" is assumed not to have any indices.
3833 * If "expr" is a member access, then the dereferencing needs
3834 * to be applied to the structure argument of this member access.
3836 static __isl_give isl_ast_expr
*dereference(__isl_take isl_ast_expr
*expr
)
3840 isl_ast_expr_list
*list
;
3842 if (isl_ast_expr_get_op_type(expr
) == isl_ast_op_member
) {
3845 arg
= isl_ast_expr_get_op_arg(expr
, 0);
3846 arg
= dereference(arg
);
3847 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg
);
3852 ctx
= isl_ast_expr_get_ctx(expr
);
3853 res
= isl_ast_expr_from_val(isl_val_zero(ctx
));
3854 list
= isl_ast_expr_list_from_ast_expr(res
);
3855 res
= isl_ast_expr_get_op_arg(expr
, 0);
3856 res
= isl_ast_expr_access(res
, list
);
3857 isl_ast_expr_free(expr
);
3862 /* Linearize the index expression "expr" based on the array bounds
3865 * That is, transform expression
3867 * A[i_0][i_1]...[i_n]
3871 * A[(..((i_0 * b_1 + i_1) ... ) * b_n + i_n]
3873 * where b_0, b_1, ..., b_n are the bounds on the array.
3875 * If the base of "expr" is a member access, then the linearization needs
3876 * to be applied to the structure argument of this member access.
3878 * In the base case, if "expr" has no arguments (other than the name of
3879 * the array), then we are passing an entire array to a function.
3880 * In this case, there is nothing to linearize.
3881 * Note that at this point an expression with no arguments can
3882 * only be an entire array because the scalar case and
3883 * the case of single struct are handled by the caller.
3885 * If the number of specified index expressions in "expr"
3886 * is smaller than the dimension of the accessed array,
3887 * then the missing i_j also do not appear in the linearized expression.
3888 * Furthermore, since such an expression does not refer to a single
3889 * element while the default linearized expression would refer to
3890 * a single element, we return the expression
3892 * A + (..((i_0 * b_1 + i_1) ... ) * b_n]
3894 * instead. Note that because of the special case handling above,
3895 * we can assume here that here that there is at least one index expression.
3897 __isl_give isl_ast_expr
*gpu_local_array_info_linearize_index(
3898 struct gpu_local_array_info
*array
, __isl_take isl_ast_expr
*expr
)
3905 isl_ast_expr_list
*list
;
3906 isl_ast_build
*build
;
3908 arg0
= isl_ast_expr_get_op_arg(expr
, 0);
3909 if (isl_ast_expr_get_type(arg0
) == isl_ast_expr_op
&&
3910 isl_ast_expr_get_op_type(arg0
) == isl_ast_op_member
) {
3913 arg
= isl_ast_expr_get_op_arg(arg0
, 0);
3914 arg
= gpu_local_array_info_linearize_index(array
, arg
);
3915 arg0
= isl_ast_expr_set_op_arg(arg0
, 0, arg
);
3916 expr
= isl_ast_expr_set_op_arg(expr
, 0, arg0
);
3920 isl_ast_expr_free(arg0
);
3922 if (isl_ast_expr_get_op_n_arg(expr
) == 1)
3925 ctx
= isl_ast_expr_get_ctx(expr
);
3926 context
= isl_set_universe(isl_space_params_alloc(ctx
, 0));
3927 build
= isl_ast_build_from_context(context
);
3929 n
= isl_ast_expr_get_op_n_arg(expr
);
3930 res
= isl_ast_expr_get_op_arg(expr
, 1);
3931 for (i
= 1; i
< array
->n_index
; ++i
) {
3932 isl_pw_aff
*bound_i
;
3933 isl_ast_expr
*expr_i
;
3935 bound_i
= isl_pw_aff_list_get_pw_aff(array
->bound
, i
);
3936 expr_i
= isl_ast_build_expr_from_pw_aff(build
, bound_i
);
3937 res
= isl_ast_expr_mul(res
, expr_i
);
3941 expr_i
= isl_ast_expr_get_op_arg(expr
, i
+ 1);
3942 res
= isl_ast_expr_add(res
, expr_i
);
3945 isl_ast_build_free(build
);
3947 if (1 + array
->n_index
> n
) {
3948 res
= isl_ast_expr_add(isl_ast_expr_get_op_arg(expr
, 0), res
);
3950 list
= isl_ast_expr_list_from_ast_expr(res
);
3951 res
= isl_ast_expr_get_op_arg(expr
, 0);
3952 res
= isl_ast_expr_access(res
, list
);
3955 isl_ast_expr_free(expr
);
3960 /* AST expression transformation callback for pet_stmt_build_ast_exprs.
3962 * If the AST expression refers to a global scalar that is not
3963 * a read-only scalar, then its address was passed to the kernel and
3964 * we need to dereference it.
3966 * If the AST expression refers to an access to a global array,
3967 * then we linearize the access exploiting the bounds in data->local_array.
3969 static __isl_give isl_ast_expr
*transform_expr(__isl_take isl_ast_expr
*expr
,
3970 __isl_keep isl_id
*id
, void *user
)
3972 struct ppcg_transform_data
*data
= user
;
3976 if (gpu_array_is_read_only_scalar(data
->array
))
3980 if (data
->array
->n_index
== 0)
3981 return dereference(expr
);
3982 if (!data
->array
->linearize
)
3985 return gpu_local_array_info_linearize_index(data
->local_array
, expr
);
3988 /* This function is called for each instance of a user statement
3991 * We attach a struct ppcg_kernel_stmt to the "node", containing
3992 * a computed AST expression for each access.
3993 * These AST expressions are computed from iterator_map,
3994 * which expresses the domain
3995 * elements in terms of the generated loops, and sched2shared,
3996 * which expresses the first shared_len dimensions of the schedule
3997 * computed by PPCG in terms of the generated loops.
3999 static __isl_give isl_ast_node
*at_each_domain(__isl_take isl_ast_node
*node
,
4000 __isl_keep isl_ast_build
*build
, void *user
)
4002 struct ppcg_transform_data data
;
4003 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4004 struct ppcg_kernel_stmt
*stmt
;
4006 isl_pw_multi_aff
*sched2shared
;
4008 isl_pw_multi_aff
*iterator_map
;
4009 isl_ast_expr
*expr
, *arg
;
4010 isl_union_map
*schedule
;
4012 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4014 return isl_ast_node_free(node
);
4016 expr
= isl_ast_node_user_get_expr(node
);
4017 arg
= isl_ast_expr_get_op_arg(expr
, 0);
4018 id
= isl_ast_expr_get_id(arg
);
4020 schedule
= isl_ast_build_get_schedule(build
);
4021 map
= isl_map_reverse(isl_map_from_union_map(schedule
));
4022 iterator_map
= isl_pw_multi_aff_from_map(map
);
4023 sched2shared
= compute_sched_to_shared(gen
,
4024 isl_pw_multi_aff_copy(iterator_map
));
4026 stmt
->type
= ppcg_kernel_domain
;
4027 stmt
->u
.d
.stmt
= find_stmt(gen
->prog
, id
);
4028 if (!stmt
->u
.d
.stmt
)
4029 isl_die(gen
->ctx
, isl_error_internal
,
4030 "statement not found", goto error
);
4033 data
.accesses
= stmt
->u
.d
.stmt
->accesses
;
4034 data
.iterator_map
= iterator_map
;
4035 data
.sched2shared
= sched2shared
;
4036 stmt
->u
.d
.ref2expr
= pet_stmt_build_ast_exprs(stmt
->u
.d
.stmt
->stmt
,
4037 build
, &transform_index
, &data
,
4038 &transform_expr
, &data
);
4041 isl_pw_multi_aff_free(iterator_map
);
4042 isl_pw_multi_aff_free(sched2shared
);
4043 isl_ast_expr_free(arg
);
4044 isl_ast_expr_free(expr
);
4046 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4047 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4048 return isl_ast_node_set_annotation(node
, id
);
4051 isl_pw_multi_aff_free(iterator_map
);
4052 ppcg_kernel_stmt_free(stmt
);
4053 isl_pw_multi_aff_free(sched2shared
);
4054 return isl_ast_node_free(node
);
4057 /* This function is called when code has been generated for the shared
4058 * tile loops. The "schedule" refers only to the original statements.
4060 * We extend the schedule with that part of gen->local_sched that hasn't
4061 * been taken into account yet. This introduces parameters referring
4062 * to thread ids in the schedule, so we add them (with the appropriate
4063 * bounds to the context as well).
4064 * Finally, we set the appropriate unrolling options
4065 * if gen->first_unroll is set.
4067 static __isl_give isl_ast_node
*create_domain_leaf(
4068 __isl_take isl_union_map
*schedule
, __isl_take isl_ast_build
*build
,
4071 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4073 isl_union_map
*sched
;
4076 isl_id_list
*iterators
;
4079 schedule
= extend_schedule(schedule
,
4080 isl_union_map_copy(gen
->local_sched
),
4081 gen
->shared_len
, gen
->thread_tiled_len
);
4083 space
= isl_ast_build_get_schedule_space(build
);
4084 set
= isl_set_universe(space
);
4085 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
4086 gen
->kernel
->block_dim
, "t");
4087 build
= isl_ast_build_restrict(build
, set
);
4089 n
= gen
->thread_tiled_len
- gen
->shared_len
;
4091 if (gen
->first_unroll
>= 0) {
4092 space
= isl_space_set_alloc(gen
->ctx
, 0, n
);
4093 build
= set_unroll(build
, space
, gen
->first_unroll
);
4095 iterators
= generate_names(gen
->ctx
, n
, "c");
4096 build
= isl_ast_build_set_iterators(build
, iterators
);
4097 build
= isl_ast_build_set_at_each_domain(build
, &at_each_domain
, gen
);
4098 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
4099 isl_ast_build_free(build
);
4104 /* This function is called for each statement node in the AST of the code
4105 * for copying to or from shared/private memory.
4106 * Attach a pointer to a ppcg_kernel_stmt representing the copy
4107 * statement to the node.
4108 * The statement name is "read" or "write", depending on whether we are
4109 * reading from global memory or writing to global memory.
4110 * The name of the T space is {shared,private}_<array>.
4112 * The schedule is of the form
4116 * where A refers to a piece of an array and T to the corresponding
4117 * shifted tile. We split this schedule into mappings L -> A and L -> T
4118 * and store the corresponding expressions in stmt->index and stmt->local_index,
4119 * where stmt points to the ppcg_kernel_stmt that is attached to the node.
4121 static __isl_give isl_ast_node
*attach_copy_stmt(__isl_take isl_ast_node
*node
,
4122 __isl_keep isl_ast_build
*build
, void *user
)
4124 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4125 struct ppcg_kernel_stmt
*stmt
;
4129 isl_map
*access
, *local_access
, *map
;
4130 isl_pw_multi_aff
*pma
;
4134 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4136 return isl_ast_node_free(node
);
4138 access
= isl_map_from_union_map(isl_ast_build_get_schedule(build
));
4139 type
= isl_map_get_tuple_name(access
, isl_dim_in
);
4140 stmt
->u
.c
.read
= !strcmp(type
, "read");
4141 access
= isl_map_reverse(access
);
4142 space
= isl_space_unwrap(isl_space_range(isl_map_get_space(access
)));
4143 local_access
= isl_map_copy(access
);
4145 map
= isl_map_domain_map(isl_map_universe(isl_space_copy(space
)));
4146 id
= isl_map_get_tuple_id(access
, isl_dim_out
);
4147 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
4148 access
= isl_map_apply_range(access
, map
);
4149 pma
= isl_pw_multi_aff_from_map(access
);
4150 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
4151 stmt
->u
.c
.index
= expr
;
4153 map
= isl_map_range_map(isl_map_universe(space
));
4154 id
= isl_map_get_tuple_id(local_access
, isl_dim_out
);
4155 map
= isl_map_set_tuple_id(map
, isl_dim_in
, id
);
4156 local_access
= isl_map_apply_range(local_access
, map
);
4157 pma
= isl_pw_multi_aff_from_map(local_access
);
4158 expr
= isl_ast_build_access_from_pw_multi_aff(build
, pma
);
4159 stmt
->u
.c
.local_index
= expr
;
4161 stmt
->u
.c
.array
= gen
->copy_group
->array
;
4162 array_index
= stmt
->u
.c
.array
- gen
->prog
->array
;
4163 stmt
->u
.c
.local_array
= &gen
->kernel
->array
[array_index
];
4164 stmt
->type
= ppcg_kernel_copy
;
4166 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4167 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4168 return isl_ast_node_set_annotation(node
, id
);
4171 /* Given a schedule of the form
4175 * (with S the first shared_len dimensions of the computed schedule,
4176 * A the array and L the schedule correponding to the generated loops),
4177 * indicating where to copy the array elements that need to be copied,
4178 * construct code for performing the copying.
4180 * "group" is the array reference group that is being copied
4181 * "type" is either "read" or "write"
4182 * private is set if copying needs to be performed to/from registers
4184 * We first construct a mapping to a shifted tile of the array,
4186 * [S -> A] -> T(S,A) (1)
4188 * If private is set, then we also use this mapping as a schedule
4189 * (which is already thread-specific and will be completely unrolled).
4190 * Otherwise, we wrap/tile the range over the threads.
4193 * [S -> A] -> T'(S,A)
4195 * Combined with the given schedule, we have
4197 * [S -> A] -> [L -> T'(S,A)] (2)
4199 * From the shifted tile mapping, we construct a mapping
4201 * [S -> A] -> [A -> T(S,A)]
4203 * and apply it to the schedule (2), obtaining
4205 * [A -> T(S(L),A)] -> [L -> T'(S(L),A)]
4207 * Note that we can project out S because it is uniquely defined by L.
4209 static __isl_give isl_ast_node
*copy_access(struct gpu_gen
*gen
,
4210 __isl_take isl_map
*sched
,
4211 const char *type
, struct gpu_array_ref_group
*group
,
4212 __isl_take isl_ast_build
*build
, int private)
4216 isl_map
*schedule
, *shift
, *map
;
4218 isl_id_list
*iterators
;
4221 shift
= shift_access(group
);
4223 schedule
= isl_map_copy(shift
);
4224 schedule
= isl_map_reset_tuple_id(schedule
, isl_dim_out
);
4226 schedule
= tile_access_schedule(gen
, schedule
);
4228 n
= isl_map_dim(schedule
, isl_dim_out
);
4229 set
= isl_set_universe(isl_ast_build_get_schedule_space(build
));
4230 set
= add_bounded_parameters(set
, gen
->kernel
->n_block
,
4231 gen
->kernel
->block_dim
, "t");
4233 schedule
= isl_map_range_product(sched
, schedule
);
4235 space
= isl_space_domain(isl_map_get_space(shift
));
4236 map
= isl_map_range_map(isl_map_universe(isl_space_unwrap(space
)));
4237 map
= isl_map_range_product(map
, shift
);
4239 schedule
= isl_map_apply_domain(schedule
, map
);
4241 schedule
= isl_map_set_tuple_name(schedule
, isl_dim_in
, type
);
4243 build
= isl_ast_build_restrict(build
, set
);
4245 gen
->copy_group
= group
;
4248 space
= isl_space_range(isl_map_get_space(schedule
));
4249 space
= isl_space_range(isl_space_unwrap(space
));
4250 build
= set_unroll(build
, space
, 0);
4252 iterators
= generate_names(gen
->ctx
, n
, "c");
4253 build
= isl_ast_build_set_iterators(build
, iterators
);
4254 build
= isl_ast_build_set_at_each_domain(build
, &attach_copy_stmt
, gen
);
4255 tree
= isl_ast_build_ast_from_schedule(build
,
4256 isl_union_map_from_map(schedule
));
4257 isl_ast_build_free(build
);
4262 /* Return code for reading into or writing from shared memory
4263 * the given array reference group.
4265 * If we are performing a read from global memory to shared memory and
4266 * if the array involved is not a scalar, then we copy
4267 * the entire tile to shared memory. This may result in some extra
4268 * elements getting copied, but it should lead to simpler code
4269 * (which means that fewer registers may be needed) and less divergence.
4271 * Otherwise, we only copy the elements that will be read or have been written
4275 * The input "sched" is of the form.
4279 * with S the first shared_len dimensions of the computed schedule,
4280 * A the array and L the schedule correponding to the generated loops.
4282 * We first drop "type",
4286 * If the above conditions are satisfied, we project out A,
4291 * and then introduce the group tile [S -> T], resulting in
4295 static __isl_give isl_ast_node
*copy_group_shared_accesses(
4296 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4297 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4301 isl_union_map
*access
;
4303 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4304 read
= !strcmp(type
, "read");
4306 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4308 if (read
&& !gpu_array_is_scalar(group
->array
)) {
4312 space
= isl_space_domain(isl_map_get_space(sched
));
4313 space
= isl_space_unwrap(space
);
4314 map
= isl_map_domain_map(isl_map_universe(space
));
4315 sched
= isl_map_apply_domain(sched
, map
);
4317 map
= group_tile(group
);
4318 map
= isl_map_reverse(isl_map_domain_map(map
));
4319 sched
= isl_map_apply_domain(sched
, map
);
4322 return copy_access(gen
, sched
, type
, group
, build
, 0);
4325 /* Return code for reading into or writing from private memory
4326 * the given array reference group.
4328 * Let S be the first shared_len dimensions of the computed schedule,
4329 * D the iteration domains, A the array and L the schedule correponding
4330 * to the generated loops.
4331 * "sched" is of the form
4335 * where type is either "read" or "write".
4336 * We apply the privatization D -> S(t), with t the thread ids,
4337 * to the access relation D -> A to obtain the privatized access relation
4341 * We drop the type from "sched" and intersect with the privatized access
4342 * relation to obtain
4346 static __isl_give isl_ast_node
*copy_group_private_accesses(
4347 struct gpu_gen
*gen
, struct gpu_array_ref_group
*group
,
4348 __isl_take isl_map
*sched
, __isl_take isl_ast_build
*build
)
4352 isl_union_map
*priv
;
4353 isl_union_map
*access
;
4354 isl_map
*access_map
;
4356 type
= isl_map_get_tuple_name(sched
, isl_dim_in
);
4357 read
= !strcmp(type
, "read");
4359 priv
= isl_union_map_from_map(isl_map_copy(gen
->privatization
));
4360 priv
= isl_union_map_apply_range(isl_union_map_copy(gen
->shared_sched
),
4363 access
= group_access_relation(group
, read
, !read
);
4364 access
= isl_union_map_apply_domain(access
, priv
);
4365 access_map
= isl_map_from_union_map(access
);
4367 sched
= isl_map_reset_tuple_id(sched
, isl_dim_in
);
4368 sched
= isl_map_intersect_domain(sched
, isl_map_wrap(access_map
));
4370 return copy_access(gen
, sched
, type
, group
, build
, 1);
4373 /* Return code for reading into or writing from shared or private memory.
4375 * "schedule" is of the form
4379 * with S be the first shared_len dimensions of the computed schedule,
4380 * A the array and L the schedule correponding to the generated loops.
4381 * The array reference group is attached to "type".
4383 static __isl_give isl_ast_node
*create_access_leaf(
4384 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4385 __isl_take isl_ast_build
*build
)
4387 struct gpu_array_ref_group
*group
;
4390 id
= isl_map_get_tuple_id(schedule
, isl_dim_in
);
4391 group
= isl_id_get_user(id
);
4394 if (group
->private_tile
)
4395 return copy_group_private_accesses(gen
, group
, schedule
,
4398 return copy_group_shared_accesses(gen
, group
, schedule
,
4402 /* Create a domain node representing a synchronization.
4404 static __isl_give isl_ast_node
*create_sync_leaf(
4405 struct gpu_gen
*gen
, __isl_take isl_map
*schedule
,
4406 __isl_take isl_ast_build
*build
)
4408 struct ppcg_kernel_stmt
*stmt
;
4414 isl_map_free(schedule
);
4416 stmt
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel_stmt
);
4420 stmt
->type
= ppcg_kernel_sync
;
4422 space
= isl_ast_build_get_schedule_space(build
);
4423 space
= isl_space_from_domain(space
);
4424 space
= isl_space_set_tuple_name(space
, isl_dim_out
, "sync");
4425 expr
= isl_ast_build_call_from_pw_multi_aff(build
,
4426 isl_pw_multi_aff_from_multi_aff(isl_multi_aff_zero(space
)));
4427 node
= isl_ast_node_alloc_user(expr
);
4428 isl_ast_build_free(build
);
4430 id
= isl_id_alloc(gen
->ctx
, NULL
, stmt
);
4431 id
= isl_id_set_free_user(id
, &ppcg_kernel_stmt_free
);
4432 return isl_ast_node_set_annotation(node
, id
);
4435 /* This function is called during the code generation at the point
4436 * where the schedule domain element is completely determined by
4437 * the generated code. The input schedule contains the original
4438 * statements as well as synchronization and copy "statements".
4439 * The latter are scheduled at different points than any of the original
4440 * statements, so they will only arrive here in isolation.
4442 * If the current schedule only refers to a single statement,
4443 * we check if it is a copy or synchronization statement and
4444 * call the appropriate functions.
4445 * Otherwise, we assume we are dealing with the original statements
4446 * and we call create_domain_leaf.
4448 static __isl_give isl_ast_node
*create_kernel_leaf(
4449 __isl_take isl_ast_build
*build
, void *user
)
4451 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
4453 isl_union_map
*schedule
;
4456 schedule
= isl_ast_build_get_schedule(build
);
4458 if (isl_union_map_n_map(schedule
) != 1)
4459 return create_domain_leaf(schedule
, build
, user
);
4461 map
= isl_map_from_union_map(schedule
);
4462 name
= isl_map_get_tuple_name(map
, isl_dim_in
);
4463 if (!strcmp(name
, "read") || !strcmp(name
, "write"))
4464 return create_access_leaf(gen
, map
, build
);
4465 if (!strcmp(name
, "sync"))
4466 return create_sync_leaf(gen
, map
, build
);
4468 return create_domain_leaf(isl_union_map_from_map(map
), build
, user
);
4471 /* Mark all odd schedule dimensions as "atomic" (when the even dimensions
4472 * have value 0) and all even schedule dimensions as "unroll".
4474 * That is, the options look as follows
4476 * { [0, b, 0, d, ..., 0] -> atomic[i] : exists a : i = 2 a + 1;
4477 * [a, b, c, d, ..., z] -> unroll[i] : exists a : i = 2 a }
4479 * The even positions are used to be able to schedule copying blocks
4480 * and synchronization before or after each level of the shared memory
4481 * tile loops and we want to make sure that code for these is generated
4482 * separately (within each level).
4484 static __isl_give isl_ast_build
*set_atomic_and_unroll(
4485 __isl_take isl_ast_build
*build
,
4486 __isl_take isl_space
*space
, int sched_len
)
4492 isl_local_space
*ls
;
4495 ctx
= isl_ast_build_get_ctx(build
);
4497 space
= isl_space_params(space
);
4498 space
= isl_space_add_dims(space
, isl_dim_set
, sched_len
);
4499 space
= isl_space_from_domain(space
);
4500 space
= isl_space_add_dims(space
, isl_dim_out
, 2);
4501 map
= isl_map_universe(isl_space_copy(space
));
4502 for (i
= 0; i
< sched_len
; i
+= 2)
4503 map
= isl_map_fix_si(map
, isl_dim_in
, i
, 0);
4504 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4505 c
= isl_equality_alloc(ls
);
4506 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4507 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4508 c
= isl_constraint_set_constant_si(c
, 1);
4509 map
= isl_map_add_constraint(map
, c
);
4510 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4511 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "atomic");
4512 opt
= isl_union_map_from_map(map
);
4514 map
= isl_map_universe(space
);
4515 ls
= isl_local_space_from_space(isl_map_get_space(map
));
4516 c
= isl_equality_alloc(ls
);
4517 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 0, 1);
4518 c
= isl_constraint_set_coefficient_si(c
, isl_dim_out
, 1, 2);
4519 map
= isl_map_add_constraint(map
, c
);
4520 map
= isl_map_project_out(map
, isl_dim_out
, 1, 1);
4521 map
= isl_map_set_tuple_name(map
, isl_dim_out
, "unroll");
4522 opt
= isl_union_map_add_map(opt
, map
);
4524 build
= isl_ast_build_set_options(build
, opt
);
4529 /* Return a map that maps a space of dimension gen->shared_len
4530 * to its last dimensions starting at gen->tile_first.
4531 * The range is of dimension
4533 * 2 * (gen->shared_len - gen->tile_first) + 1
4535 * The input dimensions are mapped to the odd dimensions in the output,
4536 * while the even dimensions (except 2*pos) are fixed to 0.
4537 * Output dimension 2*pos (if pos >= 0) is fixed to "val".
4538 * If pos >= 0, then only the pos first dimensions starting at gen->tile_first
4539 * are mapped to the output. The remaining input dimensions are projected
4540 * out and the corresponding output dimensions are fixed to 0.
4542 static __isl_give isl_map
*insert_even(struct gpu_gen
*gen
,
4543 __isl_take isl_space
*space
, int pos
, int val
)
4548 space
= isl_space_set_from_params(space
);
4549 space
= isl_space_add_dims(space
, isl_dim_set
, gen
->shared_len
);
4550 space
= isl_space_map_from_set(space
);
4551 proj
= isl_map_identity(space
);
4552 proj
= isl_map_project_out(proj
, isl_dim_out
, 0, gen
->tile_first
);
4553 n
= gen
->shared_len
- gen
->tile_first
;
4554 for (i
= 0; i
<= n
; ++i
) {
4555 proj
= isl_map_insert_dims(proj
, isl_dim_out
, 2 * i
, 1);
4557 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, val
);
4559 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
, 0);
4565 proj
= isl_map_eliminate(proj
, isl_dim_in
, gen
->tile_first
+ pos
,
4566 gen
->shared_len
- (gen
->tile_first
+ pos
));
4567 for (i
= pos
; i
< n
; ++i
)
4568 proj
= isl_map_fix_si(proj
, isl_dim_out
, 2 * i
+ 1, 0);
4573 /* Given the AST context schedule "schedule" and the mapping from
4574 * domains to the shared tile loops "shared_sched", add a schedule
4575 * for a synchronization operation at position "val" of loop level "pos".
4577 * schedule is of the form
4581 * (with D the iteration domains and L the already generated loops),
4582 * while shared_sched is of the form
4586 * We combine them into
4592 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4594 * and use the result as a schedule for "sync".
4596 static __isl_give isl_union_map
*add_sync_schedule(struct gpu_gen
*gen
,
4597 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4598 __isl_keep isl_union_map
*shared_sched
, int pos
, int val
)
4601 isl_map
*proj
, *map
;
4603 shared_sched
= isl_union_map_copy(shared_sched
);
4604 schedule
= isl_union_map_copy(schedule
);
4606 space
= isl_union_map_get_space(shared_sched
);
4607 schedule
= isl_union_map_apply_domain(shared_sched
, schedule
);
4608 map
= isl_map_from_union_map(schedule
);
4610 proj
= insert_even(gen
, space
, pos
, val
);
4611 map
= isl_map_apply_range(map
, proj
);
4612 map
= isl_map_from_range(isl_map_wrap(map
));
4613 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "sync");
4615 res
= isl_union_map_add_map(res
, map
);
4620 /* Given a set of wrapped references "ref", return the corresponding
4621 * access relations based on the tagged access relations "tagged".
4623 * The elements of "ref" are of the form
4627 * with D an iteration domains and R a reference.
4628 * The elements of "tagged" are of the form
4634 * Extend "tagged" to include the iteration domain in the range, i.e.,
4636 * [D -> R] -> [D -> A]
4638 * apply the result to "ref" and then unwrap the resulting set
4639 * to obtain relations of the form
4643 static __isl_give isl_union_map
*wrapped_reference_to_access(
4644 __isl_take isl_union_set
*ref
, __isl_take isl_union_map
*tagged
)
4646 isl_union_map
*tag2access
;
4648 tag2access
= isl_union_map_copy(tagged
);
4649 tag2access
= isl_union_map_universe(tag2access
);
4650 tag2access
= isl_union_set_unwrap(isl_union_map_domain(tag2access
));
4651 tag2access
= isl_union_map_domain_map(tag2access
);
4652 tag2access
= isl_union_map_range_product(tag2access
, tagged
);
4654 ref
= isl_union_set_coalesce(ref
);
4655 ref
= isl_union_set_apply(ref
, tag2access
);
4657 return isl_union_set_unwrap(ref
);
4660 /* Given an access relation "access" from "group", remove those reads
4661 * if ("read" is 1) or writes (if "read" is 0) that are only needed to
4662 * communicate data within the same iteration of the last_shared dimension
4665 * If the access is a read then it is necessarily an element of
4667 * live_in union (range flow)
4669 * where live_in and flow may be overapproximations.
4670 * If the access is a write then it is necessarily an element of
4672 * live_out union (domain flow)
4674 * In both cases, the access relation is also a subset of
4675 * the group access relation.
4677 * Essentially, we compute the intersection of "access" with either
4679 * live_in union (range non-local-flow)
4683 * live_out union (domain non-local-flow)
4685 * We first construct a relation "local"
4687 * [[D -> R] -> [D' -> R']]
4689 * of pairs of domain iterations accessing the reference group
4690 * and references in the group that are scheduled to the same iteration
4691 * of the last_shared dimension.
4693 * If this relation does not intersect the dataflow dependences,
4694 * then there is nothing we can possibly remove and we simply
4697 * Otherwise, we remove the "local" dataflow dependences from
4698 * the set of all dataflow dependences.
4699 * Note that if the potential dataflow dependences are an overapproximation
4700 * of the actual dataflow dependences, then the result remains an
4701 * overapproximation of the non-local dataflow dependences.
4702 * Copying to/from global memory is only needed for the references
4703 * in the domain/range of the result or for accesses that are live out/in
4704 * for the entire scop.
4706 * We therefore map the domain/range of the "external" relation
4707 * to the corresponding access relation and take the union with
4708 * the live out/in relation.
4710 static __isl_give isl_union_map
*remove_local_accesses(struct gpu_gen
*gen
,
4711 struct gpu_array_ref_group
*group
, __isl_take isl_union_map
*access
,
4715 isl_union_map
*tagger
;
4716 isl_union_set
*domain
;
4718 isl_union_map
*sched
, *local
, *tagged
, *external
;
4719 isl_union_set
*tag_set
;
4722 if (isl_union_map_is_empty(access
))
4725 tagged
= group_tagged_access_relation(group
);
4727 sched
= isl_union_map_copy(gen
->sched
);
4729 space
= isl_union_map_get_space(sched
);
4730 proj
= projection(space
, gen
->untiled_len
, group
->last_shared
+ 1);
4731 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
4733 tagger
= isl_union_map_copy(gen
->prog
->scop
->tagger
);
4734 domain
= isl_union_map_domain(isl_union_map_copy(tagged
));
4735 tagger
= isl_union_map_intersect_range(tagger
, domain
);
4736 sched
= isl_union_map_apply_domain(sched
, tagger
);
4738 local
= isl_union_map_apply_range(sched
,
4739 isl_union_map_reverse(isl_union_map_copy(sched
)));
4740 local
= isl_union_map_intersect(local
,
4741 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
));
4743 empty
= isl_union_map_is_empty(local
);
4744 if (empty
< 0 || empty
) {
4745 isl_union_map_free(tagged
);
4746 isl_union_map_free(local
);
4748 return isl_union_map_free(access
);
4752 external
= isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
);
4753 external
= isl_union_map_intersect_params(external
,
4754 isl_set_copy(gen
->prog
->scop
->context
));
4755 external
= isl_union_map_subtract(external
, local
);
4758 tag_set
= isl_union_map_range(external
);
4759 external
= wrapped_reference_to_access(tag_set
, tagged
);
4760 external
= isl_union_map_union(external
,
4761 isl_union_map_copy(gen
->prog
->scop
->live_in
));
4763 tag_set
= isl_union_map_domain(external
);
4764 external
= wrapped_reference_to_access(tag_set
, tagged
);
4765 external
= isl_union_map_union(external
,
4766 isl_union_map_copy(gen
->prog
->scop
->live_out
));
4769 access
= isl_union_map_intersect(access
, external
);
4774 /* Given the AST context schedule "schedule" and the mapping from
4775 * domains to the shared tile loops "shared_sched", add a schedule
4776 * for copying an array reference group to/from shared/private memory.
4777 * "read" is set if data should be copied from global memory
4778 * to shared/private memory.
4779 * "k" represents the current group
4780 * "s" is the total number of groups
4782 * We schedule an operation before or after the innermost loop
4783 * of "shared_sched" that affects the tile of the array reference group.
4785 * schedule is of the form
4789 * (with D the iteration domains and L the already generated loops),
4790 * while shared_sched is of the form
4794 * We first compute the access relation for the reference group
4798 * and remove from this access relation those reads or writes
4799 * that only needed to communicate data within the same iteration
4800 * of the last_shared dimension of the group.
4801 * We then combine what is left with shared_sched into
4805 * If this results in an empty relation, no copying needs to be performed
4807 * Otherwise, we invert the relation and combine it with "schedule" into
4811 * The actual additional piece of the schedule is obtained from combining
4817 * [s_0,...] -> [0,s_{tile_first},0,..., val, 0, 0, ... 0]
4819 * The position of "val" corresponds to the innermost loop that affects
4820 * the tile and the value indicates where the copying is scheduled
4821 * with respect to the actual kernel code (at value 0).
4822 * Reads are schedule before the code, writes to global memory from
4823 * private memory are scheduled at values 1 to s, writes to global
4824 * memory from shared memory are scheduled at values s + 2 to 2 * s + 1.
4826 * If we are scheduling a read from global memory to shared memory,
4827 * we insert a synchronization before the kernel code (at the innermost
4829 * If we are scheduling a write to global memory, then we add
4830 * a synchronization after all writes (at value 2 *s + 2).
4831 * However, there is no need for a synchronization after the outermost loop.
4832 * A write to global memory from private memory at the innermost level
4833 * does not require a synchronization, because it is covered by
4834 * the synchronization after the kernel inserted by body_schedule.
4836 static __isl_give isl_union_map
*add_group_schedule(struct gpu_gen
*gen
,
4837 __isl_take isl_union_map
*res
, __isl_keep isl_union_map
*schedule
,
4838 __isl_keep isl_union_map
*shared_sched
,
4839 struct gpu_array_ref_group
*group
, int read
, int k
, int s
)
4844 isl_union_map
*access
;
4845 isl_map
*map
, *proj
, *access_map
;
4848 access
= group_access_relation(group
, read
, !read
);
4849 access
= remove_local_accesses(gen
, group
, access
, read
);
4850 access
= isl_union_map_range_product(isl_union_map_copy(shared_sched
),
4853 if (isl_union_map_is_empty(access
)) {
4854 isl_union_map_free(access
);
4858 access
= isl_union_map_reverse(access
);
4859 access
= isl_union_map_apply_range(access
,
4860 isl_union_map_copy(schedule
));
4861 access_map
= isl_map_from_union_map(access
);
4863 space
= isl_space_copy(group
->array
->space
);
4864 space
= isl_space_from_range(space
);
4865 space
= isl_space_add_dims(space
, isl_dim_in
, gen
->shared_len
);
4866 map
= isl_map_domain_map(isl_map_universe(space
));
4868 space
= isl_union_map_get_space(schedule
);
4869 pos
= group
->last_shared
+ 1 - gen
->tile_first
;
4873 else if (group
->private_tile
)
4876 val
= 1 + s
+ 1 + k
;
4877 proj
= insert_even(gen
, space
, pos
, val
);
4878 map
= isl_map_apply_range(map
, proj
);
4880 access_map
= isl_map_range_product(access_map
, map
);
4882 id
= isl_id_alloc(gen
->ctx
, read
? "read" : "write", group
);
4883 access_map
= isl_map_set_tuple_id(access_map
, isl_dim_in
, id
);
4885 res
= isl_union_map_add_map(res
, access_map
);
4887 n
= gen
->shared_len
- gen
->tile_first
;
4889 if (!group
->private_tile
)
4890 res
= add_sync_schedule(gen
, res
, schedule
,
4891 shared_sched
, n
, -1);
4895 if (pos
== n
&& group
->private_tile
)
4897 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4904 /* Return a schedule for the shared tile loops based on the current
4905 * AST context schedule.
4907 * We create a "shared_sched" that maps the domains to the first
4908 * shared_len dimensions of the computed schedule, project out the
4909 * first tile_first dimensions (as these are already covered by
4910 * the host code) and insert "statement-level" dimensions at even
4911 * positions so that we can schedule copy blocks and synchronization
4912 * before/after each level.
4914 * In particular, copy blocks are inserted inside the innermost
4915 * level that affect the tile. For the copying to global memory,
4916 * those from private memory are scheduled before those from shared
4917 * memory such that synchronization can be inserted between the two
4918 * at the innermost level.
4919 * Synchronization is inserted at the innermost level before the
4920 * actual kernel code if there is any copying from global memory
4921 * to shared memory. It is inserted unconditionally at the innermost
4922 * level after the actual kernel code and the copying to global memory
4923 * from private memory (if any). Finally, it is inserted after
4924 * any copying to global memory, except at the outermost level
4925 * and at the innermost level if there is no copying from shared
4926 * memory. The copying from private memory is covered by the unconditional
4927 * synchronization at the innermost level.
4929 static __isl_give isl_union_map
*body_schedule(struct gpu_gen
*gen
,
4930 __isl_take isl_union_map
*schedule
)
4934 isl_union_map
*shared_sched
;
4935 isl_union_map
*sched
;
4936 isl_map
*proj
, *map
;
4939 shared_sched
= isl_union_map_copy(gen
->tiled_sched
);
4940 proj
= projection(isl_union_map_get_space(shared_sched
),
4941 gen
->tiled_len
, gen
->shared_len
);
4942 shared_sched
= isl_union_map_apply_range(shared_sched
,
4943 isl_union_map_from_map(proj
));
4944 space
= isl_union_map_get_space(shared_sched
);
4945 proj
= insert_even(gen
, space
, -1, 0);
4946 sched
= isl_union_map_apply_range(isl_union_map_copy(shared_sched
),
4947 isl_union_map_from_map(proj
));
4949 res
= isl_union_map_range_product(isl_union_map_copy(schedule
), sched
);
4952 for (i
= 0; i
< gen
->prog
->n_array
; ++i
)
4953 s
+= gen
->prog
->array
[i
].n_group
;
4956 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
4957 struct gpu_array_info
*array
= &gen
->prog
->array
[i
];
4959 for (j
= 0; j
< array
->n_group
; ++j
) {
4960 struct gpu_array_ref_group
*group
;
4962 group
= array
->groups
[j
];
4963 if (!group
->private_tile
&& !group
->shared_tile
)
4965 res
= add_group_schedule(gen
, res
, schedule
,
4966 shared_sched
, group
, 0, k
, s
);
4967 res
= add_group_schedule(gen
, res
, schedule
,
4968 shared_sched
, group
, 1, k
, s
);
4973 res
= add_sync_schedule(gen
, res
, schedule
, shared_sched
,
4974 gen
->shared_len
- gen
->tile_first
, 1 + s
);
4976 isl_union_map_free(shared_sched
);
4977 isl_union_map_free(schedule
);
4982 /* Generate code for "kernel" in the given "context".
4984 * We first generate code for the shared tile loops (T1T, T1P and T2)
4985 * in a context that includes the block ids.
4986 * Within each iteration of these loops an additional code generation
4987 * is performed (within create_kernel_leaf) for the rest of the schedule
4988 * in a context that includes the thread ids.
4990 static __isl_give isl_ast_node
*generate_kernel(struct gpu_gen
*gen
,
4991 __isl_keep isl_ast_build
*build
, __isl_keep isl_set
*host_domain
,
4992 __isl_keep isl_multi_pw_aff
*grid_size
)
4996 isl_id_list
*iterators
;
4997 isl_union_map
*schedule
;
5001 schedule
= isl_ast_build_get_schedule(build
);
5003 build
= isl_ast_build_copy(build
);
5004 build
= isl_ast_build_restrict(build
, isl_set_copy(host_domain
));
5005 space
= isl_ast_build_get_schedule_space(build
);
5006 set
= isl_set_universe(isl_space_copy(space
));
5007 set
= add_bounded_parameters_dynamic(set
, grid_size
, "b");
5008 build
= isl_ast_build_restrict(build
, set
);
5010 schedule
= body_schedule(gen
, schedule
);
5012 sched_len
= 2 * (gen
->shared_len
- gen
->tile_first
) + 1;
5014 build
= set_atomic_and_unroll(build
, space
, sched_len
);
5015 iterators
= generate_names(gen
->ctx
, sched_len
, "g");
5016 build
= isl_ast_build_set_iterators(build
, iterators
);
5017 build
= isl_ast_build_set_create_leaf(build
, &create_kernel_leaf
, gen
);
5018 tree
= isl_ast_build_ast_from_schedule(build
, schedule
);
5019 isl_ast_build_free(build
);
5024 /* Attach "id" to the given node.
5026 static __isl_give isl_ast_node
*attach_id(__isl_take isl_ast_node
*node
,
5027 __isl_keep isl_ast_build
*build
, void *user
)
5031 node
= isl_ast_node_set_annotation(node
, id
);
5036 /* Construct an AST node for performing a kernel launch and attach
5037 * the information about the kernel to that node.
5039 * The kernel AST has been constructed in the context of the range
5040 * of "schedule". In particular, the grid size has been computed
5041 * in the context. We therefore still need to make sure that these
5042 * constraints are expressed in the code. We do this by creating a schedule
5044 * kernel[] -> [S -> []]
5046 * where S is the schedule domain, i.e., the range of "schedule".
5047 * The AST generation will then create a single call surrounded by
5048 * all the condition in "S" that have not been expressed yet.
5050 * The kernel information is attached to this node in attach_id.
5052 static __isl_give isl_ast_node
*construct_launch(
5053 __isl_take isl_ast_build
*build
, __isl_take isl_union_map
*schedule
,
5054 __isl_take
struct ppcg_kernel
*kernel
)
5058 isl_union_set
*domain
;
5063 ctx
= isl_ast_build_get_ctx(build
);
5065 id
= isl_id_alloc(ctx
, NULL
, kernel
);
5066 id
= isl_id_set_free_user(id
, &ppcg_kernel_free
);
5068 domain
= isl_union_map_range(schedule
);
5069 set
= isl_set_from_union_set(domain
);
5070 map
= isl_map_from_domain(set
);
5071 map
= isl_map_from_range(isl_map_wrap(map
));
5072 map
= isl_map_set_tuple_name(map
, isl_dim_in
, "kernel");
5073 schedule
= isl_union_map_from_map(map
);
5075 build
= isl_ast_build_set_at_each_domain(build
, &attach_id
, id
);
5076 node
= isl_ast_build_ast_from_schedule(build
, schedule
);
5077 isl_ast_build_free(build
);
5082 /* This function is called for each leaf in the AST of the host code.
5083 * We first specialize the schedule to the site of the leaf, compute
5084 * the size of shared memory and then construct the body of the host code
5085 * and the associated kernel.
5087 * The necessary information for printing the kernel launch is
5088 * stored in a struct ppcg_kernel and attached to the leaf node
5089 * created to represent the launch.
5091 static __isl_give isl_ast_node
*create_host_leaf(
5092 __isl_take isl_ast_build
*build
, void *user
)
5094 struct gpu_gen
*gen
= (struct gpu_gen
*) user
;
5097 struct ppcg_kernel
*kernel
;
5098 isl_set
*host_domain
;
5099 isl_union_map
*schedule
;
5100 isl_union_map
*local_sched
;
5101 isl_union_map
*access
;
5102 isl_union_set
*domain
;
5105 schedule
= isl_ast_build_get_schedule(build
);
5107 isl_union_map_foreach_map(schedule
, &extract_tile_len
, gen
);
5110 domain
= isl_union_map_domain(isl_union_map_copy(schedule
));
5112 local_sched
= isl_union_map_copy(gen
->sched
);
5113 local_sched
= isl_union_map_intersect_domain(local_sched
, domain
);
5114 access
= isl_union_map_union(isl_union_map_copy(gen
->prog
->read
),
5115 isl_union_map_copy(gen
->prog
->may_write
));
5116 access
= isl_union_map_apply_domain(access
,
5117 isl_union_map_copy(local_sched
));
5119 gen
->tiled_sched
= tile_schedule(gen
, local_sched
);
5120 gen
->tiled_sched
= parametrize_tiled_schedule(gen
, gen
->tiled_sched
);
5121 gen
->tiled_sched
= scale_tile_loops(gen
, gen
->tiled_sched
);
5123 gen
->local_sched
= isl_union_map_copy(gen
->tiled_sched
);
5124 gen
->local_sched
= thread_tile_schedule(gen
, gen
->local_sched
);
5125 gen
->local_sched
= scale_thread_tile_loops(gen
, gen
->local_sched
);
5127 kernel
= gen
->kernel
= isl_calloc_type(gen
->ctx
, struct ppcg_kernel
);
5131 kernel
->id
= gen
->kernel_id
++;
5132 kernel
->context
= isl_union_map_params(isl_union_map_copy(schedule
));
5133 kernel
->grid_size
= extract_grid_size(gen
, kernel
);
5134 extract_block_size(gen
, kernel
);
5135 kernel
->arrays
= isl_union_map_range(access
);
5136 kernel
->arrays
= isl_union_set_apply(kernel
->arrays
,
5137 isl_union_map_copy(gen
->prog
->to_outer
));
5138 kernel
->space
= isl_ast_build_get_schedule_space(build
);
5140 compute_shared_sched(gen
);
5141 gen
->privatization
= compute_privatization(gen
);
5142 check_scalar_live_ranges(gen
);
5143 if (group_references(gen
) < 0)
5144 schedule
= isl_union_map_free(schedule
);
5145 host_domain
= isl_set_from_union_set(isl_union_map_range(
5146 isl_union_map_copy(schedule
)));
5147 localize_bounds(gen
, kernel
, host_domain
);
5149 gen
->local_sched
= interchange_for_unroll(gen
, gen
->local_sched
);
5150 check_shared_memory_bound(gen
);
5151 compute_group_tilings(gen
);
5153 kernel
->tree
= generate_kernel(gen
, build
, host_domain
,
5155 create_kernel_vars(gen
, kernel
);
5157 free_local_array_info(gen
);
5158 isl_map_free(gen
->privatization
);
5159 isl_union_map_free(gen
->local_sched
);
5160 isl_union_map_free(gen
->tiled_sched
);
5161 isl_union_map_free(gen
->shared_sched
);
5162 isl_union_map_free(gen
->shared_proj
);
5163 isl_set_free(host_domain
);
5164 free(gen
->tile_size
);
5166 node
= construct_launch(build
, schedule
, kernel
);
5170 isl_union_map_free(schedule
);
5174 /* Use isl to generate code for the outer gen->tile_first loops
5175 * of the global schedule in gen->sched, resulting in the host code.
5176 * Within each iteration of this partial schedule, i.e., for each kernel
5177 * launch, create_host_leaf takes care of generating the kernel code.
5179 static __isl_give isl_ast_node
*generate_host_code(struct gpu_gen
*gen
)
5181 isl_ast_build
*build
;
5183 isl_union_map
*sched
;
5185 isl_id_list
*iterators
;
5187 sched
= isl_union_map_copy(gen
->sched
);
5188 proj
= projection(isl_union_map_get_space(sched
),
5189 gen
->untiled_len
, gen
->tile_first
);
5190 sched
= isl_union_map_apply_range(sched
, isl_union_map_from_map(proj
));
5192 isl_options_set_ast_build_group_coscheduled(gen
->ctx
, 1);
5193 build
= isl_ast_build_from_context(isl_set_copy(gen
->prog
->context
));
5194 iterators
= generate_names(gen
->ctx
, gen
->tile_first
, "h");
5195 build
= isl_ast_build_set_iterators(build
, iterators
);
5196 build
= isl_ast_build_set_create_leaf(build
, &create_host_leaf
, gen
);
5197 tree
= isl_ast_build_ast_from_schedule(build
, sched
);
5198 isl_ast_build_free(build
);
5203 __isl_give isl_union_map
*extract_sizes_from_str(isl_ctx
*ctx
, const char *str
)
5207 return isl_union_map_read_from_str(ctx
, str
);
5210 /* Information about the outermost tilable bands in the forest of bands.
5212 * tile_len and n_parallel are only sets on band_info structures
5213 * that correspond to outermost bands. For other bands (in particular,
5214 * ancestors of the outermost bands), n_parallal is set to 0.
5216 * prefix is the (padded) schedule leading up to the outermost tilable bands.
5218 * tile_first is the number of schedule dimensions in prefix.
5220 * suffix is the schedule of the outermost tilable bands and their descendants.
5223 struct gpu_gen
*gen
;
5227 isl_union_map
*prefix
;
5228 isl_union_map
*suffix
;
5231 /* Set tile_len and n_parallel of the statement to that of
5232 * their outermost band, recorded in the band_info.
5234 static int set_stmt_tile_len(__isl_take isl_map
*map
, void *user
)
5236 struct band_info
*info
= user
;
5237 struct gpu_stmt
*stmt
;
5240 id
= isl_map_get_tuple_id(map
, isl_dim_in
);
5241 stmt
= find_stmt(info
->gen
->prog
, id
);
5244 stmt
->tile_len
= info
->tile_len
;
5245 stmt
->n_parallel
= info
->n_parallel
;
5252 static void list_select_outer_band(struct gpu_gen
*gen
,
5253 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
);
5255 /* Check if this band has any parallel loops. If so, take it as
5256 * the outermost tilable band. If not, continue looking for the
5257 * outermost tilable band in the children of the current band.
5259 static void band_select_outer_band(struct gpu_gen
*gen
,
5260 __isl_take isl_band
*band
, int pos
, struct band_info
*info
)
5262 int n
= isl_band_n_member(band
);
5265 for (n_parallel
= 0; n_parallel
< n
; ++n_parallel
)
5266 if (!isl_band_member_is_coincident(band
, n_parallel
))
5269 info
->n_parallel
= n_parallel
;
5271 gen
->any_parallelism
= 1;
5273 info
->tile_first
= pos
;
5275 info
->prefix
= isl_band_get_prefix_schedule(band
);
5276 info
->suffix
= isl_union_map_flat_range_product(
5277 isl_band_get_partial_schedule(band
),
5278 isl_band_get_suffix_schedule(band
));
5279 isl_union_map_foreach_map(info
->prefix
,
5280 &set_stmt_tile_len
, info
);
5281 } else if (isl_band_has_children(band
)) {
5282 isl_band_list
*children
;
5283 children
= isl_band_get_children(band
);
5284 list_select_outer_band(gen
, children
, pos
+ n
, info
);
5287 info
->tile_first
= pos
+ n
;
5289 info
->prefix
= isl_union_map_flat_range_product(
5290 isl_band_get_prefix_schedule(band
),
5291 isl_band_get_partial_schedule(band
));
5292 info
->suffix
= isl_band_get_suffix_schedule(band
);
5293 isl_union_map_foreach_map(info
->prefix
,
5294 &set_stmt_tile_len
, info
);
5297 isl_band_free(band
);
5300 /* Comparison function that returns a non-zero value for band_infos
5301 * with different tile_len fields or different n_parallel fields.
5303 static int cmp_band(const void *p1
, const void *p2
)
5305 const struct band_info
*info1
= p1
;
5306 const struct band_info
*info2
= p2
;
5308 if (info1
->tile_len
!= info2
->tile_len
)
5309 return info1
->tile_len
- info2
->tile_len
;
5311 return info1
->n_parallel
- info2
->n_parallel
;
5314 /* Extend "umap" with coordinates with fixed value "val"
5315 * to a total length of "dst_len", assuming the original dimension is "src_len".
5317 static __isl_give isl_union_map
*extend_range(
5318 __isl_take isl_union_map
*umap
, int src_len
, int dst_len
, int val
)
5324 dim
= isl_union_map_get_space(umap
);
5325 map
= isl_map_reverse(projection(dim
, dst_len
, src_len
));
5326 for (i
= src_len
; i
< dst_len
; ++i
)
5327 map
= isl_map_fix_si(map
, isl_dim_out
, i
, val
);
5329 umap
= isl_union_map_apply_range(umap
, isl_union_map_from_map(map
));
5334 /* Group bands with the same values for tile_len and n_parallel.
5335 * The prefix schedule is then extended with a fixed coordinate that
5336 * is different for each such group.
5337 * Note that the actual values for this coordinate are not important.
5338 * The bands have already been effectively separated at a higher level
5339 * or they are independent and may be executed in parallel.
5340 * The list of band_info has been sorted before this functions is called.
5342 static void separate_bands(struct band_info
*info
, int n
)
5347 for (i
= 0; i
< n
; ++i
) {
5348 int l
= info
[i
].tile_first
;
5351 (info
[i
].tile_len
!= info
[i
- 1].tile_len
||
5352 info
[i
].n_parallel
!= info
[i
- 1].n_parallel
))
5355 info
[i
].prefix
= extend_range(info
[i
].prefix
,
5357 info
[i
].tile_first
= l
+ 1;
5361 /* Select the outermost bands in the elements of the list, align
5362 * their prefix schedules, separate bands with different values
5363 * for tile_len and/or n_parallel and then combine the resulting
5364 * prefix and suffix schedules into a single pair of prefix and
5365 * suffix schedules for the entire list.
5367 static void list_select_outer_band(struct gpu_gen
*gen
,
5368 __isl_take isl_band_list
*list
, int pos
, struct band_info
*list_info
)
5372 int n
= isl_band_list_n_band(list
);
5373 isl_ctx
*ctx
= isl_band_list_get_ctx(list
);
5374 struct band_info
*info
;
5376 isl_union_map
*prefix
;
5377 isl_union_map
*suffix
;
5380 info
= isl_calloc_array(ctx
, struct band_info
, n
);
5384 for (i
= 0; i
< n
; ++i
) {
5385 band
= isl_band_list_get_band(list
, i
);
5386 band_select_outer_band(gen
, band
, pos
, &info
[i
]);
5387 if (info
[i
].tile_first
> max_tile_first
)
5388 max_tile_first
= info
[i
].tile_first
;
5391 for (i
= 0; i
< n
; ++i
) {
5392 if (info
[i
].tile_first
== max_tile_first
)
5394 info
[i
].prefix
= extend_range(info
[i
].prefix
,
5395 info
[i
].tile_first
, max_tile_first
, 0);
5396 info
[i
].tile_first
= max_tile_first
;
5399 qsort(info
, n
, sizeof(struct band_info
), &cmp_band
);
5401 for (i
= 0; i
< n
- 1; ++i
)
5402 if (info
[i
].tile_len
!= info
[i
+ 1].tile_len
||
5403 info
[i
].n_parallel
!= info
[i
+ 1].n_parallel
)
5407 separate_bands(info
, n
);
5409 prefix
= info
[0].prefix
;
5410 suffix
= info
[0].suffix
;
5412 for (i
= 1; i
< n
; ++i
) {
5413 prefix
= isl_union_map_union(prefix
, info
[i
].prefix
);
5414 suffix
= isl_union_map_union(suffix
, info
[i
].suffix
);
5417 list_info
->tile_first
= info
[0].tile_first
;
5418 list_info
->tile_len
= -1;
5419 list_info
->prefix
= prefix
;
5420 list_info
->suffix
= suffix
;
5422 isl_band_list_free(list
);
5426 /* Select the outermost tilable band that (by construction)
5427 * has at least one parallel loop.
5428 * The starting position of the aligned band is stored in the pair
5430 * The sizes and number of parallel loops may be different in different
5431 * parts of the band forest and are therefore stored in the gpu_stmts.
5433 * Return the complete schedule, with the tilable bands aligned
5434 * at gen->tile_first and padded with zero, if needed.
5436 static __isl_give isl_union_map
*select_outer_tilable_band(struct gpu_gen
*gen
,
5437 __isl_keep isl_schedule
*schedule
)
5439 isl_band_list
*list
;
5440 struct band_info info
;
5442 gen
->n_parallel
= 0;
5445 list
= isl_schedule_get_band_forest(schedule
);
5447 if (isl_band_list_n_band(list
) == 0) {
5448 isl_band_list_free(list
);
5449 return isl_schedule_get_map(schedule
);
5452 list_select_outer_band(gen
, list
, 0, &info
);
5454 gen
->tile_first
= info
.tile_first
;
5455 info
.suffix
= align_range(info
.suffix
);
5457 return isl_union_map_flat_range_product(info
.prefix
, info
.suffix
);
5460 /* Set gen->untiled_len to the number of scheduling dimensions
5461 * for the schedule of the first domain.
5462 * We assume here that this number is the same for all domains.
5464 static int set_untiled_len(__isl_take isl_map
*map
, void *user
)
5466 unsigned *untiled_len
= user
;
5468 *untiled_len
= isl_map_dim(map
, isl_dim_out
);
5474 /* Compute an appropriate schedule based on the accesses in
5475 * gen->read and gen->write.
5477 * We use the dependences in gen->prog->scop to compute
5478 * a schedule that has a parallel loop in each tilable band.
5479 * Finally, we select the outermost tilable band.
5481 * If live range reordering is allowed, then we need to make sure
5482 * that live ranges on arrays are not run in parallel since doing
5483 * so would require array expansion. We therefore add the array
5484 * order dependences to the coincidence dependences. Non-zero array
5485 * order dependences will then prevent a schedule dimension from being
5486 * considered parallel.
5487 * Live ranges derived from scalars are allowed to be run in parallel
5488 * since we force the scalars to be mapped to private memory in
5489 * check_scalar_live_ranges.
5490 * If live range reordering is allowed, then the false dependences
5491 * are not added to the validity constraints as that would prevent
5492 * reordering. Instead, the external false dependences that enforce that reads
5493 * from potentially live-in data precede any later write and
5494 * that writes of potentially live-out data follow any other earlier write
5495 * are added to the validity and the coincidence constraints.
5496 * The false dependences are still added to the proximity constraints
5497 * for consistency with the case where live range reordering is not allowed.
5498 * The coincidence constraints then consist of flow dependences,
5499 * exernal false dependences and array order dependences.
5500 * The independences can be filtered out from the first two sets.
5501 * They have already been filtered out from the array order dependences
5502 * on a per array basis in collect_order_dependences.
5503 * There is no need for a per array handling of the other two sets
5504 * as there should be no flow or external false dependence on local
5505 * variables that can be filtered out.
5507 static void compute_schedule(struct gpu_gen
*gen
)
5509 isl_union_set
*domain
;
5510 isl_union_map
*dep_raw
, *dep
;
5511 isl_union_map
*validity
, *proximity
, *coincidence
;
5512 isl_union_map
*sched
;
5513 isl_schedule_constraints
*sc
;
5514 isl_schedule
*schedule
;
5516 domain
= isl_union_set_copy(gen
->prog
->scop
->domain
);
5517 domain
= isl_union_set_intersect_params(domain
,
5518 isl_set_copy(gen
->prog
->scop
->context
));
5519 sc
= isl_schedule_constraints_on_domain(isl_union_set_copy(domain
));
5520 if (gen
->options
->live_range_reordering
) {
5521 sc
= isl_schedule_constraints_set_conditional_validity(sc
,
5522 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_flow
),
5523 isl_union_map_copy(gen
->prog
->scop
->tagged_dep_order
));
5524 proximity
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5525 validity
= isl_union_map_copy(proximity
);
5526 validity
= isl_union_map_union(validity
,
5527 isl_union_map_copy(gen
->prog
->scop
->dep_external
));
5528 proximity
= isl_union_map_union(proximity
,
5529 isl_union_map_copy(gen
->prog
->scop
->dep_false
));
5530 coincidence
= isl_union_map_copy(validity
);
5531 coincidence
= isl_union_map_subtract(coincidence
,
5532 isl_union_map_copy(gen
->prog
->scop
->independence
));
5533 coincidence
= isl_union_map_union(coincidence
,
5534 isl_union_map_copy(gen
->prog
->array_order
));
5536 dep_raw
= isl_union_map_copy(gen
->prog
->scop
->dep_flow
);
5537 dep
= isl_union_map_copy(gen
->prog
->scop
->dep_false
);
5538 dep
= isl_union_map_union(dep
, dep_raw
);
5539 dep
= isl_union_map_coalesce(dep
);
5540 proximity
= isl_union_map_copy(dep
);
5541 coincidence
= isl_union_map_copy(dep
);
5544 sc
= isl_schedule_constraints_set_validity(sc
, validity
);
5545 sc
= isl_schedule_constraints_set_coincidence(sc
, coincidence
);
5546 sc
= isl_schedule_constraints_set_proximity(sc
, proximity
);
5548 if (gen
->options
->debug
->dump_schedule_constraints
)
5549 isl_schedule_constraints_dump(sc
);
5550 schedule
= isl_schedule_constraints_compute_schedule(sc
);
5551 if (gen
->options
->debug
->dump_schedule
)
5552 isl_schedule_dump(schedule
);
5554 sched
= select_outer_tilable_band(gen
, schedule
);
5556 isl_union_map_foreach_map(sched
, &set_untiled_len
, &gen
->untiled_len
);
5557 sched
= isl_union_map_intersect_domain(sched
, domain
);
5560 isl_schedule_free(schedule
);
5563 /* Compute the sets of outer array elements that need to be copied in and out.
5565 * In particular, for each array that is possibly written anywhere in
5566 * gen->prog and that is visible outside the corresponding scop,
5567 * we copy out its entire extent.
5569 * Any array elements that is read without first being written needs
5570 * to be copied in. Furthermore, if there are any array elements that
5571 * are copied out, but that may not be written inside gen->prog, then
5572 * they also need to be copied in to ensure that the value after execution
5573 * is the same as the value before execution.
5574 * In case the array elements are structures, we need to take into
5575 * account that all members of the structures need to be written
5576 * by gen->prog before we can avoid copying the data structure in.
5578 * While computing the set of array elements that are copied out but
5579 * not necessarily written, we intersect both sets with the context.
5580 * This helps in those cases where the arrays are declared with a fixed size,
5581 * while the accesses are parametric and the context assigns a fixed value
5582 * to the parameters.
5584 * If an element from a local array is read without first being written,
5585 * then there is no point in copying it in since it cannot have been
5586 * written prior to the scop. Warn about the uninitialized read instead.
5588 static void compute_copy_in_and_out(struct gpu_gen
*gen
)
5591 isl_union_set
*local
;
5592 isl_union_set
*may_write
, *must_write
;
5593 isl_union_set
*copy_in
, *copy_out
;
5594 isl_union_set
*not_written
;
5595 isl_union_map
*uninitialized
;
5596 isl_union_map
*local_uninitialized
;
5598 must_write
= isl_union_map_range(
5599 isl_union_map_copy(gen
->prog
->must_write
));
5600 must_write
= isl_union_set_intersect_params(must_write
,
5601 isl_set_copy(gen
->prog
->context
));
5602 may_write
= isl_union_map_range(
5603 isl_union_map_copy(gen
->prog
->may_write
));
5604 may_write
= isl_union_set_intersect_params(may_write
,
5605 isl_set_copy(gen
->prog
->context
));
5606 may_write
= isl_union_set_universe(may_write
);
5607 may_write
= isl_union_set_apply(may_write
,
5608 isl_union_map_copy(gen
->prog
->to_outer
));
5609 copy_out
= isl_union_set_empty(isl_union_set_get_space(may_write
));
5610 local
= isl_union_set_copy(copy_out
);
5612 for (i
= 0; i
< gen
->prog
->n_array
; ++i
) {
5617 space
= isl_space_copy(gen
->prog
->array
[i
].space
);
5619 if (gen
->prog
->array
[i
].local
) {
5622 set
= isl_set_universe(space
);
5623 local
= isl_union_set_add_set(local
, set
);
5627 write_i
= isl_union_set_extract_set(may_write
, space
);
5628 empty
= isl_set_plain_is_empty(write_i
);
5629 isl_set_free(write_i
);
5633 write_i
= isl_set_copy(gen
->prog
->array
[i
].extent
);
5634 copy_out
= isl_union_set_add_set(copy_out
, write_i
);
5636 isl_union_set_free(may_write
);
5638 copy_out
= isl_union_set_intersect_params(copy_out
,
5639 isl_set_copy(gen
->prog
->context
));
5641 gen
->prog
->copy_out
= isl_union_set_copy(copy_out
);
5643 copy_out
= isl_union_set_apply(copy_out
,
5644 isl_union_map_copy(gen
->prog
->to_inner
));
5645 not_written
= isl_union_set_subtract(copy_out
, must_write
);
5647 uninitialized
= isl_union_map_copy(gen
->prog
->scop
->live_in
);
5648 local_uninitialized
= isl_union_map_copy(uninitialized
);
5650 local
= isl_union_set_apply(local
,
5651 isl_union_map_copy(gen
->prog
->to_inner
));
5652 local_uninitialized
= isl_union_map_intersect_range(local_uninitialized
,
5654 if (!isl_union_map_is_empty(local_uninitialized
)) {
5656 "possibly uninitialized reads (not copied in):\n");
5657 isl_union_map_dump(local_uninitialized
);
5659 uninitialized
= isl_union_map_subtract(uninitialized
,
5660 local_uninitialized
);
5661 copy_in
= isl_union_map_range(uninitialized
);
5662 copy_in
= isl_union_set_union(copy_in
, not_written
);
5663 copy_in
= isl_union_set_apply(copy_in
,
5664 isl_union_map_copy(gen
->prog
->to_outer
));
5666 gen
->prog
->copy_in
= copy_in
;
5669 /* Internal data structure for extract_access.
5670 * "next_access" points to the end of a linked list that is extended
5671 * by extract_access.
5672 * "single_expression" is set if the access expressions belong to
5673 * an expression statement (i.e., a statement without internal control).
5674 * "any_to_outer" maps all intermediate arrays to their outer arrays.
5676 struct ppcg_extract_access_data
{
5677 struct gpu_stmt_access
**next_access
;
5678 int single_expression
;
5679 isl_union_map
*any_to_outer
;
5682 /* Extract a gpu_stmt_access from "expr", append it to the list
5683 * that ends in *data->next_access and update the end of the list.
5684 * If the access expression performs a write, then it is considered
5685 * exact only if it appears in a single expression statement and
5686 * if its may access relation is equal to its must access relation.
5688 * The combined set of may accesses may be union if member accesses
5689 * are involved, but the entire set is derived from a single reference and
5690 * therefore from a single index expression. These accesses therefore
5691 * all map to the same outer array.
5693 static int extract_access(__isl_keep pet_expr
*expr
, void *user
)
5695 struct ppcg_extract_access_data
*data
= user
;
5696 isl_union_map
*may
, *tagged
;
5697 struct gpu_stmt_access
*access
;
5699 isl_multi_pw_aff
*index
;
5701 may
= pet_expr_access_get_may_read(expr
);
5702 may
= isl_union_map_union(may
, pet_expr_access_get_may_write(expr
));
5703 may
= isl_union_map_apply_range(may
,
5704 isl_union_map_copy(data
->any_to_outer
));
5705 ctx
= isl_union_map_get_ctx(may
);
5706 access
= isl_alloc_type(ctx
, struct gpu_stmt_access
);
5708 access
->next
= NULL
;
5709 access
->read
= pet_expr_access_is_read(expr
);
5710 access
->write
= pet_expr_access_is_write(expr
);
5711 tagged
= pet_expr_access_get_tagged_may_read(expr
);
5712 tagged
= isl_union_map_union(tagged
,
5713 pet_expr_access_get_tagged_may_write(expr
));
5714 tagged
= isl_union_map_apply_range(tagged
,
5715 isl_union_map_copy(data
->any_to_outer
));
5716 access
->tagged_access
= isl_map_from_union_map(tagged
);
5717 if (!access
->write
) {
5718 access
->exact_write
= 1;
5719 } else if (!data
->single_expression
) {
5720 access
->exact_write
= 0;
5722 isl_union_map
*must
;
5723 must
= pet_expr_access_get_must_write(expr
);
5724 access
->exact_write
= isl_union_map_is_equal(must
, may
);
5725 isl_union_map_free(must
);
5727 access
->access
= isl_map_from_union_map(may
);
5728 index
= pet_expr_access_get_index(expr
);
5729 access
->n_index
= isl_multi_pw_aff_dim(index
, isl_dim_out
);
5730 isl_multi_pw_aff_free(index
);
5731 access
->ref_id
= pet_expr_access_get_ref_id(expr
);
5734 *data
->next_access
= access
;
5735 data
->next_access
= &(*data
->next_access
)->next
;
5740 /* Construct a linked list of gpu_stmt_access objects,
5741 * one for each access expression in the statement body.
5742 * "any_to_outer" maps all intermediate arrays to their outer arrays.
5744 static void pet_stmt_extract_accesses(struct gpu_stmt
*stmt
,
5745 __isl_keep isl_union_map
*any_to_outer
)
5747 struct ppcg_extract_access_data data
;
5749 stmt
->accesses
= NULL
;
5750 data
.next_access
= &stmt
->accesses
;
5751 data
.single_expression
=
5752 pet_tree_get_type(stmt
->stmt
->body
) == pet_tree_expr
;
5753 data
.any_to_outer
= any_to_outer
;
5754 pet_tree_foreach_access_expr(stmt
->stmt
->body
, &extract_access
, &data
);
5757 /* Return an array of gpu_stmt representing the statements in "scop".
5759 static struct gpu_stmt
*extract_stmts(isl_ctx
*ctx
, struct ppcg_scop
*scop
,
5760 __isl_keep isl_set
*context
, __isl_keep isl_union_map
*any_to_outer
)
5763 struct gpu_stmt
*stmts
;
5765 stmts
= isl_calloc_array(ctx
, struct gpu_stmt
, scop
->pet
->n_stmt
);
5769 for (i
= 0; i
< scop
->pet
->n_stmt
; ++i
) {
5770 struct gpu_stmt
*s
= &stmts
[i
];
5772 s
->id
= isl_set_get_tuple_id(scop
->pet
->stmts
[i
]->domain
);
5773 s
->stmt
= scop
->pet
->stmts
[i
];
5774 pet_stmt_extract_accesses(s
, any_to_outer
);
5780 /* Callback for ppcg_print_guarded that calls the callback for generate_gpu.
5782 static __isl_give isl_printer
*print_gpu(__isl_take isl_printer
*p
, void *user
)
5784 struct gpu_gen
*gen
= user
;
5786 return gen
->print(p
, gen
->prog
, gen
->tree
, &gen
->types
,
5790 /* Generate CUDA code for "scop" and print it to "p".
5791 * After generating an AST for the transformed scop as explained below,
5792 * we call "gen->print" to print the AST in the desired output format
5795 * If it turns out that it does not make sense to generate GPU code,
5796 * then we generate CPU code instead.
5798 * The GPU code is generated in a context where at least one
5799 * statement instance is executed. The corresponding guard (if any) is printed
5800 * around the entire generated GPU code, except for the declaration
5801 * of the arrays that are visible outside of the scop and that therefore
5802 * cannot be declared inside the body of any possible guard.
5804 * We first compute a schedule that respects the dependences
5805 * of the original program and select the outermost band
5806 * of tilable dimensions that has at least one parallel loop.
5807 * We then have three blocks of dimensions
5811 * The tilable band "B" is first tiled according to "tile" sizes, resulting
5816 * For each iteration of the T loop and for each array, we compute
5817 * the array elements accessed by that iteration, construct a rectangular
5818 * box around it and shift it to the origin. The result is used
5819 * as shared memory for the array.
5821 * We then split off at most 2 parallel loops from the T loops and
5822 * at most 3 parallel loops from the P loops
5826 * The T1/P1 loops are then tiled or "wrapped" over the blocks/threads,
5827 * according to "grid"/"block" sizes.
5829 * H T1T T1P T2 P1T P1P P2 G
5831 * Finally, the T1P and P1P iterators are equated to the block and
5832 * thread dimensions respectively and so are effectively removed.
5833 * The H loops are run on the host. The T1T, T2, P1T, P2 and G loops
5834 * are run on the GPU.
5836 * Code is generated in three stages. We first generate code for the
5837 * host (the H loops), with iterators h%d. Then, for each leaf node
5838 * of the resulting AST, we generate code for the shared loops (up to
5839 * and including T2), with iterators g%d and after equating the H loops
5840 * to h%d parameters and the T1P loops to the block dimensions.
5841 * Finally, we generate code for the remaining loops in a similar fashion.
5843 static __isl_give isl_printer
*generate(__isl_take isl_printer
*p
,
5844 struct gpu_gen
*gen
, struct ppcg_scop
*scop
,
5845 struct ppcg_options
*options
)
5847 struct gpu_prog
*prog
;
5849 isl_set
*context
, *guard
;
5852 return isl_printer_free(p
);
5854 ctx
= isl_printer_get_ctx(p
);
5855 prog
= gpu_prog_alloc(ctx
, scop
);
5857 return isl_printer_free(p
);
5859 context
= isl_set_copy(prog
->context
);
5860 guard
= isl_union_set_params(isl_union_set_copy(prog
->scop
->domain
));
5861 prog
->context
= isl_set_intersect(prog
->context
, isl_set_copy(guard
));
5864 gen
->any_parallelism
= 0;
5865 compute_schedule(gen
);
5867 if (!gen
->any_parallelism
) {
5868 isl_set_free(context
);
5869 isl_set_free(guard
);
5870 p
= print_cpu(p
, scop
, options
);
5872 compute_copy_in_and_out(gen
);
5873 gen
->tree
= generate_host_code(gen
);
5874 p
= ppcg_print_exposed_declarations(p
, prog
->scop
);
5875 p
= ppcg_print_guarded(p
, guard
, context
, &print_gpu
, gen
);
5876 isl_ast_node_free(gen
->tree
);
5879 isl_union_map_free(gen
->sched
);
5881 gpu_prog_free(prog
);
5886 /* Wrapper around generate for use as a ppcg_transform callback.
5888 static __isl_give isl_printer
*generate_wrap(__isl_take isl_printer
*p
,
5889 struct ppcg_scop
*scop
, void *user
)
5891 struct gpu_gen
*gen
= user
;
5893 return generate(p
, gen
, scop
, gen
->options
);
5896 /* Transform the code in the file called "input" by replacing
5897 * all scops by corresponding GPU code and write the results to "out".
5899 int generate_gpu(isl_ctx
*ctx
, const char *input
, FILE *out
,
5900 struct ppcg_options
*options
,
5901 __isl_give isl_printer
*(*print
)(__isl_take isl_printer
*p
,
5902 struct gpu_prog
*prog
, __isl_keep isl_ast_node
*tree
,
5903 struct gpu_types
*types
, void *user
), void *user
)
5910 gen
.sizes
= extract_sizes_from_str(ctx
, options
->sizes
);
5911 gen
.options
= options
;
5914 gen
.print_user
= user
;
5916 gen
.types
.name
= NULL
;
5918 if (options
->debug
->dump_sizes
) {
5919 isl_space
*space
= isl_space_params_alloc(ctx
, 0);
5920 gen
.used_sizes
= isl_union_map_empty(space
);
5923 r
= ppcg_transform(ctx
, input
, out
, options
, &generate_wrap
, &gen
);
5925 if (options
->debug
->dump_sizes
) {
5926 isl_union_map_dump(gen
.used_sizes
);
5927 isl_union_map_free(gen
.used_sizes
);
5930 isl_union_map_free(gen
.sizes
);
5931 for (i
= 0; i
< gen
.types
.n
; ++i
)
5932 free(gen
.types
.name
[i
]);
5933 free(gen
.types
.name
);
5938 struct gpu_prog
*gpu_prog_alloc(isl_ctx
*ctx
, struct ppcg_scop
*scop
)
5940 struct gpu_prog
*prog
;
5947 prog
= isl_calloc_type(ctx
, struct gpu_prog
);
5952 prog
->context
= isl_set_copy(scop
->context
);
5953 prog
->n_stmts
= scop
->pet
->n_stmt
;
5954 prog
->any_to_outer
= pet_scop_compute_outer_to_any(scop
->pet
);
5955 prog
->any_to_outer
= isl_union_map_reverse(prog
->any_to_outer
);
5956 space
= isl_union_map_get_space(prog
->any_to_outer
);
5957 space
= isl_space_set_from_params(space
);
5958 space
= isl_space_add_dims(space
, isl_dim_set
, 1);
5959 space
= isl_space_map_from_set(space
);
5960 id
= isl_map_identity(space
);
5961 prog
->any_to_outer
= isl_union_map_add_map(prog
->any_to_outer
, id
);
5962 prog
->stmts
= extract_stmts(ctx
, scop
,
5963 prog
->context
, prog
->any_to_outer
);
5964 prog
->read
= isl_union_map_copy(scop
->reads
);
5965 prog
->may_write
= isl_union_map_copy(scop
->may_writes
);
5966 prog
->must_write
= isl_union_map_copy(scop
->must_writes
);
5967 prog
->to_inner
= pet_scop_compute_outer_to_inner(scop
->pet
);
5968 prog
->to_outer
= isl_union_map_copy(prog
->to_inner
);
5969 prog
->to_outer
= isl_union_map_reverse(prog
->to_outer
);
5972 return gpu_prog_free(prog
);
5974 if (collect_array_info(prog
) < 0)
5975 return gpu_prog_free(prog
);
5980 void *gpu_prog_free(struct gpu_prog
*prog
)
5984 free_array_info(prog
);
5985 free_stmts(prog
->stmts
, prog
->n_stmts
);
5986 isl_union_map_free(prog
->any_to_outer
);
5987 isl_union_map_free(prog
->to_outer
);
5988 isl_union_map_free(prog
->to_inner
);
5989 isl_union_set_free(prog
->copy_in
);
5990 isl_union_set_free(prog
->copy_out
);
5991 isl_union_map_free(prog
->read
);
5992 isl_union_map_free(prog
->may_write
);
5993 isl_union_map_free(prog
->must_write
);
5994 isl_union_map_free(prog
->array_order
);
5995 isl_set_free(prog
->context
);