From e7b2958229c7e0d7e98e130764aa50d1ca9017d3 Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Mon, 8 Nov 2010 17:23:49 +0800 Subject: [PATCH] TCL scripts: replace "puts" with "echo" Signed-off-by: Antonio Borneo --- src/jtag/startup.tcl | 8 +- tcl/bitsbytes.tcl | 2 +- tcl/board/at91eb40a.cfg | 2 +- tcl/board/dm355evm.cfg | 2 +- tcl/board/dm6446evm.cfg | 2 +- tcl/board/ethernut3.cfg | 10 +- tcl/board/lubbock.cfg | 2 +- tcl/board/olimex_sam9_l9260.cfg | 8 +- tcl/board/telo.cfg | 12 +- tcl/board/zy1000.cfg | 8 +- tcl/chip/atmel/at91/aic.tcl | 24 ++-- tcl/chip/atmel/at91/rtt.tcl | 18 +-- tcl/chip/atmel/at91/usarts.tcl | 16 +-- tcl/chip/st/spear/quirk_no_srst.tcl | 4 +- tcl/chip/st/spear/spear3xx_ddr.tcl | 4 +- tcl/mmr_helpers.tcl | 16 +-- tcl/target/aduc702x.cfg | 2 +- tcl/target/c100config.tcl | 26 ++--- tcl/target/c100helper.tcl | 220 ++++++++++++++++++------------------ tcl/target/c100regs.tcl | 2 +- tcl/target/imx31.cfg | 4 +- tcl/target/imx35.cfg | 4 +- tcl/target/lpc3250.cfg | 4 +- tcl/test/selftest.cfg | 2 +- 24 files changed, 201 insertions(+), 201 deletions(-) diff --git a/src/jtag/startup.tcl b/src/jtag/startup.tcl index fdd307815..1779df51b 100644 --- a/src/jtag/startup.tcl +++ b/src/jtag/startup.tcl @@ -30,7 +30,7 @@ proc init_reset { mode } { # documented nor supported except on ZY1000. proc power_restore {} { - puts "Sensed power restore, running reset init and halting GDB." + echo "Sensed power restore, running reset init and halting GDB." reset init # Halt GDB so user can deal with a detected power restore. @@ -47,7 +47,7 @@ proc power_restore {} { add_help_text power_restore "Overridable procedure run when power restore is detected. Runs 'reset init' by default." proc power_dropout {} { - puts "Sensed power dropout." + echo "Sensed power dropout." } ######### @@ -56,7 +56,7 @@ proc power_dropout {} { # documented nor supported except on ZY1000. proc srst_deasserted {} { - puts "Sensed nSRST deasserted, running reset init and halting GDB." + echo "Sensed nSRST deasserted, running reset init and halting GDB." reset init # Halt GDB so user can deal with a detected reset. @@ -73,7 +73,7 @@ proc srst_deasserted {} { add_help_text srst_deasserted "Overridable procedure run when srst deassert is detected. Runs 'reset init' by default." proc srst_asserted {} { - puts "Sensed nSRST asserted." + echo "Sensed nSRST asserted." } # measure actual JTAG clock diff --git a/tcl/bitsbytes.tcl b/tcl/bitsbytes.tcl index 3f65c2091..2c4fd2907 100644 --- a/tcl/bitsbytes.tcl +++ b/tcl/bitsbytes.tcl @@ -54,7 +54,7 @@ proc show_normalize_bitfield { VALUE MSB LSB } { set m [create_mask $MSB $LSB] set mr [expr $VALUE & $m] set sr [expr $mr >> $LSB] - puts [format "((0x%08x & 0x%08x) -> 0x%08x) >> %2d => (0x%x) %5d " $VALUE $m $mr $LSB $sr $sr] + echo [format "((0x%08x & 0x%08x) -> 0x%08x) >> %2d => (0x%x) %5d " $VALUE $m $mr $LSB $sr $sr] return $sr } diff --git a/tcl/board/at91eb40a.cfg b/tcl/board/at91eb40a.cfg index 14f21a1ac..dc5aacbf0 100644 --- a/tcl/board/at91eb40a.cfg +++ b/tcl/board/at91eb40a.cfg @@ -53,7 +53,7 @@ flash bank $_FLASHNAME ecosflash 0x01000000 0x200000 2 2 $_TARGETNAME ecos/at91e $_TARGETNAME configure -work-area-phys 0x00030000 -work-area-size 0x10000 -work-area-backup 0 $_TARGETNAME configure -event reset-init { - puts "Running reset init script for AT91EB40A" + echo "Running reset init script for AT91EB40A" # Reset script for AT91EB40a reg cpsr 0x000000D3 mww 0xFFE00020 0x1 diff --git a/tcl/board/dm355evm.cfg b/tcl/board/dm355evm.cfg index 02c4c866a..0c971e9a0 100644 --- a/tcl/board/dm355evm.cfg +++ b/tcl/board/dm355evm.cfg @@ -18,7 +18,7 @@ $_TARGETNAME configure -event reset-init { dm355evm_init } proc dm355evm_init {} { global dm355 - puts "Initialize DM355 EVM board" + echo "Initialize DM355 EVM board" # CLKIN = 24 MHz ... can't talk quickly to ARM yet jtag_rclk 1500 diff --git a/tcl/board/dm6446evm.cfg b/tcl/board/dm6446evm.cfg index dcd1c4ef8..0d2f6a4d2 100644 --- a/tcl/board/dm6446evm.cfg +++ b/tcl/board/dm6446evm.cfg @@ -59,7 +59,7 @@ $_TARGETNAME configure -event reset-init { dm6446evm_init } # proc dm6446evm_init {} { - puts "Initialize DM6446 EVM board" + echo "Initialize DM6446 EVM board" # FIXME initialize everything: # - PLL1 diff --git a/tcl/board/ethernut3.cfg b/tcl/board/ethernut3.cfg index 34e9b72d6..ad4552733 100644 --- a/tcl/board/ethernut3.cfg +++ b/tcl/board/ethernut3.cfg @@ -77,10 +77,10 @@ proc board_remap {{VERBOSE 0}} { mww 0xffe00020 0x00000001 if {$VERBOSE != 0} { - puts "0x00000000 RAM" - puts "0x10000000 Flash" - puts "0x20000000 Ethernet" - puts "0x21000000 CPLD" - puts "0x22000000 Expansion" + echo "0x00000000 RAM" + echo "0x10000000 Flash" + echo "0x20000000 Ethernet" + echo "0x21000000 CPLD" + echo "0x22000000 Expansion" } } diff --git a/tcl/board/lubbock.cfg b/tcl/board/lubbock.cfg index b58ad5add..298954cc0 100644 --- a/tcl/board/lubbock.cfg +++ b/tcl/board/lubbock.cfg @@ -38,7 +38,7 @@ proc hexled {u32} { proc lubbock_init {target} { - puts "Initialize PXA255 Lubbock board" + echo "Initialize PXA255 Lubbock board" # (1) pinmux diff --git a/tcl/board/olimex_sam9_l9260.cfg b/tcl/board/olimex_sam9_l9260.cfg index 7c4b2ccb0..5c16ed2f5 100644 --- a/tcl/board/olimex_sam9_l9260.cfg +++ b/tcl/board/olimex_sam9_l9260.cfg @@ -35,7 +35,7 @@ $_TARGETNAME configure -event reset-init { ## # Clock configuration for 99.328 MHz main clock. ## - puts "Setting up clock" + echo "Setting up clock" mww 0xfffffc20 0x00004001 # CKGR_MOR : enable main oscillator, 512 slow clock startup sleep 20 # wait 20 ms (need 15.6 ms for startup) mww 0xfffffc30 0x00000001 # PMC_MCKR : switch to main oscillator (18.432 MHz) @@ -54,7 +54,7 @@ $_TARGETNAME configure -event reset-init { ## # SDRAM configuration for 2 x Samsung K4S561632J-UC75, 4M x 16Bit x 4 Banks. ## - puts "Configuring SDRAM" + echo "Configuring SDRAM" mww 0xfffff870 0xffff0000 # PIOC_ASR : select peripheral function for D15..D31 mww 0xfffff804 0xffff0000 # PIOC_PDR : disable PIO function for D15..D31 @@ -92,7 +92,7 @@ $_TARGETNAME configure -event reset-init { ## # NAND Flash Configuration for 1 x Samsung K9F4G08U0M, 512M x 8Bit. ## - puts "Configuring NAND flash" + echo "Configuring NAND flash" mww 0xfffffc10 0x00000010 ;# PMC_PCER : enable PIOC clock mww 0xfffff800 0x00006000 ;# PIOC_PER : enable PIO function for 13(RDY/~BSY) and 14(~CS) mww 0xfffff810 0x00004000 ;# PIOC_OER : enable output on 14 @@ -116,7 +116,7 @@ $_TARGETNAME configure -event reset-init { ## # Dataflash configuration for 1 x Atmel AT45DB161D, 16Mbit ## - puts "Setting up dataflash" + echo "Setting up dataflash" mww 0xfffff404 0x00000807 ;# PIOA_PDR : disable PIO function for 0(SPI0_MISO), 1(SPI0_MOSI), # 2(SPI0_SPCK), and 11(SPI0_NPCS1) mww 0xfffff470 0x00000007 ;# PIOA_ASR : select peripheral A function for 0, 1, and 2 diff --git a/tcl/board/telo.cfg b/tcl/board/telo.cfg index 1c0ad762f..119373c63 100644 --- a/tcl/board/telo.cfg +++ b/tcl/board/telo.cfg @@ -31,24 +31,24 @@ $_TARGETNAME configure -event reset-init { setupTelo #turn up the JTAG speed adapter_khz 3000 - puts "JTAG speek now 3MHz" - puts "type helpC100 to get help on C100" + echo "JTAG speek now 3MHz" + echo "type helpC100 to get help on C100" } $_TARGETNAME configure -event reset-deassert-post { # Force target into ARM state. # soft_reset_halt # not implemented on ARM11 - puts "Detected SRSRT asserted on C100.CPU" + echo "Detected SRSRT asserted on C100.CPU" } $_TARGETNAME configure -event reset-assert-post { - puts "Assering reset" + echo "Assering reset" #sleep 10 } -proc power_restore {} { puts "Sensed power restore. No action." } -proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." } +proc power_restore {} { echo "Sensed power restore. No action." } +proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." } # boots from NOR on CS0: 8 MBytes CFI flash, 16-bit bus diff --git a/tcl/board/zy1000.cfg b/tcl/board/zy1000.cfg index d2561e9f6..63334eeb2 100644 --- a/tcl/board/zy1000.cfg +++ b/tcl/board/zy1000.cfg @@ -85,11 +85,11 @@ proc production_info {} { # Progress messages are output via puts proc production {firmwarefile serialnumber} { if {[string length $serialnumber]!=12} { - puts "Invalid serial number" + echo "Invalid serial number" return } - puts "Power cycling target" + echo "Power cycling target" power off sleep 3000 power on @@ -99,10 +99,10 @@ proc production {firmwarefile serialnumber} { verify_image $firmwarefile 0x1000000 bin # Big endian... weee!!!! - puts "Setting MAC number to $serialnumber" + echo "Setting MAC number to $serialnumber" flash fillw [expr 0x1030000-0x8] "0x[string range $serialnumber 2 3][string range $serialnumber 0 1]0000" 1 flash fillw [expr 0x1030000-0x4] "0x[string range $serialnumber 10 11][string range $serialnumber 8 9][string range $serialnumber 6 7][string range $serialnumber 4 5]" 1 - puts "Production successful" + echo "Production successful" } diff --git a/tcl/chip/atmel/at91/aic.tcl b/tcl/chip/atmel/at91/aic.tcl index 366be6d07..6dae36ad6 100644 --- a/tcl/chip/atmel/at91/aic.tcl +++ b/tcl/chip/atmel/at91/aic.tcl @@ -57,33 +57,33 @@ proc show_AIC { } { if [catch { mem2array aaa 32 $AIC_SMR [expr 32 * 4] } msg ] { error [format "%s (%s)" $msg AIC_SMR] } - puts "AIC_SMR: Mode & Type" + echo "AIC_SMR: Mode & Type" global AT91C_ID for { set x 0 } { $x < 32 } { } { - puts -nonewline " " - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] + echo -n " " + echo -n [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] incr x - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] + echo -n [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] incr x - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] + echo -n [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] incr x - puts [format "%2d: %5s 0x%08x" $x $AT91C_ID($x) $aaa($x)] + echo [format "%2d: %5s 0x%08x" $x $AT91C_ID($x) $aaa($x)] incr x } global AIC_SVR if [catch { mem2array aaa 32 $AIC_SVR [expr 32 * 4] } msg ] { error [format "%s (%s)" $msg AIC_SVR] } - puts "AIC_SVR: Vectors" + echo "AIC_SVR: Vectors" for { set x 0 } { $x < 32 } { } { - puts -nonewline " " - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] + echo -n " " + echo -n [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] incr x - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] + echo -n [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] incr x - puts -nonewline [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] + echo -n [format "%2d: %5s 0x%08x | " $x $AT91C_ID($x) $aaa($x)] incr x - puts [format "%2d: %5s 0x%08x" $x $AT91C_ID($x) $aaa($x)] + echo [format "%2d: %5s 0x%08x" $x $AT91C_ID($x) $aaa($x)] incr x } diff --git a/tcl/chip/atmel/at91/rtt.tcl b/tcl/chip/atmel/at91/rtt.tcl index 433cfe30f..8be6a56b0 100644 --- a/tcl/chip/atmel/at91/rtt.tcl +++ b/tcl/chip/atmel/at91/rtt.tcl @@ -18,16 +18,16 @@ proc show_RTTC_RTMR_helper { NAME ADDR VAL } { # Nasty hack, make this a float by tacking a .0 on the end # otherwise, jim makes the value an integer set f [expr $AT91C_SLOWOSC_FREQ.0 / $rtpres.0] - puts [format "\tPrescale value: 0x%04x (%5d) => %f Hz" $rtpres $rtpres $f] + echo [format "\tPrescale value: 0x%04x (%5d) => %f Hz" $rtpres $rtpres $f] if { $VAL & $BIT16 } { - puts "\tBit16 -> Alarm IRQ Enabled" + echo "\tBit16 -> Alarm IRQ Enabled" } else { - puts "\tBit16 -> Alarm IRQ Disabled" + echo "\tBit16 -> Alarm IRQ Disabled" } if { $VAL & $BIT17 } { - puts "\tBit17 -> RTC Inc IRQ Enabled" + echo "\tBit17 -> RTC Inc IRQ Enabled" } else { - puts "\tBit17 -> RTC Inc IRQ Disabled" + echo "\tBit17 -> RTC Inc IRQ Disabled" } # Bit 18 is write only. } @@ -35,14 +35,14 @@ proc show_RTTC_RTMR_helper { NAME ADDR VAL } { proc show_RTTC_RTSR_helper { NAME ADDR VAL } { global BIT0 BIT1 if { $VAL & $BIT0 } { - puts "\tBit0 -> ALARM PENDING" + echo "\tBit0 -> ALARM PENDING" } else { - puts "\tBit0 -> alarm not pending" + echo "\tBit0 -> alarm not pending" } if { $VAL & $BIT1 } { - puts "\tBit0 -> RTINC PENDING" + echo "\tBit0 -> RTINC PENDING" } else { - puts "\tBit0 -> rtinc not pending" + echo "\tBit0 -> rtinc not pending" } } diff --git a/tcl/chip/atmel/at91/usarts.tcl b/tcl/chip/atmel/at91/usarts.tcl index f798fc4a5..68420292e 100644 --- a/tcl/chip/atmel/at91/usarts.tcl +++ b/tcl/chip/atmel/at91/usarts.tcl @@ -41,9 +41,9 @@ proc show_mmr_USx_MR_helper { NAME ADDR VAL } { set x [show_normalize_bitfield $VAL 3 0] if { $x == 0 } { - puts "\tNormal operation" + echo "\tNormal operation" } else { - puts [format "\tNon Normal operation mode: 0x%02x" $x] + echo [format "\tNon Normal operation mode: 0x%02x" $x] } set x [show_normalize_bitfield $VAL 11 9] @@ -61,17 +61,17 @@ proc show_mmr_USx_MR_helper { NAME ADDR VAL } { } } } - puts [format "\tParity: %s " $s] + echo [format "\tParity: %s " $s] set x [expr 5 + [show_normalize_bitfield $VAL 7 6]] - puts [format "\tDatabits: %d" $x] + echo [format "\tDatabits: %d" $x] set x [show_normalize_bitfield $VAL 13 12] switch -exact $x { - 0 { puts "\tStop bits: 1" } - 1 { puts "\tStop bits: 1.5" } - 2 { puts "\tStop bits: 2" } - 3 { puts "\tStop bits: Illegal/Reserved" } + 0 { echo "\tStop bits: 1" } + 1 { echo "\tStop bits: 1.5" } + 2 { echo "\tStop bits: 2" } + 3 { echo "\tStop bits: Illegal/Reserved" } } } diff --git a/tcl/chip/st/spear/quirk_no_srst.tcl b/tcl/chip/st/spear/quirk_no_srst.tcl index df227642a..fd02d07c1 100644 --- a/tcl/chip/st/spear/quirk_no_srst.tcl +++ b/tcl/chip/st/spear/quirk_no_srst.tcl @@ -37,9 +37,9 @@ proc sp_reset_deassert_post {} { set bar(3) \\ poll on - puts "====> Press reset button on the board <====" + echo "====> Press reset button on the board <====" for {set i 0} { [sp_is_halted] == 0 } { set i [expr $i + 1]} { - puts -nonewline "$bar([expr $i & 3])\r" + echo -n "$bar([expr $i & 3])\r" sleep 200 } diff --git a/tcl/chip/st/spear/spear3xx_ddr.tcl b/tcl/chip/st/spear/spear3xx_ddr.tcl index eb1c4b02c..a804cdc4b 100644 --- a/tcl/chip/st/spear/spear3xx_ddr.tcl +++ b/tcl/chip/st/spear/spear3xx_ddr.tcl @@ -23,11 +23,11 @@ proc sp3xx_ddr_init {ddr_type} { mww $ddr_size 0x87654321 mww 0x00000000 0x12345678 if {[expr [mrw 0x00000000] == 0x12345678 && [mrw $ddr_size] == 0x87654321]} { - puts [format \ + echo [format \ "Double chip DDR memory. Total memory size 0x%08x byte" \ [expr 2 * $ddr_size]] } else { - puts [format \ + echo [format \ "Single chip DDR memory. Memory size 0x%08x byte" \ $ddr_size] } diff --git a/tcl/mmr_helpers.tcl b/tcl/mmr_helpers.tcl index 902991100..ce116e459 100644 --- a/tcl/mmr_helpers.tcl +++ b/tcl/mmr_helpers.tcl @@ -13,7 +13,7 @@ proc show_mmr32_reg { NAME } { set a [set [set NAME]] if ![catch { set v [memread32 $a] } msg ] { - puts [format "%15s: (0x%08x): 0x%08x" $NAME $a $v] + echo [format "%15s: (0x%08x): 0x%08x" $NAME $a $v] # Was a helper defined? set fn show_${NAME}_helper @@ -43,18 +43,18 @@ proc show_mmr32_bits { NAMES VAL } { } for { set x 24 } { $x >= 0 } { incr x -8 } { - puts -nonewline " " + echo -n " " for { set y 7 } { $y >= 0 } { incr y -1 } { set s $MYNAMES([expr $x + $y]) - puts -nonewline [format "%2d: %-*s | " [expr $x + $y] $w $s ] + echo -n [format "%2d: %-*s | " [expr $x + $y] $w $s ] } - puts "" + echo "" - puts -nonewline " " + echo -n " " for { set y 7 } { $y >= 0 } { incr y -1 } { - puts -nonewline [format " %d%*s | " [expr !!($VAL & (1 << ($x + $y)))] [expr $w -1] ""] + echo -n [format " %d%*s | " [expr !!($VAL & (1 << ($x + $y)))] [expr $w -1] ""] } - puts "" + echo "" } } @@ -68,5 +68,5 @@ proc show_mmr_bitfield { MSB LSB VAL FIELDNAME FIELDVALUES } { } else { set sval "" } - puts [format "%-15s: %d (0x%0*x) %s" $FIELDNAME $nval $width $nval $sval ] + echo [format "%-15s: %d (0x%0*x) %s" $FIELDNAME $nval $width $nval $sval ] } diff --git a/tcl/target/aduc702x.cfg b/tcl/target/aduc702x.cfg index d58b723a9..dcb9c12f2 100644 --- a/tcl/target/aduc702x.cfg +++ b/tcl/target/aduc702x.cfg @@ -45,7 +45,7 @@ flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME proc watchdog_service {} { global watchdog_hdl mww 0xffff036c 0 -# puts "watchdog!!" +# echo "watchdog!!" set watchdog_hdl [after 500 watchdog_service] } diff --git a/tcl/target/c100config.tcl b/tcl/target/c100config.tcl index 17a947604..52efa83c2 100644 --- a/tcl/target/c100config.tcl +++ b/tcl/target/c100config.tcl @@ -8,7 +8,7 @@ proc config {label} { # show the value for the param. with label proc showconfig {label} { - puts [format "0x%x" [dict get [configC100] $label ]] + echo [format "0x%x" [dict get [configC100] $label ]] } # Telo board config @@ -53,7 +53,7 @@ proc setupTelo {} { proc setupNOR {} { - puts "Setting up NOR: 16MB, 16-bit wide bus, CS0" + echo "Setting up NOR: 16MB, 16-bit wide bus, CS0" # this is taken from u-boot/boards/mindspeed/ooma-darwin/board.c:nor_hw_init() set EX_CSEN_REG [regs EX_CSEN_REG ] set EX_CS0_SEG_REG [regs EX_CS0_SEG_REG ] @@ -99,7 +99,7 @@ proc bootNOR {} { resume } proc setupGPIO {} { - puts "Setting up GPIO block for Telo" + echo "Setting up GPIO block for Telo" # This is current setup for Telo (see sch. for details): #GPIO0 reset for FXS-FXO IC, leave as input, the IC has internal pullup #GPIO1 irq line for FXS-FXO @@ -117,14 +117,14 @@ proc setupGPIO {} { } proc highGPIO5 {} { - puts "GPIO5 high" + echo "GPIO5 high" set GPIO_OUTPUT_REG [regs GPIO_OUTPUT_REG] # set GPIO5=1 mmw $GPIO_OUTPUT_REG [expr 1 << 5] 0x0 } proc lowGPIO5 {} { - puts "GPIO5 low" + echo "GPIO5 low" set GPIO_OUTPUT_REG [regs GPIO_OUTPUT_REG] # set GPIO5=0 mmw $GPIO_OUTPUT_REG 0x0 [expr 1 << 5] @@ -161,12 +161,12 @@ proc ooma_board_detect {} { # read the current value of the BOOTSRAP pins set tmp [mrw $GPIO_BOOTSTRAP_REG] - puts [format "GPIO_BOOTSTRAP_REG (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG $tmp] + echo [format "GPIO_BOOTSTRAP_REG (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG $tmp] # extract the GPBP bits set gpbt [expr ($tmp &0x1C00) >> 10 | ($tmp & 0x40) >>3] # display board ID - puts [format "This is %s (0x%x)" [dict get [boardID $gpbt] $gpbt name] $gpbt] + echo [format "This is %s (0x%x)" [dict get [boardID $gpbt] $gpbt name] $gpbt] # show it on serial console putsUART0 [format "This is %s (0x%x)\n" [dict get [boardID $gpbt] $gpbt name] $gpbt] # return the ddr2 size, used to configure DDR2 on a given board. @@ -228,13 +228,13 @@ proc configureDDR2regs_256M {} { # start DDRC mw64bit $DENALI_CTL_02_DATA [expr $DENALI_CTL_02_VAL | (1 << 32)] # wait int_status[2] (DRAM init complete) - puts -nonewline "Waiting for DDR2 controller to init..." + echo -n "Waiting for DDR2 controller to init..." set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]] while { [expr $tmp & 0x040000] == 0 } { sleep 1 set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]] } - puts "done." + echo "done." # do ddr2 training sequence # TBD (for now, if you need it, run trainDDR command) @@ -296,7 +296,7 @@ proc configureDDR2regs_128M {} { # start DDRC mw64bit $DENALI_CTL_02_DATA [expr $DENALI_CTL_02_VAL | (1 << 32)] # wait int_status[2] (DRAM init complete) - puts -nonewline "Waiting for DDR2 controller to init..." + echo -n "Waiting for DDR2 controller to init..." set tmp [mrw [expr $DENALI_CTL_08_DATA + 4]] while { [expr $tmp & 0x040000] == 0 } { sleep 1 @@ -304,7 +304,7 @@ proc configureDDR2regs_128M {} { } # This is not necessary #mw64bit $DENALI_CTL_11_DATA [expr ($DENALI_CTL_11_VAL & ~0x00007F0000000000) | ($wr_dqs_shift << 40) ] - puts "done." + echo "done." # do ddr2 training sequence # TBD (for now, if you need it, run trainDDR command) @@ -398,10 +398,10 @@ proc flashUBOOT {file} { # make sure we are accessing the lower part of NOR lowGPIO5 flash probe 0 - puts "Erasing sectors 0-3 for uboot" + echo "Erasing sectors 0-3 for uboot" putsUART0 "Erasing sectors 0-3 for uboot\n" flash erase_sector 0 0 3 - puts "Programming u-boot" + echo "Programming u-boot" putsUART0 "Programming u-boot..." arm11 memwrite burst enable flash write_image $file $EXP_CS0_BASEADDR diff --git a/tcl/target/c100helper.tcl b/tcl/target/c100helper.tcl index 32510660e..c9124cbc6 100644 --- a/tcl/target/c100helper.tcl +++ b/tcl/target/c100helper.tcl @@ -1,28 +1,28 @@ proc helpC100 {} { - puts "List of useful functions for C100 processor:" - puts "1) reset init: will set up your Telo board" - puts "2) setupNOR: will setup NOR access" - puts "3) showNOR: will show current NOR config registers for 16-bit, 16MB NOR" - puts "4) setupGPIO: will setup GPIOs for Telo board" - puts "5) showGPIO: will show current GPIO config registers" - puts "6) highGPIO5: will set GPIO5=NOR_addr22=1 to access upper 8MB" - puts "7) lowGPIO5: will set GPIO5=NOR_addr22=0 to access lower 8MB" - puts "8) showAmbaClk: will show current config registers for Amba Bus Clock" - puts "9) setupAmbaClk: will setup Amba Bus Clock=165MHz" - puts "10) showArmClk: will show current config registers for Arm Bus Clock" - puts "11) setupArmClk: will setup Amba Bus Clock=450MHz" - puts "12) ooma_board_detect: will show which version of Telo you have" - puts "13) setupDDR2: will configure DDR2 controller, you must have PLLs configureg" - puts "14) showDDR2: will show DDR2 config registers" - puts "15) showWatchdog: will show current regster config for watchdog" - puts "16) reboot: will trigger watchdog and reboot Telo (hw reset)" - puts "17) bootNOR: will boot Telo from NOR" - puts "18) setupUART0: will configure UART0 for 115200 8N1, PLLs have to be confiured" - puts "19) putcUART0: will print a character on UART0" - puts "20) putsUART0: will print a string on UART0" - puts "21) trainDDR2: will run DDR2 training program" - puts "22) flashUBOOT: will prgram NOR sectors 0-3 with u-boot.bin" + echo "List of useful functions for C100 processor:" + echo "1) reset init: will set up your Telo board" + echo "2) setupNOR: will setup NOR access" + echo "3) showNOR: will show current NOR config registers for 16-bit, 16MB NOR" + echo "4) setupGPIO: will setup GPIOs for Telo board" + echo "5) showGPIO: will show current GPIO config registers" + echo "6) highGPIO5: will set GPIO5=NOR_addr22=1 to access upper 8MB" + echo "7) lowGPIO5: will set GPIO5=NOR_addr22=0 to access lower 8MB" + echo "8) showAmbaClk: will show current config registers for Amba Bus Clock" + echo "9) setupAmbaClk: will setup Amba Bus Clock=165MHz" + echo "10) showArmClk: will show current config registers for Arm Bus Clock" + echo "11) setupArmClk: will setup Amba Bus Clock=450MHz" + echo "12) ooma_board_detect: will show which version of Telo you have" + echo "13) setupDDR2: will configure DDR2 controller, you must have PLLs configureg" + echo "14) showDDR2: will show DDR2 config registers" + echo "15) showWatchdog: will show current regster config for watchdog" + echo "16) reboot: will trigger watchdog and reboot Telo (hw reset)" + echo "17) bootNOR: will boot Telo from NOR" + echo "18) setupUART0: will configure UART0 for 115200 8N1, PLLs have to be confiured" + echo "19) putcUART0: will print a character on UART0" + echo "20) putsUART0: will print a string on UART0" + echo "21) trainDDR2: will run DDR2 training program" + echo "22) flashUBOOT: will prgram NOR sectors 0-3 with u-boot.bin" } source [find mem_helper.tcl] @@ -39,14 +39,14 @@ proc mr64bit {reg} { proc mw64bit {reg value} { set high [expr $value >> 32] set low [expr $value & 0xffffffff] - #puts [format "mw64bit(0x%x): 0x%08x%08x" $reg $high $low] + #echo [format "mw64bit(0x%x): 0x%08x%08x" $reg $high $low] mww $reg $low mww [expr $reg+4] $high } proc showNOR {} { - puts "This is the current NOR setup" + echo "This is the current NOR setup" set EX_CSEN_REG [regs EX_CSEN_REG ] set EX_CS0_SEG_REG [regs EX_CS0_SEG_REG ] set EX_CS0_CFG_REG [regs EX_CS0_CFG_REG ] @@ -59,23 +59,23 @@ proc showNOR {} { set EX_WRFSM_REG [regs EX_WRFSM_REG ] set EX_RDFSM_REG [regs EX_RDFSM_REG ] - puts [format "EX_CSEN_REG (0x%x): 0x%x" $EX_CSEN_REG [mrw $EX_CSEN_REG]] - puts [format "EX_CS0_SEG_REG (0x%x): 0x%x" $EX_CS0_SEG_REG [mrw $EX_CS0_SEG_REG]] - puts [format "EX_CS0_CFG_REG (0x%x): 0x%x" $EX_CS0_CFG_REG [mrw $EX_CS0_CFG_REG]] - puts [format "EX_CS0_TMG1_REG (0x%x): 0x%x" $EX_CS0_TMG1_REG [mrw $EX_CS0_TMG1_REG]] - puts [format "EX_CS0_TMG2_REG (0x%x): 0x%x" $EX_CS0_TMG2_REG [mrw $EX_CS0_TMG2_REG]] - puts [format "EX_CS0_TMG3_REG (0x%x): 0x%x" $EX_CS0_TMG3_REG [mrw $EX_CS0_TMG3_REG]] - puts [format "EX_CLOCK_DIV_REG (0x%x): 0x%x" $EX_CLOCK_DIV_REG [mrw $EX_CLOCK_DIV_REG]] - puts [format "EX_MFSM_REG (0x%x): 0x%x" $EX_MFSM_REG [mrw $EX_MFSM_REG]] - puts [format "EX_CSFSM_REG (0x%x): 0x%x" $EX_CSFSM_REG [mrw $EX_CSFSM_REG]] - puts [format "EX_WRFSM_REG (0x%x): 0x%x" $EX_WRFSM_REG [mrw $EX_WRFSM_REG]] - puts [format "EX_RDFSM_REG (0x%x): 0x%x" $EX_RDFSM_REG [mrw $EX_RDFSM_REG]] + echo [format "EX_CSEN_REG (0x%x): 0x%x" $EX_CSEN_REG [mrw $EX_CSEN_REG]] + echo [format "EX_CS0_SEG_REG (0x%x): 0x%x" $EX_CS0_SEG_REG [mrw $EX_CS0_SEG_REG]] + echo [format "EX_CS0_CFG_REG (0x%x): 0x%x" $EX_CS0_CFG_REG [mrw $EX_CS0_CFG_REG]] + echo [format "EX_CS0_TMG1_REG (0x%x): 0x%x" $EX_CS0_TMG1_REG [mrw $EX_CS0_TMG1_REG]] + echo [format "EX_CS0_TMG2_REG (0x%x): 0x%x" $EX_CS0_TMG2_REG [mrw $EX_CS0_TMG2_REG]] + echo [format "EX_CS0_TMG3_REG (0x%x): 0x%x" $EX_CS0_TMG3_REG [mrw $EX_CS0_TMG3_REG]] + echo [format "EX_CLOCK_DIV_REG (0x%x): 0x%x" $EX_CLOCK_DIV_REG [mrw $EX_CLOCK_DIV_REG]] + echo [format "EX_MFSM_REG (0x%x): 0x%x" $EX_MFSM_REG [mrw $EX_MFSM_REG]] + echo [format "EX_CSFSM_REG (0x%x): 0x%x" $EX_CSFSM_REG [mrw $EX_CSFSM_REG]] + echo [format "EX_WRFSM_REG (0x%x): 0x%x" $EX_WRFSM_REG [mrw $EX_WRFSM_REG]] + echo [format "EX_RDFSM_REG (0x%x): 0x%x" $EX_RDFSM_REG [mrw $EX_RDFSM_REG]] } proc showGPIO {} { - puts "This is the current GPIO register setup" + echo "This is the current GPIO register setup" # GPIO outputs register set GPIO_OUTPUT_REG [regs GPIO_OUTPUT_REG] # GPIO Output Enable register @@ -93,19 +93,19 @@ proc showGPIO {} { set GPIO_IOCTRL_REG [regs GPIO_IOCTRL_REG] set GPIO_DEVID_REG [regs GPIO_DEVID_REG] - puts [format "GPIO_OUTPUT_REG (0x%x): 0x%x" $GPIO_OUTPUT_REG [mrw $GPIO_OUTPUT_REG]] - puts [format "GPIO_OE_REG (0x%x): 0x%x" $GPIO_OE_REG [mrw $GPIO_OE_REG]] - puts [format "GPIO_HI_INT_ENABLE_REG(0x%x): 0x%x" $GPIO_HI_INT_ENABLE_REG [mrw $GPIO_HI_INT_ENABLE_REG]] - puts [format "GPIO_LO_INT_ENABLE_REG(0x%x): 0x%x" $GPIO_LO_INT_ENABLE_REG [mrw $GPIO_LO_INT_ENABLE_REG]] - puts [format "GPIO_INPUT_REG (0x%x): 0x%x" $GPIO_INPUT_REG [mrw $GPIO_INPUT_REG]] - puts [format "APB_ACCESS_WS_REG (0x%x): 0x%x" $APB_ACCESS_WS_REG [mrw $APB_ACCESS_WS_REG]] - puts [format "MUX_CONF_REG (0x%x): 0x%x" $MUX_CONF_REG [mrw $MUX_CONF_REG]] - puts [format "SYSCONF_REG (0x%x): 0x%x" $SYSCONF_REG [mrw $SYSCONF_REG]] - puts [format "GPIO_ARM_ID_REG (0x%x): 0x%x" $GPIO_ARM_ID_REG [mrw $GPIO_ARM_ID_REG]] - puts [format "GPIO_BOOTSTRAP_REG (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG [mrw $GPIO_BOOTSTRAP_REG]] - puts [format "GPIO_LOCK_REG (0x%x): 0x%x" $GPIO_LOCK_REG [mrw $GPIO_LOCK_REG]] - puts [format "GPIO_IOCTRL_REG (0x%x): 0x%x" $GPIO_IOCTRL_REG [mrw $GPIO_IOCTRL_REG]] - puts [format "GPIO_DEVID_REG (0x%x): 0x%x" $GPIO_DEVID_REG [mrw $GPIO_DEVID_REG]] + echo [format "GPIO_OUTPUT_REG (0x%x): 0x%x" $GPIO_OUTPUT_REG [mrw $GPIO_OUTPUT_REG]] + echo [format "GPIO_OE_REG (0x%x): 0x%x" $GPIO_OE_REG [mrw $GPIO_OE_REG]] + echo [format "GPIO_HI_INT_ENABLE_REG(0x%x): 0x%x" $GPIO_HI_INT_ENABLE_REG [mrw $GPIO_HI_INT_ENABLE_REG]] + echo [format "GPIO_LO_INT_ENABLE_REG(0x%x): 0x%x" $GPIO_LO_INT_ENABLE_REG [mrw $GPIO_LO_INT_ENABLE_REG]] + echo [format "GPIO_INPUT_REG (0x%x): 0x%x" $GPIO_INPUT_REG [mrw $GPIO_INPUT_REG]] + echo [format "APB_ACCESS_WS_REG (0x%x): 0x%x" $APB_ACCESS_WS_REG [mrw $APB_ACCESS_WS_REG]] + echo [format "MUX_CONF_REG (0x%x): 0x%x" $MUX_CONF_REG [mrw $MUX_CONF_REG]] + echo [format "SYSCONF_REG (0x%x): 0x%x" $SYSCONF_REG [mrw $SYSCONF_REG]] + echo [format "GPIO_ARM_ID_REG (0x%x): 0x%x" $GPIO_ARM_ID_REG [mrw $GPIO_ARM_ID_REG]] + echo [format "GPIO_BOOTSTRAP_REG (0x%x): 0x%x" $GPIO_BOOTSTRAP_REG [mrw $GPIO_BOOTSTRAP_REG]] + echo [format "GPIO_LOCK_REG (0x%x): 0x%x" $GPIO_LOCK_REG [mrw $GPIO_LOCK_REG]] + echo [format "GPIO_IOCTRL_REG (0x%x): 0x%x" $GPIO_IOCTRL_REG [mrw $GPIO_IOCTRL_REG]] + echo [format "GPIO_DEVID_REG (0x%x): 0x%x" $GPIO_DEVID_REG [mrw $GPIO_DEVID_REG]] } @@ -116,22 +116,22 @@ proc showAmbaClk {} { set CLKCORE_AHB_CLK_CNTRL [regs CLKCORE_AHB_CLK_CNTRL] set PLL_CLK_BYPASS [regs PLL_CLK_BYPASS] - puts [format "CLKCORE_AHB_CLK_CNTRL (0x%x): 0x%x" $CLKCORE_AHB_CLK_CNTRL [mrw $CLKCORE_AHB_CLK_CNTRL]] + echo [format "CLKCORE_AHB_CLK_CNTRL (0x%x): 0x%x" $CLKCORE_AHB_CLK_CNTRL [mrw $CLKCORE_AHB_CLK_CNTRL]] mem2array value 32 $CLKCORE_AHB_CLK_CNTRL 1 # see if the PLL is in bypass mode set bypass [expr ($value(0) & $PLL_CLK_BYPASS) >> 24 ] - puts [format "PLL bypass bit: %d" $bypass] + echo [format "PLL bypass bit: %d" $bypass] if {$bypass == 1} { - puts [format "Amba Clk is set to REFCLK: %d (MHz)" [expr $CFG_REFCLKFREQ/1000000]] + echo [format "Amba Clk is set to REFCLK: %d (MHz)" [expr $CFG_REFCLKFREQ/1000000]] } else { # nope, extract x,y,w and compute the PLL output freq. set x [expr ($value(0) & 0x0001F0000) >> 16] - puts [format "x: %d" $x] + echo [format "x: %d" $x] set y [expr ($value(0) & 0x00000007F)] - puts [format "y: %d" $y] + echo [format "y: %d" $y] set w [expr ($value(0) & 0x000000300) >> 8] - puts [format "w: %d" $w] - puts [format "Amba PLL Clk: %d (MHz)" [expr ($CFG_REFCLKFREQ * $y / (($w + 1) * ($x + 1) * 2))/1000000]] + echo [format "w: %d" $w] + echo [format "Amba PLL Clk: %d (MHz)" [expr ($CFG_REFCLKFREQ * $y / (($w + 1) * ($x + 1) * 2))/1000000]] } } @@ -154,10 +154,10 @@ proc setupAmbaClk {} { set x [config x_amba] set y [config y_amba] - puts [format "Setting Amba PLL to lock to %d MHz" [expr $CONFIG_SYS_HZ_CLOCK/1000000]] - #puts [format "setupAmbaClk: w= %d" $w] - #puts [format "setupAmbaClk: x= %d" $x] - #puts [format "setupAmbaClk: y= %d" $y] + echo [format "Setting Amba PLL to lock to %d MHz" [expr $CONFIG_SYS_HZ_CLOCK/1000000]] + #echo [format "setupAmbaClk: w= %d" $w] + #echo [format "setupAmbaClk: x= %d" $x] + #echo [format "setupAmbaClk: y= %d" $y] # set PLL into BYPASS mode using MUX mmw $CLKCORE_AHB_CLK_CNTRL $PLL_CLK_BYPASS 0x0 # do an internal PLL bypass @@ -176,7 +176,7 @@ proc setupAmbaClk {} { mmw $CLKCORE_AHB_CLK_CNTRL 0x0 0xFFFFFF mmw $CLKCORE_AHB_CLK_CNTRL [expr (($x << 16) + ($w << 8) + $y)] 0x0 # wait for PLL to lock - puts "Wating for Amba PLL to lock" + echo "Wating for Amba PLL to lock" while {[expr [mrw $CLKCORE_PLL_STATUS] & $AHBCLK_PLL_LOCK] == 0} { sleep 1 } # remove the internal PLL bypass mmw $CLKCORE_AHB_CLK_CNTRL 0x0 $AHB_PLL_BY_CTRL @@ -191,22 +191,22 @@ proc showArmClk {} { set CLKCORE_ARM_CLK_CNTRL [regs CLKCORE_ARM_CLK_CNTRL] set PLL_CLK_BYPASS [regs PLL_CLK_BYPASS] - puts [format "CLKCORE_ARM_CLK_CNTRL (0x%x): 0x%x" $CLKCORE_ARM_CLK_CNTRL [mrw $CLKCORE_ARM_CLK_CNTRL]] + echo [format "CLKCORE_ARM_CLK_CNTRL (0x%x): 0x%x" $CLKCORE_ARM_CLK_CNTRL [mrw $CLKCORE_ARM_CLK_CNTRL]] mem2array value 32 $CLKCORE_ARM_CLK_CNTRL 1 # see if the PLL is in bypass mode set bypass [expr ($value(0) & $PLL_CLK_BYPASS) >> 24 ] - puts [format "PLL bypass bit: %d" $bypass] + echo [format "PLL bypass bit: %d" $bypass] if {$bypass == 1} { - puts [format "Amba Clk is set to REFCLK: %d (MHz)" [expr $CFG_REFCLKFREQ/1000000]] + echo [format "Amba Clk is set to REFCLK: %d (MHz)" [expr $CFG_REFCLKFREQ/1000000]] } else { # nope, extract x,y,w and compute the PLL output freq. set x [expr ($value(0) & 0x0001F0000) >> 16] - puts [format "x: %d" $x] + echo [format "x: %d" $x] set y [expr ($value(0) & 0x00000007F)] - puts [format "y: %d" $y] + echo [format "y: %d" $y] set w [expr ($value(0) & 0x000000300) >> 8] - puts [format "w: %d" $w] - puts [format "Arm PLL Clk: %d (MHz)" [expr ($CFG_REFCLKFREQ * $y / (($w + 1) * ($x + 1) * 2))/1000000]] + echo [format "w: %d" $w] + echo [format "Arm PLL Clk: %d (MHz)" [expr ($CFG_REFCLKFREQ * $y / (($w + 1) * ($x + 1) * 2))/1000000]] } } @@ -228,10 +228,10 @@ proc setupArmClk {} { set x [config x_arm] set y [config y_arm] - puts [format "Setting Arm PLL to lock to %d MHz" [expr $CFG_ARM_CLOCK/1000000]] - #puts [format "setupArmClk: w= %d" $w] - #puts [format "setupArmaClk: x= %d" $x] - #puts [format "setupArmaClk: y= %d" $y] + echo [format "Setting Arm PLL to lock to %d MHz" [expr $CFG_ARM_CLOCK/1000000]] + #echo [format "setupArmClk: w= %d" $w] + #echo [format "setupArmaClk: x= %d" $x] + #echo [format "setupArmaClk: y= %d" $y] # set PLL into BYPASS mode using MUX mmw $CLKCORE_ARM_CLK_CNTRL $PLL_CLK_BYPASS 0x0 # do an internal PLL bypass @@ -250,7 +250,7 @@ proc setupArmClk {} { mmw $CLKCORE_ARM_CLK_CNTRL 0x0 0xFFFFFF mmw $CLKCORE_ARM_CLK_CNTRL [expr (($x << 16) + ($w << 8) + $y)] 0x0 # wait for PLL to lock - puts "Wating for Amba PLL to lock" + echo "Wating for Amba PLL to lock" while {[expr [mrw $CLKCORE_PLL_STATUS] & $FCLK_PLL_LOCK] == 0} { sleep 1 } # remove the internal PLL bypass mmw $CLKCORE_ARM_CLK_CNTRL 0x0 $ARM_PLL_BY_CTRL @@ -261,14 +261,14 @@ proc setupArmClk {} { proc setupPLL {} { - puts "PLLs setup" + echo "PLLs setup" setupAmbaClk setupArmClk } # converted from u-boot/cpu/arm1136/bsp100.c:SoC_mem_init() proc setupDDR2 {} { - puts "Configuring DDR2" + echo "Configuring DDR2" set MEMORY_BASE_ADDR [regs MEMORY_BASE_ADDR] set MEMORY_MAX_ADDR [regs MEMORY_MAX_ADDR] @@ -289,13 +289,13 @@ proc setupDDR2 {} { # ooma_board_detect returns DDR2 memory size set tmp [ooma_board_detect] if {$tmp == "128M"} { - puts "DDR2 size 128MB" + echo "DDR2 size 128MB" set ddr_size $DDR_SZ_128M } elseif {$tmp == "256M"} { - puts "DDR2 size 256MB" + echo "DDR2 size 256MB" set ddr_size $DDR_SZ_256M } else { - puts "Don't know how to handle this DDR2 size?" + echo "Don't know how to handle this DDR2 size?" } # Memory setup register @@ -313,7 +313,7 @@ proc setupDDR2 {} { } elseif {$tmp == "256M"} { configureDDR2regs_256M } else { - puts "Don't know how to configure DDR2 setup?" + echo "Don't know how to configure DDR2 setup?" } } @@ -344,47 +344,47 @@ proc showDDR2 {} { set DENALI_CTL_20_DATA [regs DENALI_CTL_20_DATA] set tmp [mr64bit $DENALI_CTL_00_DATA] - puts [format "DENALI_CTL_00_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_00_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_00_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_00_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_01_DATA] - puts [format "DENALI_CTL_01_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_01_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_01_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_01_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_02_DATA] - puts [format "DENALI_CTL_02_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_02_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_02_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_02_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_03_DATA] - puts [format "DENALI_CTL_03_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_03_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_03_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_03_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_04_DATA] - puts [format "DENALI_CTL_04_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_04_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_04_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_04_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_05_DATA] - puts [format "DENALI_CTL_05_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_05_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_05_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_05_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_06_DATA] - puts [format "DENALI_CTL_06_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_06_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_06_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_06_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_07_DATA] - puts [format "DENALI_CTL_07_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_07_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_07_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_07_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_08_DATA] - puts [format "DENALI_CTL_08_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_08_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_08_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_08_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_09_DATA] - puts [format "DENALI_CTL_09_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_09_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_09_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_09_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_10_DATA] - puts [format "DENALI_CTL_10_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_10_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_10_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_10_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_11_DATA] - puts [format "DENALI_CTL_11_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_11_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_11_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_11_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_12_DATA] - puts [format "DENALI_CTL_12_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_12_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_12_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_12_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_13_DATA] - puts [format "DENALI_CTL_13_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_13_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_13_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_13_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_14_DATA] - puts [format "DENALI_CTL_14_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_14_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_14_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_14_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_15_DATA] - puts [format "DENALI_CTL_15_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_15_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_15_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_15_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_16_DATA] - puts [format "DENALI_CTL_16_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_16_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_16_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_16_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_17_DATA] - puts [format "DENALI_CTL_17_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_17_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_17_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_17_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_18_DATA] - puts [format "DENALI_CTL_18_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_18_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_18_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_18_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_19_DATA] - puts [format "DENALI_CTL_19_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_19_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_19_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_19_DATA $tmp(1) $tmp(0)] set tmp [mr64bit $DENALI_CTL_20_DATA] - puts [format "DENALI_CTL_20_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_20_DATA $tmp(1) $tmp(0)] + echo [format "DENALI_CTL_20_DATA (0x%x): 0x%08x%08x" $DENALI_CTL_20_DATA $tmp(1) $tmp(0)] } @@ -462,7 +462,7 @@ proc initC100 {} { # DDR2 memory init setupDDR2 putsUART0 "C100 initialization complete.\n" - puts "C100 initialization complete." + echo "C100 initialization complete." } # show current state of watchdog timer @@ -471,9 +471,9 @@ proc showWatchdog {} { set TIMER_WDT_CONTROL [regs TIMER_WDT_CONTROL] set TIMER_WDT_CURRENT_COUNT [regs TIMER_WDT_CURRENT_COUNT] - puts [format "TIMER_WDT_HIGH_BOUND (0x%x): 0x%x" $TIMER_WDT_HIGH_BOUND [mrw $TIMER_WDT_HIGH_BOUND]] - puts [format "TIMER_WDT_CONTROL (0x%x): 0x%x" $TIMER_WDT_CONTROL [mrw $TIMER_WDT_CONTROL]] - puts [format "TIMER_WDT_CURRENT_COUNT (0x%x): 0x%x" $TIMER_WDT_CURRENT_COUNT [mrw $TIMER_WDT_CURRENT_COUNT]] + echo [format "TIMER_WDT_HIGH_BOUND (0x%x): 0x%x" $TIMER_WDT_HIGH_BOUND [mrw $TIMER_WDT_HIGH_BOUND]] + echo [format "TIMER_WDT_CONTROL (0x%x): 0x%x" $TIMER_WDT_CONTROL [mrw $TIMER_WDT_CONTROL]] + echo [format "TIMER_WDT_CURRENT_COUNT (0x%x): 0x%x" $TIMER_WDT_CURRENT_COUNT [mrw $TIMER_WDT_CURRENT_COUNT]] } # converted from u-boot/cpu/arm1136/comcerto/intrrupts.c:void reset_cpu (ulong ignored) @@ -490,17 +490,17 @@ proc reboot {} { # I don't want to miss the high_bound==curr_count condition mww $TIMER_WDT_HIGH_BOUND 0xffffff mww $TIMER_WDT_CURRENT_COUNT 0x0 - puts "JTAG speed lowered to 100kHz" + echo "JTAG speed lowered to 100kHz" adapter_khz 100 mww $TIMER_WDT_CONTROL 0x1 # wait until the reset - puts -nonewline "Wating for watchdog to trigger..." + echo -n "Wating for watchdog to trigger..." #while {[mrw $TIMER_WDT_CONTROL] == 1} { - # puts [format "TIMER_WDT_CURRENT_COUNT (0x%x): 0x%x" $TIMER_WDT_CURRENT_COUNT [mrw $TIMER_WDT_CURRENT_COUNT]] + # echo [format "TIMER_WDT_CURRENT_COUNT (0x%x): 0x%x" $TIMER_WDT_CURRENT_COUNT [mrw $TIMER_WDT_CURRENT_COUNT]] # sleep 1 # #} while {[c100.cpu curstate] != "running"} { sleep 1} - puts "done." - puts [format "Note that C100 is in %s state, type halt to stop" [c100.cpu curstate]] + echo "done." + echo [format "Note that C100 is in %s state, type halt to stop" [c100.cpu curstate]] } diff --git a/tcl/target/c100regs.tcl b/tcl/target/c100regs.tcl index 56f077153..a2c7a60d0 100644 --- a/tcl/target/c100regs.tcl +++ b/tcl/target/c100regs.tcl @@ -11,7 +11,7 @@ proc regs {reg} { } proc showreg {reg} { - puts [format "0x%x" [dict get [regsC100] $reg ]] + echo [format "0x%x" [dict get [regsC100] $reg ]] } proc regsC100 {} { diff --git a/tcl/target/imx31.cfg b/tcl/target/imx31.cfg index 3af6383ce..b9eddd065 100644 --- a/tcl/target/imx31.cfg +++ b/tcl/target/imx31.cfg @@ -60,8 +60,8 @@ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -proc power_restore {} { puts "Sensed power restore. No action." } -proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." } +proc power_restore {} { echo "Sensed power restore. No action." } +proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." } # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode etm config $_TARGETNAME 16 normal full etb diff --git a/tcl/target/imx35.cfg b/tcl/target/imx35.cfg index 30cb3863b..8a6aa8702 100644 --- a/tcl/target/imx35.cfg +++ b/tcl/target/imx35.cfg @@ -47,8 +47,8 @@ jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_ set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME -proc power_restore {} { puts "Sensed power restore. No action." } -proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." } +proc power_restore {} { echo "Sensed power restore. No action." } +proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." } # trace setup ... NOTE, "normal full" mode fudges the real ETMv3.1 mode etm config $_TARGETNAME 16 normal full etb diff --git a/tcl/target/lpc3250.cfg b/tcl/target/lpc3250.cfg index e902fb419..d64e15f16 100644 --- a/tcl/target/lpc3250.cfg +++ b/tcl/target/lpc3250.cfg @@ -32,5 +32,5 @@ jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME arm926ejs -endian little -chain-position $_TARGETNAME -work-area-phys 0x00000000 -work-area-size 0x7d0000 -work-area-backup 0 -proc power_restore {} { puts "Sensed power restore. No action." } -proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." } +proc power_restore {} { echo "Sensed power restore. No action." } +proc srst_deasserted {} { echo "Sensed nSRST deasserted. No action." } diff --git a/tcl/test/selftest.cfg b/tcl/test/selftest.cfg index 912d1c08e..be420ca0c 100755 --- a/tcl/test/selftest.cfg +++ b/tcl/test/selftest.cfg @@ -8,7 +8,7 @@ proc selftest {tmpfile address size} { } for {set i 0} {$i < 10 } {set i [expr $i+1]} { - puts "Test iteration $i" + echo "Test iteration $i" dump_image $tmpfile $address $size verify_image $tmpfile $address bin load_image $tmpfile $address bin -- 2.11.4.GIT