src/flash/nand/nuc910.c

   1 /***************************************************************************
   2  *   Copyright (C) 2010 by Spencer Oliver                                  *
   3  *   spen@spen-soft.co.uk                                                  *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  19  ***************************************************************************/
  20
  21 /*
  22  * NAND controller interface for Nuvoton NUC910
  23  */
  24
  25 #ifdef HAVE_CONFIG_H
  26 #include "config.h"
  27 #endif
  28
  29 #include "imp.h"
  30 #include "nuc910.h"
  31 #include "arm_io.h"
  32 #include <target/arm.h>
  33
  34 struct nuc910_nand_controller
  35 {
  36         struct target *target;
  37         struct arm_nand_data io;
  38 };
  39
  40 static int validate_target_state(struct nand_device *nand)
  41 {
  42         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
  43         struct target *target = nuc910_nand->target;
  44
  45         if (target->state != TARGET_HALTED) {
  46                 LOG_ERROR("Target not halted");
  47                 return ERROR_NAND_OPERATION_FAILED;
  48         }
  49
  50         return ERROR_OK;
  51 }
  52
  53 static int nuc910_nand_command(struct nand_device *nand, uint8_t command)
  54 {
  55         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
  56         struct target *target = nuc910_nand->target;
  57         int result;
  58
  59         if ((result = validate_target_state(nand)) != ERROR_OK)
  60                 return result;
  61
  62         target_write_u8(target, NUC910_SMCMD, command);
  63         return ERROR_OK;
  64 }
  65
  66 static int nuc910_nand_address(struct nand_device *nand, uint8_t address)
  67 {
  68         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
  69         struct target *target = nuc910_nand->target;
  70         int result;
  71
  72         if ((result = validate_target_state(nand)) != ERROR_OK)
  73                 return result;
  74
  75         target_write_u32(target, NUC910_SMADDR, ((address & 0xff) | NUC910_SMADDR_EOA));
  76         return ERROR_OK;
  77 }
  78
  79 static int nuc910_nand_read(struct nand_device *nand, void *data)
  80 {
  81         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
  82         struct target *target = nuc910_nand->target;
  83         int result;
  84
  85         if ((result = validate_target_state(nand)) != ERROR_OK)
  86                 return result;
  87
  88         target_read_u8(target, NUC910_SMDATA, data);
  89         return ERROR_OK;
  90 }
  91
  92 static int nuc910_nand_write(struct nand_device *nand, uint16_t data)
  93 {
  94         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
  95         struct target *target = nuc910_nand->target;
  96         int result;
  97
  98         if ((result = validate_target_state(nand)) != ERROR_OK)
  99                 return result;
 100
 101         target_write_u8(target, NUC910_SMDATA, data);
 102         return ERROR_OK;
 103 }
 104
 105 static int nuc910_nand_read_block_data(struct nand_device *nand,
 106                 uint8_t *data, int data_size)
 107 {
 108         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
 109         int result;
 110
 111         if ((result = validate_target_state(nand)) != ERROR_OK)
 112                 return result;
 113
 114         nuc910_nand->io.chunk_size = nand->page_size;
 115
 116         /* try the fast way first */
 117         result = arm_nandread(&nuc910_nand->io, data, data_size);
 118         if (result != ERROR_NAND_NO_BUFFER)
 119                 return result;
 120
 121         /* else do it slowly */
 122         while (data_size--)
 123                 nuc910_nand_read(nand, data++);
 124
 125         return ERROR_OK;
 126 }
 127
 128 static int nuc910_nand_write_block_data(struct nand_device *nand,
 129                 uint8_t *data, int data_size)
 130 {
 131         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
 132         int result;
 133
 134         if ((result = validate_target_state(nand)) != ERROR_OK)
 135                 return result;
 136
 137         nuc910_nand->io.chunk_size = nand->page_size;
 138
 139         /* try the fast way first */
 140         result = arm_nandwrite(&nuc910_nand->io, data, data_size);
 141         if (result != ERROR_NAND_NO_BUFFER)
 142                 return result;
 143
 144         /* else do it slowly */
 145         while (data_size--)
 146                 nuc910_nand_write(nand, *data++);
 147
 148         return ERROR_OK;
 149 }
 150
 151 static int nuc910_nand_reset(struct nand_device *nand)
 152 {
 153         return nuc910_nand_command(nand, NAND_CMD_RESET);
 154 }
 155
 156 static int nuc910_nand_ready(struct nand_device *nand, int timeout)
 157 {
 158         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
 159         struct target *target = nuc910_nand->target;
 160         uint32_t status;
 161
 162         do {
 163                 target_read_u32(target, NUC910_SMISR, &status);
 164                 if (status & NUC910_SMISR_RB_) {
 165                         return 1;
 166                 }
 167                 alive_sleep(1);
 168         } while (timeout-- > 0);
 169
 170         return 0;
 171 }
 172
 173 NAND_DEVICE_COMMAND_HANDLER(nuc910_nand_device_command)
 174 {
 175         struct nuc910_nand_controller *nuc910_nand;
 176
 177         nuc910_nand = calloc(1, sizeof(struct nuc910_nand_controller));
 178         if (!nuc910_nand) {
 179                 LOG_ERROR("no memory for nand controller\n");
 180                 return ERROR_NAND_DEVICE_INVALID;
 181         }
 182
 183         nand->controller_priv = nuc910_nand;
 184         nuc910_nand->target = get_target(CMD_ARGV[1]);
 185         if (!nuc910_nand->target) {
 186                 LOG_ERROR("target '%s' not defined", CMD_ARGV[1]);
 187                 free(nuc910_nand);
 188                 return ERROR_NAND_DEVICE_INVALID;
 189         }
 190
 191         return ERROR_OK;
 192 }
 193
 194 static int nuc910_nand_init(struct nand_device *nand)
 195 {
 196         struct nuc910_nand_controller *nuc910_nand = nand->controller_priv;
 197         struct target *target = nuc910_nand->target;
 198         int bus_width = nand->bus_width ? : 8;
 199         int result;
 200
 201         if ((result = validate_target_state(nand)) != ERROR_OK)
 202                 return result;
 203
 204         /* nuc910 only supports 8bit */
 205         if (bus_width != 8)
 206         {
 207                 LOG_ERROR("nuc910 only supports 8 bit bus width, not %i", bus_width);
 208                 return ERROR_NAND_OPERATION_NOT_SUPPORTED;
 209         }
 210
 211         /* inform calling code about selected bus width */
 212         nand->bus_width = bus_width;
 213
 214         nuc910_nand->io.target = target;
 215         nuc910_nand->io.data = NUC910_SMDATA;
 216         nuc910_nand->io.op = ARM_NAND_NONE;
 217
 218         /* configure nand controller */
 219         target_write_u32(target, NUC910_FMICSR, NUC910_FMICSR_SM_EN);
 220         target_write_u32(target, NUC910_SMCSR, 0x010000a8);     /* 2048 page size */
 221         target_write_u32(target, NUC910_SMTCR, 0x00010204);
 222         target_write_u32(target, NUC910_SMIER, 0x00000000);
 223
 224         return ERROR_OK;
 225 }
 226
 227 struct nand_flash_controller nuc910_nand_controller =
 228 {
 229         .name = "nuc910",
 230         .command = nuc910_nand_command,
 231         .address = nuc910_nand_address,
 232         .read_data = nuc910_nand_read,
 233         .write_data     = nuc910_nand_write,
 234         .write_block_data = nuc910_nand_write_block_data,
 235         .read_block_data = nuc910_nand_read_block_data,
 236         .nand_ready = nuc910_nand_ready,
 237         .reset = nuc910_nand_reset,
 238         .nand_device_command = nuc910_nand_device_command,
 239         .init = nuc910_nand_init,
 240 };