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flash/fespi: Use COMMAND_PARSE_ADDRESS
2019-04-24 Tim Newsomeflash/fespi: Use COMMAND_PARSE_ADDRESS
Signed-off-by: Tim Newsome <tim@sifive.com>
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2019-03-27 Tim NewsomeLots of RISC-V improvements.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2019-03-08 Tim Newsomeflash/nor: use target_addr_t for flash bank base
Signed-off-by: Tim Newsome <tim@sifive.com>
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2019-03-08 Tim Newsomegdb_server, target: Add target_address_bits()
Signed-off-by: Tim Newsome <tim@sifive.com>
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2019-01-11 Tim NewsomeAdd flash support for SiFive's Freedom E platforms
Signed-off-by: Tim Newsome <tim@sifive.com>
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2018-09-25 Tim NewsomeClarify what exactly the RISC-V code supports.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2018-08-08 Tim NewsomeAdd detail to `wrong register size` error.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2018-07-24 Tim NewsomeAdd RISC-V support.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2018-07-23 Tim NewsomeRemove FSF mailing address.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2018-04-07 Tim NewsomeAdd gdb_report_register_access_error command
Signed-off-by: Tim Newsome <tim@sifive.com>
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2018-01-25 Tim NewsomeAdd read buffer to bitbang, improving performance.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2018-01-13 Tim NewsomeAccept 64-bit addresses in CRC requests.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2018-01-13 Tim NewsomeSupport listening on port 0.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2017-10-18 Tim NewsomeDifferentiate "target not halted" messages.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2017-10-18 Tim NewsomeDocument `struct reg` fields.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2017-10-03 Tim NewsomeFix typo in comment.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2016-11-04 Tim NewsomeMake OpenOCD build using -Og.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2016-10-30 Tim NewsomePerform small writes before sending OK.
Signed-off-by: Tim Newsome <tim@sifive.com>
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2016-05-21 Tim NewsomeFix comment that limits num_bits to 32.
Signed-off-by: Tim Newsome <tim@sifive.com>
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