From d20304b3fb0f27f62844144837ee5b99ee040bcd Mon Sep 17 00:00:00 2001 From: Artemiy Volkov Date: Thu, 6 Jul 2023 13:25:00 +0200 Subject: [PATCH] target/arc: do not invalidate icache when (un)setting breakpoints Currently, instruction cache is being invalidated in arc_{un,}set_breakpoint() regardless of whether the breakpoint's type is HW or SW. For SW breakpoints, this has no net effect as the caches are flushed as a by-product of overwriting instructions in main memory and is thus merely unnecessary; but for HW breakpoints this invalidation is not preceded by a flush and might lead to loss of data. This patch removes the invalidate() call altogether to correct this undesired behavior for HW breakpoints. With this patch applied, all supported HW breakpoint tests from the gdb testsuite are now passing with the arc-openocd backend. Change-Id: I3d252b97f01f1a1e2bf0eb8fb257bdab0c544bc2 Signed-off-by: Artemiy Volkov Reviewed-on: https://review.openocd.org/c/openocd/+/7767 Tested-by: jenkins Reviewed-by: Evgeniy Didin Reviewed-by: Antonio Borneo --- src/target/arc.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/src/target/arc.c b/src/target/arc.c index 2ca6be16d..45005b29b 100644 --- a/src/target/arc.c +++ b/src/target/arc.c @@ -1573,9 +1573,6 @@ static int arc_set_breakpoint(struct target *target, return ERROR_FAIL; } - /* core instruction cache is now invalid. */ - CHECK_RETVAL(arc_cache_invalidate(target)); - return ERROR_OK; } @@ -1658,9 +1655,6 @@ static int arc_unset_breakpoint(struct target *target, return ERROR_FAIL; } - /* core instruction cache is now invalid. */ - CHECK_RETVAL(arc_cache_invalidate(target)); - return retval; } -- 2.11.4.GIT