From 9847a692a7a937555bc4e66e5e1d5205165b57bc Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Tue, 10 Nov 2020 13:49:13 +0100 Subject: [PATCH] stlink: reorder the flag macro by firmware release The corresponding bit for each macro is changed, but this is not relevant in the code. Change-Id: I7039464f5a3d55d008208f44952aadeb815bd5a3 Signed-off-by: Antonio Borneo Reviewed-on: http://openocd.zylin.com/6212 Tested-by: jenkins --- src/jtag/drivers/stlink_usb.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/jtag/drivers/stlink_usb.c b/src/jtag/drivers/stlink_usb.c index 1a1963425..7e3280b20 100644 --- a/src/jtag/drivers/stlink_usb.c +++ b/src/jtag/drivers/stlink_usb.c @@ -413,17 +413,17 @@ static inline int stlink_usb_xfer_noerrcheck(void *handle, const uint8_t *buf, i * Map the relevant features, quirks and workaround for specific firmware * version of stlink */ -#define STLINK_F_HAS_TRACE BIT(0) /* v2>=j13 || v3 */ -#define STLINK_F_HAS_SWD_SET_FREQ BIT(1) /* v2>=j22 */ -#define STLINK_F_HAS_JTAG_SET_FREQ BIT(2) /* v2>=j24 */ -#define STLINK_F_HAS_MEM_16BIT BIT(3) /* v2>=j26 || v3 */ -#define STLINK_F_HAS_GETLASTRWSTATUS2 BIT(4) /* v2>=j15 || v3 */ -#define STLINK_F_HAS_DAP_REG BIT(5) /* v2>=j24 || v3 */ -#define STLINK_F_QUIRK_JTAG_DP_READ BIT(6) /* v2>=j24 && v2=j28 || v3 */ -#define STLINK_F_HAS_DPBANKSEL BIT(8) /* v2>=j32 || v3>=j2 */ -#define STLINK_F_HAS_RW8_512BYTES BIT(9) /* v3>=j6 */ -#define STLINK_F_FIX_CLOSE_AP BIT(10) /* v2>=j29 || v3 */ +#define STLINK_F_HAS_TRACE BIT(0) /* v2>=j13 || v3 */ +#define STLINK_F_HAS_GETLASTRWSTATUS2 BIT(1) /* v2>=j15 || v3 */ +#define STLINK_F_HAS_SWD_SET_FREQ BIT(2) /* v2>=j22 */ +#define STLINK_F_HAS_JTAG_SET_FREQ BIT(3) /* v2>=j24 */ +#define STLINK_F_QUIRK_JTAG_DP_READ BIT(4) /* v2>=j24 && v2=j24 || v3 */ +#define STLINK_F_HAS_MEM_16BIT BIT(6) /* v2>=j26 || v3 */ +#define STLINK_F_HAS_AP_INIT BIT(7) /* v2>=j28 || v3 */ +#define STLINK_F_FIX_CLOSE_AP BIT(8) /* v2>=j29 || v3 */ +#define STLINK_F_HAS_DPBANKSEL BIT(9) /* v2>=j32 || v3>=j2 */ +#define STLINK_F_HAS_RW8_512BYTES BIT(10) /* v3>=j6 */ /* aliases */ #define STLINK_F_HAS_TARGET_VOLT STLINK_F_HAS_TRACE -- 2.11.4.GIT