aarch64: use correct A64 instructions for cache handling
commite8602889f9a9fce35eecc8109865fd9ae6d4d05e
authorMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 16 Sep 2016 13:31:29 +0000 (16 15:31 +0200)
committerMatthias Welwarsky <matthias.welwarsky@sysgo.com>
Fri, 10 Feb 2017 13:01:39 +0000 (10 14:01 +0100)
treed81e181b711288b75162776f9d176430a6017182
parent6c096b2234b13033e7705b6148a74ed0c1923312
aarch64: use correct A64 instructions for cache handling

Replace A32 MCR with proper A64 MSR opcodes

Change-Id: I64a60b17a58a26b199d2d1b2d5d91098e0c8cbd0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
src/target/aarch64.c
src/target/armv8.c