target/armv7m: rework Cortex-M register handling part 3
commitd3a37b0e76ece5625db74b4f343ebcc90059657f
authorTomas Vanek <vanekt@fbl.cz>
Wed, 14 Oct 2020 18:23:50 +0000 (14 20:23 +0200)
committerAntonio Borneo <borneo.antonio@gmail.com>
Sun, 15 Nov 2020 21:06:23 +0000 (15 21:06 +0000)
tree443b6651d73d85cd549b761a8dc8a48d4bbd8a62
parente4160bd42216d5e717822162e1dad83b1b7003a1
target/armv7m: rework Cortex-M register handling part 3

Move primask/basepri/faultmask/control packing/unpacking from
cortex_m.c and hla_target.c to armv7m.c armv7m_read_core_reg()
and armv7m_write_core_reg() where also the FP 32/64-bit registers
conversion takes place.

Introduce a new hidden register ARMV7M_PMSK_BPRI_FLTMSK_CTRL
for packing/unpacking of special registers in the register cache.

The new packing/unpacking is endianess safe.

While on it improve returned error codes and LOG_ messages.

Just minimal changes in cortex_m.c and hla_target.c, will be
consolidated in the next patch.

Change-Id: Id51e764e243e54b5fdaadf2a202eee7c4bc729fe
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/5863
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/target/armv7m.c
src/target/armv7m.h
src/target/cortex_m.c
src/target/hla_target.c