target/riscv: revive 'riscv resume_order'
commit49c40a75292b1f76fa0d4bad91c993d9f7a618cf
authorTim Newsome <tim@sifive.com>
Thu, 16 Dec 2021 11:54:35 +0000 (16 12:54 +0100)
committerAntonio Borneo <borneo.antonio@gmail.com>
Mon, 14 Feb 2022 15:10:56 +0000 (14 15:10 +0000)
tree767aa982710ad84c17a58d974e84809d0ea5fe55
parenta11fe473eaee235a51dba7900c08cc7629ed2794
target/riscv: revive 'riscv resume_order'

This functionality was lost in [1], which was merged as commit
615709d14049 ("Upstream a whole host of RISC-V changes.").
Now it works as expected again.

Add convenience macro foreach_smp_target_direction().

Link: [1] https://github.com/riscv/riscv-openocd/pull/567
Change-Id: I1545fa6b45b8a07e27c8ff9dcdcfa2fc4f950cd1
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6785
Tested-by: jenkins
src/target/riscv/riscv.c
src/target/smp.h