| commit | 2830008be0f782f22e09f6ecd1764e168560de40 | |
| author | Omair Javaid <omair.javaid@linaro.org> | |
| Mon, 5 Mar 2018 11:25:21 +0000 (5 16:25 +0500) | ||
| committer | Matthias Welwarsky <matthias@welwarsky.de> | |
| Sat, 10 Mar 2018 13:24:13 +0000 (10 13:24 +0000) | ||
| tree | c893086be3f244da7c1d97743a3bd10c43b4ee87 | treesnapshot (tar.gz zip) |
| parent | a48264414e53d99ffe69df0687abf1effb13be22 | commitdiff |
Support for AArch32 SIMD/Floating-point registers
This patch adds support for read/write of SIMD and floating-point register in AArch32 mode.
This patch is tested using Raspberry Pi3 halted in AArch32 mode with FP/SIMD enabled.
Software need to make sure floating-point and SIMD unit is enabled.
Change-Id: I2b3b8af02257c6420e5a70c6f4c91f839c1f5ee5
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4446
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This patch adds support for read/write of SIMD and floating-point register in AArch32 mode.
This patch is tested using Raspberry Pi3 halted in AArch32 mode with FP/SIMD enabled.
Software need to make sure floating-point and SIMD unit is enabled.
Change-Id: I2b3b8af02257c6420e5a70c6f4c91f839c1f5ee5
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/4446
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
| src/target/armv8.c | diffblobblamehistory |