1 # script for stm32f1x family
4 # stm32 devices support both JTAG and SWD transports.
6 source [find target/swj-dp.tcl]
8 if { [info exists CHIPNAME] } {
9 set _CHIPNAME $CHIPNAME
11 set _CHIPNAME stm32f1x
14 if { [info exists ENDIAN] } {
20 # Work-area is a space in RAM used for flash programming
21 # By default use 4kB (as found on some STM32F100s)
22 if { [info exists WORKAREASIZE] } {
23 set _WORKAREASIZE $WORKAREASIZE
25 set _WORKAREASIZE 0x1000
29 if { [info exists CPUTAPID] } {
30 set _CPUTAPID $CPUTAPID
32 # See STM Document RM0008
34 set _CPUTAPID 0x3ba00477
37 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
39 if { [info exists BSTAPID] } {
40 # FIXME this never gets used to override defaults...
43 # See STM Document RM0008
45 # Low density devices, Rev A
46 set _BSTAPID1 0x06412041
47 # Medium density devices, Rev A
48 set _BSTAPID2 0x06410041
49 # Medium density devices, Rev B and Rev Z
50 set _BSTAPID3 0x16410041
51 set _BSTAPID4 0x06420041
52 # High density devices, Rev A
53 set _BSTAPID5 0x06414041
54 # Connectivity line devices, Rev A and Rev Z
55 set _BSTAPID6 0x06418041
56 # XL line devices, Rev A
57 set _BSTAPID7 0x06430041
58 # VL line devices, Rev A and Z In medium-density and high-density value line devices
59 set _BSTAPID8 0x06420041
60 # VL line devices, Rev A
61 set _BSTAPID9 0x06428041
65 jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
66 -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
67 -expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
68 -expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
69 -expected-id $_BSTAPID8 -expected-id $_BSTAPID9
72 set _TARGETNAME $_CHIPNAME.cpu
73 target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
75 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
77 # flash size will be probed
78 set _FLASHNAME $_CHIPNAME.flash
79 flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
81 # JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
84 adapter_nsrst_delay 100
89 # if srst is not fitted use SYSRESETREQ to
90 # perform a soft reset
91 cortex_m reset_config sysresetreq