From f2a2996ee2960cd5efb5c424df3df7a587ef3988 Mon Sep 17 00:00:00 2001 From: ktkachov Date: Fri, 20 Apr 2018 16:31:19 +0000 Subject: [PATCH] PR testsuite/85483: Move aarch64/sve/vcond_1.c test to g++.dg/other/ I totally botched up this sve test file in 259437. It needs C++, so move it to g++.dg/other and make it a .C file. Also adds the target guards to prevent it from running on non-aarch64 targets. Tested that it passes on aarch64-none-elf and doesn't get run on arm-none-eabi. Committing to trunk as obvious. PR testsuite/85483 * gcc.target/aarch64/sve/vcond_1.c: Move to... * g++.dg/other/sve_vcond_1.C: ... Here. Add target directives. * gcc.target/aarch64/sve/vcond_1_run.c: Move to... * g++.dg/other/sve_vcond_1_run.C: ... Here. Change include file name. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@259526 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/testsuite/ChangeLog | 8 ++++++++ .../aarch64/sve/vcond_1.c => g++.dg/other/sve_vcond_1.C} | 4 ++-- .../aarch64/sve/vcond_1_run.c => g++.dg/other/sve_vcond_1_run.C} | 2 +- 3 files changed, 11 insertions(+), 3 deletions(-) rename gcc/testsuite/{gcc.target/aarch64/sve/vcond_1.c => g++.dg/other/sve_vcond_1.C} (98%) rename gcc/testsuite/{gcc.target/aarch64/sve/vcond_1_run.c => g++.dg/other/sve_vcond_1_run.C} (97%) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8e978764713..4bc930152b8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2018-04-20 Kyrylo Tkachov + + PR testsuite/85483 + * gcc.target/aarch64/sve/vcond_1.c: Move to... + * g++.dg/other/sve_vcond_1.C: ... Here. Add target directives. + * gcc.target/aarch64/sve/vcond_1_run.c: Move to... + * g++.dg/other/sve_vcond_1_run.C: ... Here. Change include file name. + 2018-04-20 H.J. Lu PR target/85469 diff --git a/gcc/testsuite/gcc.target/aarch64/sve/vcond_1.c b/gcc/testsuite/g++.dg/other/sve_vcond_1.C similarity index 98% rename from gcc/testsuite/gcc.target/aarch64/sve/vcond_1.c rename to gcc/testsuite/g++.dg/other/sve_vcond_1.C index 66208425e2e..c1ad0b91b0c 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/vcond_1.c +++ b/gcc/testsuite/g++.dg/other/sve_vcond_1.C @@ -1,5 +1,5 @@ -/* { dg-do assemble { target aarch64_asm_sve_ok } } */ -/* { dg-options "-O -msve-vector-bits=256 --save-temps" } */ +/* { dg-do assemble { target { aarch64_asm_sve_ok && { ! ilp32 } } } } */ +/* { dg-options "-march=armv8.2-a+sve -O -msve-vector-bits=256 --save-temps" } */ typedef __INT8_TYPE__ vnx16qi __attribute__((vector_size(32))); typedef __INT16_TYPE__ vnx8hi __attribute__((vector_size(32))); diff --git a/gcc/testsuite/gcc.target/aarch64/sve/vcond_1_run.c b/gcc/testsuite/g++.dg/other/sve_vcond_1_run.C similarity index 97% rename from gcc/testsuite/gcc.target/aarch64/sve/vcond_1_run.c rename to gcc/testsuite/g++.dg/other/sve_vcond_1_run.C index 72dab3942a9..d01745e6864 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/vcond_1_run.c +++ b/gcc/testsuite/g++.dg/other/sve_vcond_1_run.C @@ -2,7 +2,7 @@ /* { dg-options "-O" } */ /* { dg-options "-O -msve-vector-bits=256" { target aarch64_sve256_hw } } */ -#include "vcond_1.c" +#include "sve_vcond_1.c" #define NUM_ELEMS(X) (sizeof (X) / sizeof (X[0])) -- 2.11.4.GIT