From e333f91547dea24e624581c6baba999c90261512 Mon Sep 17 00:00:00 2001
From: rsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Tue, 6 Mar 2007 08:59:20 +0000
Subject: [PATCH] gcc/ 	* config/m68k/m68k.md (movsf_cf_soft): Provide the
 same non-mov3q 	alternatives as movsi_cf. 	(movsf_cf_hard): Add
 commentary.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122606 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog           | 6 ++++++
 gcc/config/m68k/m68k.md | 6 ++++--
 2 files changed, 10 insertions(+), 2 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cd09c8d84b3..00385a640ca 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2007-03-06  Richard Sandiford  <richard@codesourcery.com>
+
+	* config/m68k/m68k.md (movsf_cf_soft): Provide the same non-mov3q
+	alternatives as movsi_cf.
+	(movsf_cf_hard): Add commentary.
+
 2007-03-06  Kazu Hirata  <kazu@codesourcery.com>
 	    Richard Sandiford  <richard@codesourcery.com>
 
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 4c0878a1df2..40c80721b09 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -860,13 +860,15 @@
 })
 
 (define_insn "movsf_cf_soft"
-  [(set (match_operand:SF 0 "nonimmediate_operand" "=r,g")
-	(match_operand:SF 1 "general_operand" "g,r"))]
+  [(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>,g,U")
+	(match_operand:SF 1 "general_operand" "g,r<Q>,U"))]
   "TARGET_COLDFIRE && !TARGET_COLDFIRE_FPU"
 {
   return "move%.l %1,%0";
 })
 
+;; SFmode MEMs are restricted to modes 2-4 if TARGET_COLDFIRE_FPU.
+;; The move instructions can handle all combinations.
 (define_insn "movsf_cf_hard"
   [(set (match_operand:SF 0 "nonimmediate_operand" "=r<Q>U, f,    f,mr,f,r<Q>,f
 ,m")
-- 
2.11.4.GIT