From df3032ff3bcae4211febbed142cc280ac21be2d2 Mon Sep 17 00:00:00 2001 From: olegendo Date: Wed, 18 Jul 2012 07:49:50 +0000 Subject: [PATCH] PR target/33135 * config/sh/sh.opt (mieee): Use Var instead of Mask. Correct description. * config/sh/sh.c (sh_option_override): Do not change flag_finite_math_only. Set TARGET_IEEE to complement of flag_finite_math_only. * doc/invoke.texi (SH options): Add mno-ieee. Correct description of mieee and mno-ieee behavior. PR target/33135 * gcc.target/sh/pr33135-1.c: New. * gcc.target/sh/pr33135-2.c: New. * gcc.target/sh/pr33135-3.c: New. * gcc.target/sh/pr33135-4.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@189602 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 11 +++++++++++ gcc/config/sh/sh.c | 10 +++++----- gcc/config/sh/sh.opt | 4 ++-- gcc/doc/invoke.texi | 18 ++++++++++-------- gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gcc.target/sh/pr33135-1.c | 32 ++++++++++++++++++++++++++++++++ gcc/testsuite/gcc.target/sh/pr33135-2.c | 32 ++++++++++++++++++++++++++++++++ gcc/testsuite/gcc.target/sh/pr33135-3.c | 32 ++++++++++++++++++++++++++++++++ gcc/testsuite/gcc.target/sh/pr33135-4.c | 32 ++++++++++++++++++++++++++++++++ 9 files changed, 164 insertions(+), 15 deletions(-) create mode 100644 gcc/testsuite/gcc.target/sh/pr33135-1.c create mode 100644 gcc/testsuite/gcc.target/sh/pr33135-2.c create mode 100644 gcc/testsuite/gcc.target/sh/pr33135-3.c create mode 100644 gcc/testsuite/gcc.target/sh/pr33135-4.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c080dfe1092..45078578783 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2012-07-18 Oleg Endo + + PR target/33135 + * config/sh/sh.opt (mieee): Use Var instead of Mask. Correct + description. + * config/sh/sh.c (sh_option_override): Do not change + flag_finite_math_only. Set TARGET_IEEE to complement of + flag_finite_math_only. + * doc/invoke.texi (SH options): Add mno-ieee. Correct description + of mieee and mno-ieee behavior. + 2012-07-18 Steven Bosscher * graphite-poly.c (print_pbb_body): Fixup dump_bb call. diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 72043a06f8d..df39858e66b 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -599,11 +599,6 @@ sh_option_override (void) SUBTARGET_OVERRIDE_OPTIONS; if (optimize > 1 && !optimize_size) target_flags |= MASK_SAVE_ALL_TARGET_REGS; - if (flag_finite_math_only == 2) - flag_finite_math_only - = !flag_signaling_nans && TARGET_SH2E && ! TARGET_IEEE; - if (TARGET_SH2E && !flag_finite_math_only) - target_flags |= MASK_IEEE; sh_cpu = PROCESSOR_SH1; assembler_dialect = 0; if (TARGET_SH2) @@ -889,6 +884,11 @@ sh_option_override (void) && flag_unsafe_math_optimizations && flag_finite_math_only; + /* If the -mieee option was not explicitly set by the user, turn it on + unless -ffinite-math-only was specified. See also PR 33135. */ + if (! global_options_set.x_TARGET_IEEE) + TARGET_IEEE = ! flag_finite_math_only; + if (sh_fixed_range_str) sh_fix_range (sh_fixed_range_str); diff --git a/gcc/config/sh/sh.opt b/gcc/config/sh/sh.opt index 76e66e28899..fabf9b5b932 100644 --- a/gcc/config/sh/sh.opt +++ b/gcc/config/sh/sh.opt @@ -266,8 +266,8 @@ Target Report RejectNegative Mask(HITACHI) Follow Renesas (formerly Hitachi) / SuperH calling conventions mieee -Target Report Mask(IEEE) -Increase the IEEE compliance for floating-point code +Target Var(TARGET_IEEE) +Increase the IEEE compliance for floating-point comparisons mindexed-addressing Target Report Mask(ALLOW_INDEXED_ADDRESS) Condition(SUPPORT_ANY_SH5_32MEDIA) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ca313bea9f1..1207f85127c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -881,8 +881,8 @@ See RS/6000 and PowerPC Options. -m5-compact -m5-compact-nofpu @gol -mb -ml -mdalign -mrelax @gol -mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol --mieee -mbitops -misize -minline-ic_invalidate -mpadstruct -mspace @gol --mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol +-mieee -mno-ieee -mbitops -misize -minline-ic_invalidate -mpadstruct @gol +-mspace -mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol -mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol -maccumulate-outgoing-args -minvalid-symbols -msoft-atomic -mhard-atomic @gol @@ -18099,13 +18099,15 @@ Mark the @code{MAC} register as call-clobbered, even if @option{-mhitachi} is given. @item -mieee +@item -mno-ieee @opindex mieee -Increase IEEE compliance of floating-point code. -At the moment, this is equivalent to @option{-fno-finite-math-only}. -When generating 16-bit SH opcodes, getting IEEE-conforming results for -comparisons of NANs / infinities incurs extra overhead in every -floating-point comparison, therefore the default is set to -@option{-ffinite-math-only}. +@opindex mnoieee +Control the IEEE compliance of floating-point comparisons, which affects the +handling of cases where the result of a comparison is unordered. By default +@option{-mieee} is implicitly enabled. If @option{-ffinite-math-only} is +enabled @option{-mno-ieee} is implicitly set, which results in faster +floating-point greater-equal and less-equal comparisons. The implcit settings +can be overridden by specifying either @option{-mieee} or @option{-mno-ieee}. @item -minline-ic_invalidate @opindex minline-ic_invalidate diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index ac9f86b1ae9..4c95a402bd9 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2012-07-18 Oleg Endo + + PR target/33135 + * gcc.target/sh/pr33135-1.c: New. + * gcc.target/sh/pr33135-2.c: New. + * gcc.target/sh/pr33135-3.c: New. + * gcc.target/sh/pr33135-4.c: New. + 2012-07-17 Jason Merrill PR c++/53995 diff --git a/gcc/testsuite/gcc.target/sh/pr33135-1.c b/gcc/testsuite/gcc.target/sh/pr33135-1.c new file mode 100644 index 00000000000..6c28e8c3b2b --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr33135-1.c @@ -0,0 +1,32 @@ +/* Check that fcmp/eq and fcmp/gt instructions are generated by default + (implicit -mieee). */ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-O1" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */ +/* { dg-final { scan-assembler-times "fcmp/eq" 4 } } */ +/* { dg-final { scan-assembler-times "fcmp/gt" 4 } } */ + +int +test_00 (float a, float b) +{ + return a <= b; +} + +int +test_01 (float a, float b) +{ + return a >= b; +} + +int +test_02 (double a, double b) +{ + return a <= b; +} + +int +test_03 (double a, double b) +{ + return a >= b; +} + diff --git a/gcc/testsuite/gcc.target/sh/pr33135-2.c b/gcc/testsuite/gcc.target/sh/pr33135-2.c new file mode 100644 index 00000000000..37c4035deca --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr33135-2.c @@ -0,0 +1,32 @@ +/* Check that only the fcmp/gt instruction is generated when specifying + -ffinite-math-only (implicit -mno-ieee). */ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-O1 -ffinite-math-only" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */ +/* { dg-final { scan-assembler-not "fcmp/eq" } } */ +/* { dg-final { scan-assembler-times "fcmp/gt" 4 } } */ + +int +test_00 (float a, float b) +{ + return a <= b; +} + +int +test_01 (float a, float b) +{ + return a >= b; +} + +int +test_02 (double a, double b) +{ + return a <= b; +} + +int +test_03 (double a, double b) +{ + return a >= b; +} + diff --git a/gcc/testsuite/gcc.target/sh/pr33135-3.c b/gcc/testsuite/gcc.target/sh/pr33135-3.c new file mode 100644 index 00000000000..cbda922e103 --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr33135-3.c @@ -0,0 +1,32 @@ +/* Check that fcmp/eq and fcmp/gt instructions are generated when specifying + -ffinite-math-only and -mieee. */ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-O1 -ffinite-math-only -mieee" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */ +/* { dg-final { scan-assembler-times "fcmp/eq" 4 } } */ +/* { dg-final { scan-assembler-times "fcmp/gt" 4 } } */ + +int +test_00 (float a, float b) +{ + return a <= b; +} + +int +test_01 (float a, float b) +{ + return a >= b; +} + +int +test_02 (double a, double b) +{ + return a <= b; +} + +int +test_03 (double a, double b) +{ + return a >= b; +} + diff --git a/gcc/testsuite/gcc.target/sh/pr33135-4.c b/gcc/testsuite/gcc.target/sh/pr33135-4.c new file mode 100644 index 00000000000..3e4aa51cd9b --- /dev/null +++ b/gcc/testsuite/gcc.target/sh/pr33135-4.c @@ -0,0 +1,32 @@ +/* Check that only the fcmp/gt instruction is generated when specifying + -fno-finite-math-only and -mno-ieee. */ +/* { dg-do compile { target "sh*-*-*" } } */ +/* { dg-options "-O1 -fno-finite-math-only -mno-ieee" } */ +/* { dg-skip-if "" { "sh*-*-*" } { "-m1" "-m2" "-m3" "-m4al" "*nofpu" "-m4-340*" "-m4-400*" "-m4-500*" "-m5*" } { "" } } */ +/* { dg-final { scan-assembler-not "fcmp/eq" } } */ +/* { dg-final { scan-assembler-times "fcmp/gt" 4 } } */ + +int +test_00 (float a, float b) +{ + return a <= b; +} + +int +test_01 (float a, float b) +{ + return a >= b; +} + +int +test_02 (double a, double b) +{ + return a <= b; +} + +int +test_03 (double a, double b) +{ + return a >= b; +} + -- 2.11.4.GIT