From ad4ecfda33b1120e3a632c9d29015496e5b923e2 Mon Sep 17 00:00:00 2001 From: jakub Date: Tue, 21 Feb 2006 08:09:08 +0000 Subject: [PATCH] PR middle-end/26379 * combine.c (simplify_shift_const_1): Disable nested shifts optimization for vector shifts. * gcc.target/i386/mmx-7.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@111328 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++++++ gcc/combine.c | 3 ++- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/mmx-7.c | 18 ++++++++++++++++++ 4 files changed, 31 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/i386/mmx-7.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 0349d92cb0b..eee818bb408 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2006-02-21 Jakub Jelinek + + PR middle-end/26379 + * combine.c (simplify_shift_const_1): Disable nested shifts + optimization for vector shifts. + 2006-02-20 Roger Sayle PR tree-optimization/26361 diff --git a/gcc/combine.c b/gcc/combine.c index 96ebd208a82..9240b32568a 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -8737,7 +8737,8 @@ simplify_shift_const_1 (enum rtx_code code, enum machine_mode result_mode, && INTVAL (XEXP (varop, 1)) >= 0 && INTVAL (XEXP (varop, 1)) < GET_MODE_BITSIZE (GET_MODE (varop)) && GET_MODE_BITSIZE (result_mode) <= HOST_BITS_PER_WIDE_INT - && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) + && GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT + && !VECTOR_MODE_P (result_mode)) { enum rtx_code first_code = GET_CODE (varop); unsigned int first_count = INTVAL (XEXP (varop, 1)); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index cf2d999a326..266489f9450 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2006-02-21 Jakub Jelinek + + PR middle-end/26379 + * gcc.target/i386/mmx-7.c: New test. + 2006-02-20 Roger Sayle PR tree-optimization/26361 diff --git a/gcc/testsuite/gcc.target/i386/mmx-7.c b/gcc/testsuite/gcc.target/i386/mmx-7.c new file mode 100644 index 00000000000..683ca102d8a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/mmx-7.c @@ -0,0 +1,18 @@ +/* PR middle-end/26379 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mmmx" } */ + +#include + +void +foo (__m64 *p) +{ + __m64 m; + + m = p[0]; + m = _mm_srli_pi16(m, 2); + m = _mm_slli_pi16(m, 8); + + p[0] = m; + _mm_empty(); +} -- 2.11.4.GIT